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1.
This paper presents a search method based on lexicographic order, and an upper bound on the objective function, for solving redundancy allocation problems in coherent systems. Such problems generally belong to the class of nonlinear integer programming problems with separable constraints and nondecreasing functions. For illustration, 3 types of problems are solved using our method. Numerical investigation shows the performance of the method for large problems  相似文献   

2.
Moving from the traditional federated design paradigm, integration of mixed-criticality software components onto common computing platforms is increasingly being adopted by automotive, avionics and the control industry. This method faces new challenges such as the integration of varied functionalities (dependability, responsiveness, power consumption, etc.) under platform resource constraints and the prevention of error propagation. Based on model driven architecture and platform based design’s principles, we present a systematic mapping process for such integration adhering a transformation based design methodology. Our aim is to convert/transform initial platform independent application specifications into post integration platform specific models. In this paper, a heuristic based resource allocation approach is depicted for the consolidated mapping of safety critical and non-safety critical applications onto a common computing platform meeting particularly dependability/fault-tolerance and real-time requirements. We develop a supporting tool suite for the proposed framework, where VIATRA (VIsual Automated model TRAnsformations) is used as a transformation tool at different design steps. We validate the process and provide experimental results to show the effectiveness, performance and robustness of the approach.  相似文献   

3.
The applications and uses of embedded systems is increasingly pervasive. Mission and safety critical systems relying on embedded systems pose specific challenges. Embedded systems is a multi-disciplinary domain, involving both hardware and software. Systems need to be designed in a holistic manner so that they are able to provide the desired reliability and minimise unnecessary complexity. The large problem landscape means that there is no one solution that fits all applications of embedded systems. With the primary focus of these mission and safety critical systems being functionality and reliability, there can be conflicts with business needs, and this can introduce pressures to reduce cost at the expense of reliability and functionality. This paper examines the challenges faced by battery powered systems, and then explores at more general problems, and several real-world embedded systems.  相似文献   

4.
A method for solving the problem of optimizing both, redundancy (number of redundant components) and component reliability in each stage of a system under multiple constraints is presented. A mixed-integer nonlinear programming formulation and the surrogate dual method are used. The solution of the surrogate dual problem is not always feasible in the original problem, that is, a `surrogate gap' exists. Two countermeasures to surrogate gaps are considered: (1) modifying the original problem to tighten the constraints, with the modification being continued until the solution of the surrogate dual problem of the modified problem becomes feasible in the original problem, and (2) decreasing component reliabilities in the vertical direction to the tangential plane of the objective function. The method applies to reliability optimization problems for general systems, enabling complex systems such as communication networks to be treated. Some computational results are shown and compared with other approaches; they show the efficiency of the method  相似文献   

5.
本文介绍了一种利用可编程器件CPLD实现CAN总线与微机之间接口的设计,说明了设计思想和设计方案,并给出了使用MAX PLUS Ⅱ软件图形输入法的逻辑设计和仿真结果。  相似文献   

6.
We solve the transmitter optimization problem and determine a necessary and sufficient condition under which beamforming achieves Shannon capacity in a linear narrowband point-to-point communication system employing multiple transmit and receive antennas with additive Gaussian noise. We assume that the receiver has perfect channel knowledge while the transmitter has only knowledge of either the mean or the covariance of the channel coefficients. The channel is modeled at the transmitter as a matrix of complex jointly Gaussian random variables with either a zero mean and a known covariance matrix (covariance information), or a nonzero mean and a white covariance matrix (mean information). For both cases, we develop a necessary and sufficient condition for when the Shannon capacity is achieved through beamforming; i.e., the channel can be treated like a scalar channel and one-dimensional codes can be used to achieve capacity. We also provide a waterpouring interpretation of our results and find that less channel uncertainty not only increases the system capacity but may also allow this higher capacity to be achieved with scalar codes which involves significantly less complexity in practice than vector coding.  相似文献   

7.
We focus here on the application of multi critera decision analysis (MCDA) techniques in hardware/software partitioning activities to be used in the design and deployment of embedded systems. Our goal is to identify the best existing methods and tools suitable to support the approach we have taken for the partitioning process. We provide this via a survey of the most well-known MCDA methods and tools (for a specific class of MCDA methods called multi attribute decision making. We identify a set of criteria that need to be addressed, in some way, by the methods, and implemented by related tools. These “11-suitability criteria” help us in deciding the appropriateness of the analysed methods and tools for the envisaged partitioning approach. In brief, we are interested that the MCDA methods are taking into account multiple extra-functional properties, expressed by a variety of types, with possible missing values, should enable dependency handling, decision traceability, etc. The conclusion is that there are criteria that are not fulfilled by any of the methods, and hence there is no method or tool that can directly used for the partitioning. However, the results shows the potential of using MCDA in the partitioning process and provide a good starting point for future research activities.  相似文献   

8.
A problem-specific genetic algorithm (GA) is developed and demonstrated to analyze series-parallel systems and to determine the optimal design configuration when there are multiple component choices available for each of several k-out-of-n:G subsystems. The problem is to select components and redundancy-levels to optimize some objective function, given system-level constraints on reliability, cost, and/or weight. Previous formulations of the problem have implicit restrictions concerning the type of redundancy allowed, the number of available component choices, and whether mixing of components is allowed. GA is a robust evolutionary optimization search technique with very few restrictions concerning the type or size of the design problem. The solution approach was to solve the dual of a nonlinear optimization problem by using a dynamic penalty function. GA performs very well on two types of problems: (1) redundancy allocation originally proposed by Fyffe, Hines, Lee, and (2) randomly generated problem with more complex k-out-of-n:G configurations.  相似文献   

9.
Consider a two-unit standby redundant system with two main units, one repair facility, and n spare units. When the main unit has failed and the other is under repair, a spare unit takes over the operation and if it fails, it is replaced by a new one until the repair of the failed unit is completed. The system fails when the last spare unit fails while one main unit is under repair and the other has failed. In this paper, we derive expressions for 1) the distribution function of the first time to system failure, 2) the probability that the total number of failed spare units during the time interval (0,t] is n and 3) the mean of the total number of failed spare units in (0,t] and its asymptotic behaviour. Introducing costs incurred for each failed main unit and each failed spare unit, the expected cost per unit of time of the system was also derived. Finally an optinmization problem is discussed in order to compare the expected cost of the system with both main units and spare units with that of spare units only, and particular cases are considered.  相似文献   

10.
在实际的单用户多天线平坦衰落通信系统中,接收端往往具有理想的信道状态信息,而发送端只有来自接收端的部分信道状态信息反馈,因此在发送端信道模型假设为复高斯随机矩阵.在发射端具有信道协反差反馈或者均值反馈的情形下,对达到最大的信道容量即信息论角度的最优化问题进行了理论分析,研究了系统的最优发送方案.对目前的关于单方向发射的最优条件进行扩展,进一步推导了沿任意多个方向发送达到信道容量的条件.数值结果验证了分析结论.  相似文献   

11.
We present Avalanche, a prototyping framework that addresses the issues of power estimation and optimization for mixed hardware and software embedded systems. Avalanche is based on a generic embedded system architecture consisting of embedded CPU, custom hardware, and a memory hierarchy. For system-level power estimation, given various system parameters like cache sizes, cache policies, and bus width, etc., Avalanche is able to rapidly evaluate/estimate power and performance and thus facilitate comprehensive design space explorations. For system-level power optimization, Avalanche offers different modes reflecting various design scenarios: if no hardware/software partitioning or only partial partitioning has been conducted, Avalanche guides the designer in finding power-aware hardware/software partitioning; when a system has already been partitioned, Avalanche can optimize system parameters such as cache and memory size; if system parameters and partitioning are given, Avalanche applies additional optimizations for power including source-to-source compiler transformations. Avalanche has been deployed during the design phase of real-world applications including an MPEG II encoder in a set-top box design. Extensive design space explorations in terms of power and performance could be conducted within several hours and various optimization techniques led to power reductions of up to 94% without performance losses and only a slight increases in total chip size (i.e., transistor count).  相似文献   

12.
13.
This paper describes a new architecture for embedded reconfigurable computing, based on a very-long instruction word (VLIW) processor enhanced with an additional run-time configurable datapath. The reconfigurable unit is tightly coupled with the processor, featuring an application-specific instruction-set extension. Mapping computation intensive algorithmic portions on the reconfigurable unit allows a more efficient elaboration, thus leading to an improvement in both timing performance and power consumption. A test chip has been implemented in a standard 0.18-/spl mu/m CMOS technology. The test of a signal processing algorithmic benchmark showed speedups ranging from 4.3/spl times/ to 13.5/spl times/ and energy consumption reduced up to 92%.  相似文献   

14.
This paper addresses the design of reactive real-time embedded systems. Such systems are often heterogeneous in implementation technologies and design styles, for example by combining hardware application-specific integrated circuits (ASICs) with embedded software. The concurrent design process for such embedded systems involves solving the specification, validation, and synthesis problems. We review the variety of approaches to these problems that have been taken  相似文献   

15.
This work considers a simple bit level combining technique, aided by robust bit reliability information, for uplink collaborating multiple‐input multiple‐output (MIMO) base‐stations (also known as macrodiversity MIMO), operating over composite Rayleigh‐lognormal fading channels. Bit reliability weights based on a robust modification of the logarithmic likelihood ratio, combined with instantaneous symbol signal‐to‐noise ratio information, are derived for different local MIMO detection schemes. This bit reliability information is used at the fusion center, together with locally detected data, for combining and producing final information bits delivered to the destination. Computer simulation results confirm that such bit level combining techniques, when used with minimum mean squared error ordered successive interference cancelation and also with sphere decoding maximum likelihood local detectors, provide significant performance improvements over non‐collaborative base‐stations systems. Performance gains are maintained even when these schemes suffer from channel estimation errors and also in the presence of space correlation. Low backhaul overhead and performance advantages make these bit level combining techniques attractive for applications in next generation cellular systems employing coordinated multi‐point (CoMP) technology, as well as for other collaborative MIMO communication schemes.Copyright © 2014 John Wiley & Sons, Ltd.  相似文献   

16.
Polling systems: applications, modeling, and optimization   总被引:4,自引:0,他引:4  
  相似文献   

17.
Important power system planning and operation problems have been formulated as mathematical optimization problems. Such problems as the economic dispatch, in many of its facets; var scheduling and allocation; pollution dispatch; maximum interchange; hydrothermal unit commitment and dispatch; generation, transmission, and distribution expansion planning; maintenance scheduling and substation switching, have been formulated and solved. Modern mathematical optimization techniques, such as nonlinear, quadratic, linear, integer and dynamic programming and their many combinations and extensions, have been exploited. Some of the formulations and solutions to these problems as presented in the recent literature within the power systems field are reviewed. The large number of papers available is a measure of the current immense activity in this area. Attempts are made to point out some specific areas where more work needs to be done.  相似文献   

18.
In the design of embedded systems, a processor architecture is a tradeoff between energy consumption, area, speed, design time, and flexibility to cope with future design changes. New versions in a product generation may require small design changes in any part of the design. We propose a novel processor architecture concept, which provides the flexibility needed in practice at a reduced power and performance cost compared to a fully programmable processor. The crucial element is a novel protocol combining an efficient, customized component with a flexible processor into a hybrid architecture.  相似文献   

19.
A 4-kb SRAM design is presented with functionality of 12 MHz at a supply voltage of 0.9 V with an r.m.s. run power (1 MHz) of 18 μW. The circuit operates at maximum frequency of 40 MHz at a supply voltage of 1.6 V with an rms run power (1 MHz) of 64 μW. The design utilizes a subblocked array architecture as well as selective use of NOR/NAND-based decode logic. The sense amplifier design is a low voltage, glitch-free design to conserve power  相似文献   

20.
Facilities switching has been proposed for use in remote line units in telecommunication systems as a means of reducing both maintenance cost and customer-perceived failure rate. The authors present mathematical models of the cost/availability/modularity tradeoffs involved. Numerical methods are used to plot these cost-availability tradeoffs for several scenarios, including an electronic cross-connect frame in an electronic remote unit, and an optical cross-connect frame in an optical remote unit. It is demonstrated that it is possible to model the reliability of a given configuration of linecards and facilities switches in closed form for some service schedules, notably a deterministic scheduled maintenance discipline. For a set of four switch-cost functions, the optimum modularity is insensitive to the linecard failure rate. The optimum modularity of a facilities switch was also insensitive to the parameters chosen for a particular type of cost function over the range of parameters modeled  相似文献   

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