激光分子束外延法制备AlN/Si异质结的电学性质

采用激光分子束外延法在Si(111)衬底上制备出沿c轴取向的AlN薄膜,在此基础上制备了Au/AlN/Si金属-绝缘体-半导体(MIS)结构。研究了结构的电流传输机制、AlN/Si界面处的界面态密度值及分布情况。结果表明:AlN/Si异质结具有很好的整流特性,电流传输符合空间电荷限制传输机制,理想因子为2.88;结构的界面态密度约为1.1×10~(12) eV~(-1)·cm~(-2),主要分布在距离Si衬底价带顶0.26eV附近,由生长过程中引入的O杂质、N空位/N替代和Si原子代替N原子形成的Al-Si键组成。     

用气态源分子束外延生长法制备Si/SiGe/Si nPn异质结双极晶体管

用气态源分子束外延法制备了Si/SiGe/Si npn异质结双极晶体管.晶体管基区Ge组分为0.12,B掺杂浓度为1.5×101 9cm-3, SiGe合金厚度约45nm.直流特性测试表明,共发射极直流放大倍数约50,击穿电压VCE约9V;射频特性测试结果表明,晶体管的截止频率为7GHz,最高振荡频率为2.5GHz.     

用气态源分子束外延生长法制备Si/SiGe/Sinpn异质结双极晶体管

用气态源分子束外延法制备了Ｓｉ／ＳｉＧｅ／Ｓｉｎｐｎ异质结双极晶体管．晶体管基区Ｇｅ组分为０．１２,Ｂ掺杂浓度为１．５e１９ｃｍ－３,ＳｉＧｅ合金厚度约４５ｎｍ．直流特性测试表明,共发射极直流放大倍数约５０,击穿电压ＶＣＥ约９Ｖ;射频特性测试结果表明,晶体管的截止频率为７ＧＨｚ,最高振荡频率为２．５ＧＨｚ．     

Si_(1-x)Ge_x/Si多层异质外延结构的研究

对制作的 Ｓｉ１－ｘＧｅｘ／Ｓｉ多层异质外延结构进行了研究。并对其做了反射高能电子衍射（ＲＨＥＥＤ）、Ｘ射线衍射（ＸＲＤ）和扩展电阻（ＳＲ）等测量,给出了利用这种结构研制出的异质结双极晶体管（ＨＢＴ）的输出特性曲线。     

GaAs/Si异质结的界面性质

本文应用普适参数紧束缚方法计算了GaAs/Si异质中界面组成、键能、自然键长、力常数以及键的弛豫等性质.由键能和力常数推断As和Ga原子均能在界面处与Si原子成键,但Si-As键更强一些,考虑到Si和Ga原子在界面的互扩散作用,提出了界面层的可能生长机理.作者认为界面层应由SiAs和GaSi组成的膺合金Ga_xA(?)_(1-x)Si构成,根据价带极大值随组分x的变化,指出x的范围处在0.1～0.6之间.由键的弛豫效应预示x的最佳范围在0.1～0.3之间.由此设想,通过控制组分,有可能使由晶格畸变产生的界面应力减至比较小,从而为消除因晶格畸变产生的应力缺陷给出了理论依据.     

以金属为缓冲层在Si(111)上分子束外延GaN及其表征

用电子束蒸发方法在Si(111)衬底上蒸发了Au/Cr和Au/Ti/Al/Ti 两种金属缓冲层,然后在金属缓冲层上用气源分子束外延(GSMBE)生长GaN. 两种缓冲层的表面都比较平整和均匀,都是具有Au(111)面择优取向的立方相Au层. 在Au/Cr/Si(111)上MBE生长的GaN,生长结束后出现剥离. 在Au/Ti/Al/Ti/Si(111)上无AlN缓冲层直接生长GaN,得到的是多晶GaN;先在800℃生长一层AlN缓冲层,然后在710℃生长GaN,得到的是沿GaN(0001)面择优取向的六方相GaN. 将Au/Ti/Al/Ti/Si(111)在800℃下退火20min,金属层收缩为网状结构,并且成为多晶,不再具有Au(111)方向择优取向.     

以金属为缓冲层在Si(111)上分子束外延GaN及其表征

用电子束蒸发方法在Si(111)村底蒸发了Au/Cr和Au/Ti/AI/Ti两种金属缓冲层,然后在金属缓冲层上用气源分子束外延(GSMBE)生长GaN.两种缓冲层的表面部比较平整和均匀,都是具有Au(111)面掸优取向的立方相Au层.在Au/Cr/Si(111)上MBE生长的GaN,生长结束后出现剥离.在Au/Ti/Al/Ti/Si(111)上无AIN缓冲层直接生长GaN,得到的是多品GaN;先在800℃生长一层AIN缓冲层,然后在710℃生长GaN,得到的足沿GaN(0001)面择优取向的六方相GaN.将Au/Ti/Al/Ti/Si(111)在 800℃下退火20min,金属层收缩为网状结构,并且成为多晶,不再具有Au(111)方向择优取向.     

分子束外延AlGaN/GaN异质结场效应晶体管材料

用自组装的氨源分子束外延 (NH3-MBE)系统和射频等离子体辅助分子束外延 (PA-MBE)系统在 C面蓝宝石衬底上外延了优质 Ga N以及 Al Ga N/Ga N二维电子气材料。Ga N膜 (1 .2 μm厚 )室温电子迁移率达3 0 0 cm2 /V· s,背景电子浓度低至 2× 1 0 1 7cm- 3。双晶 X射线衍射 (0 0 0 2 )摇摆曲线半高宽为 6arcmin。 Al Ga N/Ga N二维电子气材料最高的室温和 77K二维电子气电子迁移率分别为 73 0 cm2 /V·s和 1 2 0 0 cm2 /V· s,相应的电子面密度分别是 7.6× 1 0 1 2 cm- 2和 7.1× 1 0 1 2 cm- 2 ;用所外延的 Al Ga N/Ga N二维电子气材料制备出了性能良好的 Al Ga N/Ga N HFET(异质结场效应晶体管 ) ,室温跨导为 5 0 m S/mm(栅长 1 μm) ,截止频率达 1 3 GHz(栅长 0 .5μm)。该器件在 3 0 0°C出现明显的并联电导 ,这可能是材料中的深中心在高温被激活所致     

分子束外延生长InGaAs/GaAs异质结及其在独特场效应晶体管中的应用

用分子束外延技术生长了ＩｎＧａＡｓ／ＧａＡｓ异质结材料,并用ＨＡＬＬ效应法和电化学Ｃ－Ｖ分布研究其特性。讨论了ＩｎＧａＡｓ／ＧａＡｓ宜质结杨效应晶体管（ＨＦＥＴ）的优越性。和ＧａＡｓ ＭＥＳＦＥＴＳ或ＨＥＭＴ相比,由于ＨＦＥＴ没有Ａｌ组份,具有低温特性好,低噪声和高增益等特点。本文研究了具有ＩｎＧａＡｓ／ＧａＡｓ双沟道和独特掺杂分布的低噪声高增益ＨＦＥＴ。     

钙钛矿氧化物薄膜和异质结的外延生长与物性研究

用激光分子束外延，原子尺度控制的外延生长出多种钙钛矿氧化物薄膜和异质结．原子力显微镜和高分辨透射电镜测量结果表明，薄膜与异质结的表面和界面均达到原子尺度的光滑．制备出在可见光波段透过率大于85％的导电氧化物薄膜；物性研究结果表明，随着含氧量的不同，BaTiO3薄膜具有绝缘体、半导体和导体的不同特性。BaTiO3／SrTiO3超晶格的光学非线性效应比BaTiO3体材增大23倍．首次在La0．9Sr0．1MnO3／SrNb0．01Ti0.99O3(LSMO／SNTO)异质结上，观测到全氧化物p-n结电流和电压的磁调制与正磁电阻效应。在255K条件下，当外加磁场分别为5和1000Oe时，LSMO／SNTO p-n结的磁电阻变化率R／RO达到：46．7％和83．4％；在外加磁场为3T时，在100K条件下，在LSMO／SNTO多层p-n异质结上观测515％的正磁电阻变化率。     

Al/AlN/Si MIS结构的电学性质

用S i(111)上M OCVD生长的晶态A lN制备出性能良好的A l/A lN/S i(111)M IS结构,用C-V技术首次系统研究了A l/A lN/S iM IS结构的电学性质。用A l/A lN/S iM IS结构的C-V技术测量了A lN的极化特性,得出A lN层的极化强度为-0.000 92 C/m2;揭示了A lN/S i界面存在连续分布的载流子陷阱态,给出了陷阱态密度在S i禁带中随能量的分布;还观察到A lN界面层存在Et-Ev(A lN)=2.55 eV的分立陷阱中心。     

HfOxNy栅介质薄膜的电学特性

用直流溅射方法制备了HfOxNy薄膜，对其电学特性和导电机理进行了研究. 实验结果表明,引入铪缓冲层并在氮气中退火有助于改善电学性能. 研究了薄膜在电场下的漏电机理，发现在负向低电场下I-V特性遵从欧姆规律，在中强电场下导电机制遵从空间电荷限制电流理论.     

High-quality large-area MBE HgCdTe/Si

HgCdTe offers significant advantages over other similar semiconductors, which has made it the most widely utilized variable-gap material in infrared (IR) focal plane array (FPA) technology. HgCdTe hybrid FPAs consisting of two-dimensional detector arrays that are hybridized to Si readout circuits (ROIC) are the dominant technology for second-generation infrared systems. However, one of the main limitations of the HgCdTe materials system has been the size of lattice-matched bulk CdZnTe substrates, used for epitaxially grown HgCdTe, which have been limited to 30 cm² in production. This size limitation does not adequately support the increasing demand for larger FPA formats which now require sizes up to 2048×2048, and only a single die can be printed per wafer. Heteroepitaxial Si-based substrates offer a cost-effective technology that can be scaled to large wafer sizes and further offer a thermal-expansion-matched hybrid structure that is suitable for large format FPAs. This paper presents data on molecular-beam epitaxy (MBE)-grown HgCdTe/Si wafers with much improved materials characteristics than previously reported. We will present data on 4- and 6-in diameter HgCdTe both with extremely uniform composition and extremely low defects. Large-diameter HgCdTe/Si with nearly perfect compositional uniformity and ultra low defect density is essential for meeting the demanding specifications of large format FPAs.     

Improved morphology and crystalline quality of MBE CdZnTe/Si

We report on continuing efforts to develop a reproducible process for molecular beam epitaxy of CdZnTe on three-inch, (211) Si wafers. Through a systematic study of growth parameters, we have significantly improved the crystalline quality and have reduced the density of typical surface defects. Lower substrate growth temperatures (∼250–280°C) and higher CdZnTe growth rates improved the surface morphology of the epilayers by reducing the density of triangular surface defects. Cyclic thermal annealing was found to reduce the dislocation density. Epilayers were characterized using Nomarski microscopy, scanning electron microscopy, x-ray diffraction, defect-decoration etching, and by their use as substrates for HgCdTe epitaxy.     

Si/Si键合结构的电学性质测量及模拟

研究Si／Si键合的电学性质对于界面研究和微电子器件的制备有着重要意义。分析了亲水处理方法键合的不同Si／Si键合结构的I—V特性，然后用SOS模型对n—Si／n—Si的C—V特性做了计算机辅助模拟，并和实际C—V曲线比较得出了平带电压VFB和界面态密度Din，这些结果对于键合的界面性质的了解和研究都是有意义的。     

Ni-Au/AlN/Si器件的深能级瞬态谱研究

对GaN器件制备过程中AlN缓冲层相关的电活性缺陷进行了C-V和深能级瞬态谱(DLTS)研究。C-V研究结果表明,制备态Ni-Au/AlN/Si MIS器件中,靠近AlN/Si界面处的掺杂浓度为4.4×10¹⁷cm-3,明显高于Si衬底的1.4×10¹⁶cm-3,意味着制备态样品中Al原子已经向衬底硅中扩散。采用退火工艺研究了GaN器件制备过程中的热影响以及热处理前后电活性缺陷在硅衬底中的演变情况,发现退火处理后,Al原子进一步向衬底硅中更深处扩散,扩散深度由制备态的500nm左右深入到1μm附近。DLTS研究结果发现,在Si衬底中与Al原子扩散相关的缺陷为Al-O配合物点缺陷。DLTS脉冲时间扫描表明,相比于制备态样品,退火态样品中出现了部分空穴俘获时间常数更大的缺陷,退火处理造成了点缺陷聚集,缺陷类型由点缺陷逐渐向扩展态缺陷发展。     

Characterization of PbSnSe/CdTe/Si (211) Epilayers Grown by Molecular Beam Epitaxy

Narrow-bandgap PbSnSe has received much attention as a promising alternative material for mid- and long-wavelength high performance of infrared detection at relatively high operating temperatures owing to the weak composition dependence of its bandgap, which can intrinsically result in better uniformity. Additionally, it possesses a high dielectric constant that is anticipated to be much more tolerant to defects. In addition, its growth by molecular beam epitaxy (MBE) can be easily accomplished in comparison with HgCdTe and many III–V quantum well and superlattice materials. However, overcoming the high lattice and thermal mismatches between PbSnSe and CdTe/Si substrates and improving the crystalline quality of PbSnSe grown on CdTe/Si substrates are challenges that require further study. Additionally, interdiffusion between CdTe and PbSnSe can take place and lead to nonuniform distributions of elements in PbSnSe. Epitaxial crystal PbSnSe alloy films were grown by MBE and were investigated by scanning and high-resolution transmission electron microscopy (STEM/HRTEM). Etch pit density (EPD) measurements were done to determine the density of threading defects in the films. EPD measurements on PbSnSe surfaces gave values in the mid-10⁶ cm⁻² range. The dislocations exposed as etch pits were found to accumulate and form small-angle grain boundaries lined up along the () direction, which is the intersection line between (100) and (211) growth planes.     

Si基CdTe/HgCdTe分子束外延材料的位错抑制

基于GaAs/Si材料中位错的运动反应理论,修正获得CdTe/Si和HgCdTe/Si外延材料中的位错运动反应模型.采用快速退火方法对Si基HgCdTe外延材料进行位错抑制实验研究,实验结果与理论曲线基本吻合,从理论角度解释了不同高温热处理条件对材料体内位错的抑制作用.对于厚度为4～10μnn的CdTe/Si进行500...     

Microstructural and optical characterization of CdTe(211)B/ZnTe/Si(211) grown by molecular beam epitaxy

CdTe layers have been grown by molecular beam epitaxy on 3 inch nominal Si(211) under various conditions to study the effect of growth parameters on the structural quality. The microstructure of several samples was investigated by high resolution transmission electron microscopy (HRTEM). The orientation of the CdTe layers was affected strongly by the ZnTe buffer deposition temperature. Both single domain CdTe(133)B and CdTe(211)B were obtained by selective growth of ZnTe buffer layers at different temperatures. We demonstrated that thin ZnTe buffer layers (<2 nm) are sufficient to maintain the (211) orientation. CdTe deposited at ∼300°C grows with its normal lattice parameter from the onset of growth, demonstrating the effective strain accommodation of the buffer layer. The low tilt angle (<1°) between CdTe[211] and Si[211] indicates that high miscut Si(211) substrates are unnecessary. From low temperature photoluminescence, it is shown that Cd-substituted Li is the main residual impurity in the CdTe layer. In addition, deep emission bands are attributed to the presence of As_Te and Ag_Cd acceptors. There is no evidence that copper plays a role in the impurity contamination of the samples.