A High‐Rate V2O5 Hollow Microclew Cathode for an All‐Vanadium‐Based Lithium‐Ion Full Cell

V₂O₅ hollow microclews (V₂O₅‐HMs) have been fabricated through a facile solvothermal method with subsequent calcination. The synthesized V₂O₅‐HMs exhibit a 3D hierarchical structure constructed by intertangled nanowires, which could realize superior ion transport, good structural stability, and significantly improved tap density. When used as the cathodes for lithium‐ion batteries (LIBs), the V₂O₅‐HMs deliver a high capacity (145.3 mAh g^‐1) and a superior rate capability (94.8 mAh g^‐1 at 65 C). When coupled with a lithiated Li₃VO₄ anode, the all‐vanadium‐based lithium‐ion full cell exhibits remarkable cycling stability with a capacity retention of 71.7% over 1500 cycles at 6.7 C. The excellent electrochemical performance demonstrates that the V₂O₅‐HM is a promising candidate for LIBs. The insight obtained from this work also provides a novel strategy for assembling 1D materials into hierarchical microarchitectures with anti‐pulverization ability, excellent electrochemical kinetics, and enhanced tap density.     

Ferroelectricity and Antiferroelectricity of Doped Thin HfO2‐Based Films

The recent progress in ferroelectricity and antiferroelectricity in HfO₂‐based thin films is reported. Most ferroelectric thin film research focuses on perovskite structure materials, such as Pb(Zr,Ti)O₃, BaTiO₃, and SrBi₂Ta₂O₉, which are considered to be feasible candidate materials for non‐volatile semiconductor memory devices. However, these conventional ferroelectrics suffer from various problems including poor Si‐compatibility, environmental issues related to Pb, large physical thickness, low resistance to hydrogen, and small bandgap. In 2011, ferroelectricity in Si‐doped HfO₂ thin films was first reported. Various dopants, such as Si, Zr, Al, Y, Gd, Sr, and La can induce ferro­electricity or antiferroelectricity in thin HfO₂ films. They have large remanent polarization of up to 45 μC cm^?2, and their coercive field (≈1–2 MV cm^?1) is larger than conventional ferroelectric films by approximately one order of magnitude. Furthermore, they can be extremely thin (<10 nm) and have a large bandgap (>5 eV). These differences are believed to overcome the barriers of conventional ferroelectrics in memory applications, including ferroelectric field‐effect‐transistors and three‐dimensional capacitors. Moreover, the coupling of electric and thermal properties of the antiferroelectric thin films is expected to be useful for various applications, including energy harvesting/storage, solid‐state‐cooling, and infrared sensors.     

Fast Supercapacitors Based on Graphene‐Bridged V2O3/VOx Core–Shell Nanostructure Electrodes with a Power Density of 1 MW kg−1

Transition metal oxides (TMOs), with their very large pseudocapacitance effect, hold promise for next generation high‐energy‐density electrochemical supercapacitors (ECs). However, the typical high resistivity of TMOs restricts the reported ECs to work at a low charge–discharge (C–D) rate of 0.1–1 V s⁻¹. Here, a novel vanadium oxides core/shell nanostructure‐based electrode to overcome the resistivity challenge of TMOs for rapid pseudocapacitive EC design is reported. Quasi‐metallic V₂O₃ nanocores are dispersed on graphene sheets for electrical connection of the whole structure, while a naturally formed amorphous VO₂ and V₂O₅ (called as VO_x here) thin shell around V₂O₃ nanocore acts as the active pseudocapacitive material. With such a graphene‐bridged V₂O₃/VO_x core–shell composite as electrode material, ECs with a C–D rate as high as 50 V s⁻¹ is demonstrated. This high rate was attributed to the largely enhanced conductivity of this unique structure and a possibly facile redox mechanism. Such an EC can provide 1000 kW kg⁻¹ power density at an energy density of 10 Wh kg⁻¹. At the critical 45° phase angle, these ECs have a measured frequency of 114 Hz. All these indicate the graphene‐bridged V₂O₃/VO_x core–shell structure is promising for fast EC development.     

Structural and electrical properties of HfO2/Dy2O3 gate stacks on Ge substrates

In the present work we report on the structural and electrical properties of metal-oxide-semiconductor (MOS) devices with HfO₂/Dy₂O₃ gate stack dielectrics, deposited by molecular beam deposition on p-type germanium (Ge) substrates. Structural characterization by means of high-resolution Transmission Electron Microscopy (TEM) and X-ray diffraction measurements demonstrate the nanocrystalline nature of the films. Moreover, the interpretation of the X-ray reflectivity measurements reveals the spontaneous growth of an ultrathin germanium oxide interfacial layer which was also confirmed by TEM. Subsequent electrical characterization measurements on Pt/HfO₂/Dy₂O₃/p-Ge MOS diodes show that a combination of a thin Dy₂O₃ buffer layer with a thicker HfO₂ on top can give very good results, such as equivalent oxide thickness values as low as 1.9 nm, low density of interfacial defects (2-5 × 10¹² eV^− 1 cm^− 2) and leakage currents with typical current density values around 15 nA/cm² at V_g = V_FB − 1V.     

Eliminating Overerase Behavior by Designing Energy Band in High‐Speed Charge‐Trap Memory Based on WSe2

Atomic crystal charge trap memory, as a new concept of nonvolatile memory, possesses an atomic level flatness interface, which makes them promising candidates for replacing conventional FLASH memory in the future. Here, a 2D material WSe₂ and a 3D Al₂O₃/HfO₂/Al₂O₃ charge‐trap stack are combined to form a charge‐trap memory device with a separation of control gate and memory stack. In this device, the charges are erased/written by built‐in electric field, which significantly enhances the write speed to 1 µs. More importantly, owing to the elaborate design of the energy band structure, the memory only captures electrons with a large electron memory window over 20 V and trap selectivity about 13, both of them are the state‐of‐the‐art values ever reported in FLASH memory based on 2D materials. Therefore, it is demonstrated that high‐performance charge trap memory based on WSe₂ without the fatal overerase issue in conventional FLASH memory can be realized to practical application.     

Oxidation potential control of VO2 thin films by metal oxide co-sputtering

For metal-to-insulator transition (MIT) in vanadium oxide thin film, a thermodynamically stable vanadium dioxide (VO₂) phase is essential. In VO₂ films sputter-deposited on a quartz substrate from a V₂O₅ target, a radio-frequency (RF) magnetron sputter system at working pressure of 7 mTorr is used. Due to the lower sputtering yield of oxygen compared to vanadium leading to oxygen-ion deficiency, the reduction of V ions is resulted to compensate charge with the oxygen ions. Under lower working pressures, the deposition rate increases, but a simultaneous oxygen-ion deficiency causes the destabilization of VO₂. To prevent this, titanium oxide co-deposition is suggested to enrich the oxygen source. When TiO₂ is used, it is found that the Ti ion has a stable +4 charge state so that the use of extra oxygen in sputtering prevents the destabilization of VO₂. However, this is not the case for TiO. For the latter, Ti ions are oxidized from the +2 state to the +3 and +4 states, and V ions with less oxidation potential are reduced to +3 or so. Pure VO₂ thin film exhibits MIT at 66 °C and a large resistivity ratio of four orders of magnitude from 30 to 90 °C. The (V₂O₅ + TiO₂) system under working pressure as low as 5 mTorr yields fairly good films comparable to pure VO₂ deposited at 7 mTorr, whereas the use of TiO yields films with MIT absent or considerably weakened.     

Novel Tunnel‐Contact‐Controlled IGZO Thin‐Film Transistors with High Tolerance to Geometrical Variability

Thin insulating layers are used to modulate a depletion region at the source of a thin‐film transistor. Bottom contact, staggered‐electrode indium gallium zinc oxide transistors with a 3 nm Al₂O₃ layer between the semiconductor and Ni source/drain contacts, show behaviors typical of source‐gated transistors (SGTs): low saturation voltage (V_{D_SAT} ≈ 3 V), change in V_{D_SAT} with a gate voltage of only 0.12 V V^?1, and flat saturated output characteristics (small dependence of drain current on drain voltage). The transistors show high tolerance to geometry: the saturated current changes only 0.15× for 2–50 µm channels and 2× for 9‐45 µm source‐gate overlaps. A higher than expected (5×) increase in drain current for a 30 K change in temperature, similar to Schottky‐contact SGTs, underlines a more complex device operation than previously theorized. Optimization for increasing intrinsic gain and reducing temperature effects is discussed. These devices complete the portfolio of contact‐controlled transistors, comprising devices with Schottky contacts, bulk barrier, or heterojunctions, and now, tunneling insulating layers. The findings should also apply to nanowire transistors, leading to new low‐power, robust design approaches as large‐scale fabrication techniques with sub‐nanometer control mature.     

High‐Mobility Helical Tellurium Field‐Effect Transistors Enabled by Transfer‐Free,Low‐Temperature Direct Growth

The transfer‐free direct growth of high‐performance materials and devices can enable transformative new technologies. Here, room‐temperature field‐effect hole mobilities as high as 707 cm² V^?1 s^?1 are reported, achieved using transfer‐free, low‐temperature (≤120 °C) direct growth of helical tellurium (Te) nanostructure devices on SiO₂/Si. The Te nanostructures exhibit significantly higher device performance than other low‐temperature grown semiconductors, and it is demonstrated that through careful control of the growth process, high‐performance Te can be grown on other technologically relevant substrates including flexible plastics like polyethylene terephthalate and graphene in addition to amorphous oxides like SiO₂/Si and HfO₂. The morphology of the Te films can be tailored by the growth temperature, and different carrier scattering mechanisms are identified for films with different morphologies. The transfer‐free direct growth of high‐mobility Te devices can enable major technological breakthroughs, as the low‐temperature growth and fabrication is compatible with the severe thermal budget constraints of emerging applications. For example, vertical integration of novel devices atop a silicon complementary metal oxide semiconductor platform (thermal budget <450 °C) has been theoretically shown to provide a 10× systems level performance improvement, while flexible and wearable electronics (thermal budget <200 °C) can revolutionize defense and medical applications.     

A 1300 mm2 Ultrahigh‐Performance Digital Imaging Assembly using High‐Quality Perovskite Single Crystals

By fine‐tuning the crystal nucleation and growth process, a low‐temperature‐gradient crystallization method is developed to fabricate high‐quality perovskite CH₃NH₃PbBr₃ single crystals with high carrier mobility of 81 ± 5 cm² V^?1 s^?1 (>3 times larger than their thin film counterpart), long carrier lifetime of 899 ± 127 ns (>5 times larger than their thin film counterpart), and ultralow trap state density of 6.2 ± 2.7 × 10⁹ cm^?3 (even four orders of magnitude lower than that of single‐crystalline silicon wafers). In fact, they are better than perovskite single crystals reported in prior work: their application in photosensors gives superior detectivity as high as 6 × 10¹³ Jones, ≈10–100 times better than commercial sensors made of silicon and InGaAs. Meanwhile, the response speed is as fast as 40 µs, ≈3 orders of magnitude faster than their thin film devices. A large‐area (≈1300 mm²) imaging assembly composed of a 729‐pixel sensor array is further designed and constructed, showing excellent imaging capability thanks to its superior quality and uniformity. This opens a new possibility to use the high‐quality perovskite single‐crystal‐based devices for more advanced imaging sensors.     

Four‐Bits‐Per‐Cell Operation in an HfO2‐Based Resistive Switching Device

The quadruple‐level cell technology is demonstrated in an Au/Al₂O₃/HfO₂/TiN resistance switching memory device using the industry‐standard incremental step pulse programming (ISPP) and error checking/correction (ECC) methods. With the highly optimistic properties of the tested device, such as self‐compliance and gradual set‐switching behaviors, the device shows 6σ reliability up to 16 states with a state current gap value of 400 nA for the total allowable programmed current range from 2 to 11 µA. It is demonstrated that the conventional ISPP/ECC can be applied to such resistance switching memory, which may greatly contribute to the commercialization of the device, especially competitively with NAND flash. A relatively minor improvement in the material and circuitry may enable even a five‐bits‐per‐cell technology, which can hardly be imagined in NAND flash, whose state‐of‐the‐art multiple‐cell technology is only at three‐level (eight states) to this day.     

Polymer Doping Enables a Two‐Dimensional Electron Gas for High‐Performance Homojunction Oxide Thin‐Film Transistors

High‐performance solution‐processed metal oxide (MO) thin‐film transistors (TFTs) are realized by fabricating a homojunction of indium oxide (In₂O₃) and polyethylenimine (PEI)‐doped In₂O₃ (In₂O₃:x% PEI, x = 0.5–4.0 wt%) as the channel layer. A two‐dimensional electron gas (2DEG) is thereby achieved by creating a band offset between the In₂O₃ and PEI‐In₂O₃ via work function tuning of the In₂O₃:x% PEI, from 4.00 to 3.62 eV as the PEI content is increased from 0.0 (pristine In₂O₃) to 4.0 wt%, respectively. The resulting devices achieve electron mobilities greater than 10 cm² V^?1 s^?1 on a 300 nm SiO₂ gate dielectric. Importantly, these metrics exceed those of the devices composed of the pristine In₂O₃ materials, which achieve a maximum mobility of ≈4 cm² V^?1 s^?1. Furthermore, a mobility as high as 30 cm² V^?1 s^?1 is achieved on a high‐k ZrO₂ dielectric in the homojunction devices. This is the first demonstration of 2DEG‐based homojunction oxide TFTs via band offset achieved by simple polymer doping of the same MO material.     

Phase‐Engineered PtSe2‐Layered Films by a Plasma‐Assisted Selenization Process toward All PtSe2‐Based Field Effect Transistor to Highly Sensitive,Flexible, and Wide‐Spectrum Photoresponse Photodetectors

The formation of PtSe₂‐layered films is reported in a large area by the direct plasma‐assisted selenization of Pt films at a low temperature, where temperatures, as low as 100 °C at the applied plasma power of 400 W can be achieved. As the thickness of the Pt film exceeds 5 nm, the PtSe₂‐layered film (five monolayers) exhibits a metallic behavior. A clear p‐type semiconducting behavior of the PtSe₂‐layered film (≈trilayers) is observed with the average field effective mobility of 0.7 cm² V^?1 s^?1 from back‐gated transistor measurements as the thickness of the Pt film reaches below 2.5 nm. A full PtSe₂ field effect transistor is demonstrated where the thinner PtSe₂, exhibiting a semiconducting behavior, is used as the channel material, and the thicker PtSe₂, exhibiting a metallic behavior, is used as an electrode, yielding an ohmic contact. Furthermore, photodetectors using a few PtSe₂‐layered films as an adsorption layer synthesized at the low temperature on a flexible substrate exhibit a wide range of absorption and photoresponse with the highest photocurrent of 9 µA under the laser wavelength of 408 nm. In addition, the device can maintain a high photoresponse under a large bending stress and 1000 bending cycles.     

Peapod‐like Li3VO4/N‐Doped Carbon Nanowires with Pseudocapacitive Properties as Advanced Materials for High‐Energy Lithium‐Ion Capacitors

Lithium ion capacitors are new energy storage devices combining the complementary features of both electric double‐layer capacitors and lithium ion batteries. A key limitation to this technology is the kinetic imbalance between the Faradaic insertion electrode and capacitive electrode. Here, we demonstrate that the Li₃VO₄ with low Li‐ion insertion voltage and fast kinetics can be favorably used for lithium ion capacitors. N‐doped carbon‐encapsulated Li₃VO₄ nanowires are synthesized through a morphology‐inheritance route, displaying a low insertion voltage between 0.2 and 1.0 V, a high reversible capacity of ≈400 mAh g^?1 at 0.1 A g^?1, excellent rate capability, and long‐term cycling stability. Benefiting from the small nanoparticles, low energy diffusion barrier and highly localized charge‐transfer, the Li₃VO₄/N‐doped carbon nanowires exhibit a high‐rate pseudocapacitive behavior. A lithium ion capacitor device based on these Li₃VO₄/N‐doped carbon nanowires delivers a high energy density of 136.4 Wh kg^?1 at a power density of 532 W kg^?1, revealing the potential for application in high‐performance and long life energy storage devices.     

Carbon‐Coated Li3VO4 Spheres as Constituents of an Advanced Anode Material for High‐Rate Long‐Life Lithium‐Ion Batteries

Lithium‐ion batteries are receiving considerable attention for large‐scale energy‐storage systems. However, to date the current cathode/anode system cannot satisfy safety, cost, and performance requirements for such applications. Here, a lithium‐ion full battery based on the combination of a Li₃VO₄ anode with a LiNi_0.5Mn_1.5O₄ cathode is reported, which displays a better performance than existing systems. Carbon‐coated Li₃VO₄ spheres comprising nanoscale carbon‐coating primary particles are synthesized by a morphology‐inheritance route. The observed high capacity combined with excellent sample stability and high rate capability of carbon‐coated Li₃VO₄ spheres is superior to other insertion anode materials. A high‐performance full lithium‐ion battery is fabricated by using the carbon‐coated Li₃VO₄ spheres as the anode and LiNi_0.5Mn_1.5O₄ spheres as the cathode; such a cell shows an estimated practical energy density of 205 W h kg^?1 with greatly improved properties such as pronounced long‐term cyclability, and rapid charge and discharge.     

Large‐Pore Mesoporous CeO2–ZrO2 Solid Solutions with In‐Pore Confined Pt Nanoparticles for Enhanced CO Oxidation

Active and stable catalysts are highly desired for converting harmful substances (e.g., CO, NO_x) in exhaust gases of vehicles into safe gases at low exhaust temperatures. Here, a solvent evaporation–induced co‐assembly process is employed to design ordered mesoporous Ce_xZr_1?xO₂ (0 ≤ x ≤ 1) solid solutions by using high‐molecular‐weight poly(ethylene oxide)‐block‐polystyrene as the template. The obtained mesoporous Ce_xZr_1?xO₂ possesses high surface area (60–100 m² g^?1) and large pore size (12–15 nm), enabling its great capacity in stably immobilizing Pt nanoparticles (4.0 nm) without blocking pore channels. The obtained mesoporous Pt/Ce_0.8Zr_0.2O₂ catalyst exhibits superior CO oxidation activity with a very low T₁₀₀ value of 130 °C (temperature of 100% CO conversion) and excellent stability due to the rich lattice oxygen vacancies in the Ce_0.8Zr_0.2O₂ framework. The simulated catalytic evaluations of CO oxidation combined with various characterizations reveal that the intrinsic high surface oxygen mobility and well‐interconnected pore structure of the mesoporous Pt/Ce_0.8Zr_0.2O₂ catalyst are responsible for the remarkable catalytic efficiency. Additionally, compared with mesoporous Pt/Ce_xZr_1?xO₂‐s with small pore size (3.8 nm), ordered mesoporous Pt/Ce_xZr_1?xO₂ not only facilitates the mass diffusion of reactants and products, but also provides abundant anchoring sites for Pt nanoparticles and numerous exposed catalytically active interfaces for efficient heterogeneous catalysis.     

Controllable P‐ and N‐Type Conversion of MoTe2 via Oxide Interfacial Layer for Logic Circuits

To realize basic electronic units such as complementary metal‐oxide‐semiconductor (CMOS) inverters and other logic circuits, the selective and controllable fabrication of p‐ and n‐type transistors with a low Schottky barrier height is highly desirable. Herein, an efficient and nondestructive technique of electron‐charge transfer doping by depositing a thin Al₂O₃ layer on chemical vapor deposition (CVD)‐grown 2H‐MoTe₂ is utilized to tune the doping from p‐ to n‐type. Moreover, a type‐controllable MoTe₂ transistor with a low Schottky barrier height is prepared. The selectively converted n‐type MoTe₂ transistor from the p‐channel exhibits a maximum on‐state current of 10 µA, with a higher electron mobility of 8.9 cm² V^?1 s^?1 at a drain voltage (V_ds) of 1 V with a low Schottky barrier height of 28.4 meV. To validate the aforementioned approach, a prototype homogeneous CMOS inverter is fabricated on a CVD‐grown 2H‐MoTe₂ single crystal. The proposed inverter exhibits a high DC voltage gain of 9.2 with good dynamic behavior up to a modulation frequency of 1 kHz. The proposed approach may have potential for realizing future 2D transition metal dichalcogenide‐based efficient and ultrafast electronic units with high‐density circuit components under a low‐dimensional regime.     

Multidimensional Synergistic Nanoarchitecture Exhibiting Highly Stable and Ultrafast Sodium‐Ion Storage

Conversion‐type anodes with multielectron reactions are beneficial for achieving a high capacity in sodium‐ion batteries. Enhancing the electron/ion conductivity and structural stability are two key challenges in the development of high‐performance sodium storage. Herein, a novel multidimensionally assembled nanoarchitecture is presented, which consists of V₂O₃ nanoparticles embedded in amorphous carbon nanotubes that are then coassembled within a reduced graphene oxide (rGO) network, this materials is denoted V₂O₃?C‐NTs?rGO. The selective insertion and multiphase conversion mechanism of V₂O₃ in sodium‐ion storage is systematically demonstrated for the first time. Importantly, the naturally integrated advantages of each subunit synergistically provide a robust structure and rapid electron/ion transport, as confirmed by in situ and ex situ transmission electron microscopy experiments and kinetic analysis. Benefiting from the synergistic effects, the V₂O₃?C‐NTs?rGO anode delivers an ultralong cycle life (72.3% at 5 A g^?1 after 15 000 cycles) and an ultrahigh rate capability (165 mAh g^?1 at 20 A g^?1, ≈30 s per charge/discharge). The synergistic design of the multidimensionally assembled nanoarchitecture produces superior advantages in energy storage.     

High‐Energy/Power and Low‐Temperature Cathode for Sodium‐Ion Batteries: In Situ XRD Study and Superior Full‐Cell Performance

Sodium‐ion batteries (SIBs) are still confronted with several major challenges, including low energy and power densities, short‐term cycle life, and poor low‐temperature performance, which severely hinder their practical applications. Here, a high‐voltage cathode composed of Na₃V₂(PO₄)₂O₂F nano‐tetraprisms (NVPF‐NTP) is proposed to enhance the energy density of SIBs. The prepared NVPF‐NTP exhibits two high working plateaux at about 4.01 and 3.60 V versus the Na⁺/Na with a specific capacity of 127.8 mA h g^?1. The energy density of NVPF‐NTP reaches up to 486 W h kg^?1, which is higher than the majority of other cathode materials previously reported for SIBs. Moreover, due to the low strain (≈2.56% volumetric variation) and superior Na transport kinetics in Na intercalation/extraction processes, as demonstrated by in situ X‐ray diffraction, galvanostatic intermittent titration technique, and cyclic voltammetry at varied scan rates, the NVPF‐NTP shows long‐term cycle life, superior low‐temperature performance, and outstanding high‐rate capabilities. The comparison of Ragone plots further discloses that NVPF‐NTP presents the best power performance among the state‐of‐the‐art cathode materials for SIBs. More importantly, when coupled with an Sb‐based anode, the fabricated sodium‐ion full‐cells also exhibit excellent rate and cycling performances, thus providing a preview of their practical application.     

Laser treatment of optical Nb2O5‐ and HfO2‐films

Optical thin films have to fulfil high quality requirements, which can be achieved for example by reactive low voltage ion plating (RLVIP). But especially for applications in precision optics, additional treatments are necessary to reduce residual optical absorption and compressive stress arising in the coatings, and to enhance the stability of the coatings – specifically for laser applications. In practice, post deposition heat treatment and backside coatings are mostly used to overcome these problems. In order to provide alternative methods to handle the disadvantages of the RLVIP‐process, the idea was to replace the mentioned steps by a laser treatment. This means that a laser beam is directed onto the sample after deposition or even during the coating process. In this study, the influence of a high power CO²‐laser beam on thin Nb²O⁵‐ and HfO²‐films was investigated. The effects on the refractive index and the film thickness are presented for different energy densities of a TEA‐CO²‐laser beam (10.59μm). For Nb²O⁵‐films a thickness increase up to 12.2nm (6.4 %) and a refractive index decrease of 0.074 (3.1 %) were found. In case of HfO² the values were 2.3nm (1.2 %) in thickness and 0.007 (0.3 %) in refractive index. From the observed changes also distinct impacts on the film stress can be expected. One intention of this research was also to call attention to an alternative technique for enhancement of thin film properties.     

Organic Field‐Effect Transistor Memory Devices Using Discrete Ferritin Nanoparticle‐Based Gate Dielectrics

Organic field‐effect transistor (OFET) memory devices made using highly stable iron‐storage protein nanoparticle (NP) multilayers and pentacene semiconductor materials are introduced. These transistor memory devices have nonvolatile memory properties that cause reversible shifts in the threshold voltage (V_th) as a result of charge trapping and detrapping in the protein NP (i.e., the ferritin NP with a ferrihydrite phosphate core) gate dielectric layers rather than the metallic NP layers employed in conventional OFET memory devices. The protein NP‐based OFET memory devices exhibit good programmable memory properties, namely, large memory window ΔV_th (greater than 20 V), a fast switching speed (10 μs), high ON/OFF current ratio (above 10⁴), and good electrical reliability. The memory performance of the devices is significantly enhanced by molecular‐level manipulation of the protein NP layers, and various biomaterials with heme Fe^III/Fe^II redox couples similar to a ferrihydrite phosphate core are also employed as charge storage dielectrics. Furthermore, when these protein NP multilayers are deposited onto poly(ethylene naphthalate) substrates coated with an indium tin oxide gate electrode and a 50‐nm‐thick high‐k Al₂O₃ gate dielectric layer, the approach is effectively extended to flexible protein transistor memory devices that have good electrical performance within a range of low operating voltages (<10 V) and reliable mechanical bending stability.