一种GMSK调制解调器的实现

GMSK信号具有很好的频谱和功率特性,特别适用于功率受限和信道存在非线性、衰落以及多普勒频移的移动突发通信系统。论文提出了基于CMX909B调制芯片和8051控制芯片的GMSK无线调制解调器的软、硬件设计方案,接收/发送速率可达38.4kbps,并对GMSK调制进行了性能仿真。该设计成本低,操作灵活,具有应用意义。     

自动识别系统（AIS）中的通信系统硬件设计

介绍了AIS通信系统的组成原理,从硬件方面介绍了AIS通信系统的实现方法及主要电路芯片选择,阐述了串行通信控制器Z85C30（SCC）及GMSK调制解调芯片CMX589的功能,给出了AIS通信系统关键电路的设计方法和实际应用电路。     

GMSK调制器电路设计与FPGA实现

分析了GMSK调制原理,设计了GMSK调制器的一种全数字实现电路.该电路采用查表法实现高斯滤波功能,采用CORDIC算法完成正交调制信号输出,具有电路规模小、精度可调、应用灵活等特点.该电路通过了FPGA验证并成功应用于TETRA集群通信系统.     

基于System Generator的GMSK调制器仿真设计

GMSK由于具有优良的频谱效率和功率效率等特性,因而作为一种重要的调制技术被广泛地应用。传统的GMSK调制器需要在硬件中进行高斯滤波和相位积分计算,会出现各种截取误差,并且造成硬件资源浪费。本文是基于System Generator的GMSK正交调制器的仿真设计,采用了一种新的全数字基于相位路径的算法产生正交调制查找表,生成GMSK正交调制信号,该算法降低了计算复杂度与硬件实现难度。     

GMSK正交调制基带模块的设计

引言 GMSK调制具有较好的功率频谱特性与误码性能,最大优点就是带外辐射小,较适用于工作在VHF和UHF频段的移动通信系统,因此,GMSK调制在通信领域得到了广泛的应用,例如GSM手机通信系统与AIS系统就采用这种通信调制方式.目前,GMSK调制主要有锁相环与正交调制两种实现方式,其中前者在早前得到很大应用,但随着软件无线电的提出,正交调制实现方式逐渐得到广泛的研究与应用.同时,GMSK的硬件实现平台也由DSP发展到FPGA,本文就是针对FPGA平台设计了一种硬件可实现的GMSK正交调制基带模块.     

一种GMSK调制器的简化设计

GMSK调制信号包络恒定、频谱利用率高,但传统的波形存储正交实现方法在相位路径的计算和存储器地址映射上过于复杂。将高斯滤波器作为独立模块加入MSK调制电路中,得到一种GMSK调制器的简化设计,其具有结构简单、高斯滤波器设计灵活的优点。通过频域和时域仿真验证了GMSK调制器简化设计的有效性。     

基于CMX909B的高速数传电台的设计与实现

本文介绍了如何使用GMSK调制/解调芯片CMX909B实现高速无线数传电台,描述了其软硬件的构成,并对其中的几个关键技术做了详细说明。     

GMSK调制解调芯片FX589在无线数据通信中的应用

在分析GMSK基本原理的基础上，介绍了GMSK调制解调芯片FX589的特点，功能框图、工作原理及用FX589设计高新低通滤波器的方法，最后给出了FX589在无线数据通信中的应用实例。     

基于数字正交方式实现的一种GMSK调制

从GMSK调制原理出发,分析了GMSK信号的特征,依据正交调制理论,由CPM调制的公式推导出GMSK调制的载波相位和正交I、Q分量运算公式,并提出以DSP、FPGA、DUC为平台的GMSK调制算法实现方案.文中方案成功用于某测试仪项目,根据用户需求选择码元类型、码元速率、BTb值、载波频率等参数实现了GMSK调制信号的产生.     

GMSK调制解调器设计与FPGA实现

研究了GMSK(Gaussian Filtered Minimum Shift Keying,高斯最小频移键控)调制与解调技术的全数字实现方法。对GMSK调制与解调FPGA实现过程中的关键技术——高斯滤波器设计、CORDIC算法、FIR低通滤波器设计等进行重点研究。使用Simulink搭建GMSK调制解调的通信系统,并对实现算法进行研究验证,提出了全数字方法实现方案,并在FPGA上完成硬件实现,通过了功能仿真、时序仿真与板级验证。基于FPGA建立了AWGN信道,对整个设计进行板级验证,在ALTERA公司的EP2C8Q208N芯片上实现了低成本、易调试、可升级的全数字GMSK调制解调器。     

基于FPGA的GMSK调制设计研究

高斯滤波最小频移键控（GMSK）调制方式具有很好的频谱性能和恒包络特性,这两种特性使得GMSK在存在邻道干扰、非线性功率放大器的系统中具有很好的性能,并在Altera公司的CycloneII系列的FPGA上实现了设计,在此着重介绍了FPGA上滤波器的设计。     

Design and implementation of a DDS‐based multi‐carrier GMSK modulator

The design and hardware implementation of a multi‐carrier Gaussian minimum shift keying (GMSK) modulator, based on a direct digital synthesizer, suitable for global system for mobile (GSM) base station applications is described. The synthesizer does not only generate the baseband GMSK signal, but also delivers it at a low IF. Special care has been taken in order to minimize the required memory of the synthesizer. The hardware implementation is mainly based on a field programmable gate array device (FPGA) and a D/A converter. The number of carriers depends on the size of the FPGA. Finally, the hardware implementation of a two‐carrier modulator is given. Copyright © 2009 John Wiley & Sons, Ltd.     

All-digital reverse modulation architecture based carrier recoveryimplementation for GMSK and compatible FQPSK

A carrier recovery circuit implementation with an all-digital reverse modulation approach for coherent detection in the GSM/GMSK system as well as the GMSK compatible improved efficiency cross-correlated FQPSK system is presented. The proposed carrier recovery implementation utilizes all-digital reverse modulation circuit in a feedback loop to remove the modulated signal from the received intermediate frequency (IF) signal and to estimate the phase error of this carrier signal using a phase-locked loop (PLL). The digital reverse modulation approach avoids the multipliers required in an analog reverse modulation design, so that it can be implemented in a single chip FPGA. Hardware implementation of the coherent detection demonstrates that cross-correlated FQPSK is completely compatible with GMSK in the system performance and the receiver structure for GSM. Experimental performance evaluations show that the proposed carrier recovery circuit provides a Bit Error Rate (BER) performance within 0.3 dB in a non-linearly amplified channel corrupted by additive white Gaussian noise (AWCN) as compared with the simulated performance of the GSM/GMSK system     

Limiter discriminator-detected GMSK with FM and GMSK interferencein a land mobile channel

This paper addresses Gaussian minimum-shift keyed (GMSK) receiver performance analysis for limiter discriminator detection with cochannel interference resulting from a combined cellular voice and packet radio network. A specific example is cellular digital packet data (CDPD), which shares spectrum with cellular voice users; thus, the CDPD receiver will see both narrow-band frequency modulation (NBFM) voice and GMSK data interference. Previous studies investigated the performance of a GMSK receiver with a single GMSK interferer and multipath delay. In this paper, we extend earlier work to multiple Rayleigh fading (Doppler spread) interferers having NBFM (f_dm=12 kHz) analog modulation and/or GMSK modulation. Probability of bit-error expressions are derived for the frequency modulation (FM) and GMSK interferer cases assuming medium-to-high signal-to-noise ratio regions. For scenarios of from one to six NBFM interferers, having the same total power, a corresponding Gaussian approximation is within 1.5 dB. Simulation results are also presented for various combinations of FM and GMSK interference. FM interference is only slightly worse than GMSK interference. Delay spread representing an urban scenario resulted in only a slight increase in the error floor     

应用于2Mb/s GMSK调制的CMOS低功耗全差分Sigma-Delta频率综合器

设计了应用于GMSK调制,工作在2.4GHz,CMOS全差分的∑-△频率综合器.调制器中采用预补偿的分数N锁相环.推导了Ⅱ型三阶锁相环的传输函数,并指出影响环路传输函数的重要参数.介绍了校准重要的环路参数的方法.锁相环设计中采用差分调节的LC压控振荡器和全差分的电荷泵.设计的电路利用0.18μm 1P6M CMOS工艺进行仿真.由于锁相环的组成模块中采用了低功耗设计,锁相环的功耗仅为11mW左右,调制器的数据率达到2Mb/s.     

A multicarrier GMSK modulator

A multicarrier Gaussian minimum shift keying (GMSK) modulator has been developed and implemented. The design contains four GMSK modulators, which generate GMSK modulated carriers at the specified center frequencies. Utilization of the redundancy in the stored waveforms reduces the size of the GMSK trajectory look-up table to less than one-quarter of the original size in the modulator. Conventionally, the power ramping and output power level controlling are performed in the analog domain. A novel digital ramp generator and output power level controller perform both the burst ramping and the dynamic power control in the digital domain. The power control is realized by scaling the ramp curve, which follows a raised cosine/sine curve. The four GMSK modulated signals are combined together in the digital domain. The digital multicarrier GMSK modulator is designed to fulfil the spectrum and phase error specifications of the GSM 900 and DCS 1800 base stations     

基于FPGA的GMSK数字调制的设计和实现

目前GSM（全球移动通信系统）是世界上最广泛的移动通讯标准,其全球漫游功能和开放的系统是移动通信平台最佳的选择之一。GSM中采用了GMSK（高斯最小频移键控）调制方式,GMSK调制包络恒定,具有较高的频谱利用率。文中介绍了无线移动通信中广泛应用的GMSK数字调制方法。给出了该系统的FPGA（现场可编程门阵列）数字调制框图,并且基于FPGA开发软件ISE（集成软件环境）进行开发,最后通过仿真软件Modelsim对该系统进行仿真,最终得到满意的效果。     

A Novel Serially Concatenated GMSK System for Satellite Communications

A novel serially concatenated GMSK system is proposed for satellite communications subject to low SNR, limited power and spectrum resources. First, we design a Nonrecursive continuous-phase encoder (NRCPE) based GMSK based on the Rimoldi's decomposition. Then, a corresponding pilot-aided quasi-coherent demodulation algorithm is developed, whose basic principle is that a modified BCJR-based detection performs on the received signals with initial and ending trellisstates being determined using the very limited pilot overhead. Finally, we choose proper modulation parameters for the NRCPE based Gaussian minimum shift keying GMSK signaling according to the trade-offs between the power and spectral efficiency. The simulation results show that the LDPC coded GMSK system using the proposed algorithm can achieve excellent performance and can also work well in the presence of the large Doppler shifts and some burst errors.