All-optical filter for simultaneous implementation of microwave bandpass and notch responses based on semiconductor optical amplifier

An all-optical filter structure to simultaneously implement microwave bandpass and notch filter is proposed and experimentally demonstrated. The structure is based on a recirculating delay line (RDL) loop consisting of a semiconductor optical amplifier (SOA) followed by a tunable narrowband optical filter and a 10:90 coupler. The converted signal is generated in a wavelength conversion process based on cross-gain modulation of amplified spontaneous emission in the SOA. The converted signal circulating in RDL loop realizes a negative bandpass response. The negative bandpass filter and a broadband allpass filter are synthesized to achieve a notch filter with flat passband which can excise interference with minimal impact on the wanted signal.     

新型通用雷达侦察信号处理硬件平台

信号处理机是雷达侦察设备的重要组成部分,提高其工作性能、处理能力、可靠性,应用灵活性、通用性、标准化,以及减小体积、降低功耗都具有极其重要的意义。首先介绍信号处理硬件平台的现状及需求,然后提出了一种基于CPCI标准由TMS320C6455双DSP加FPGA通用信号处理平台的设计方案,并详细讨论了该平台的硬件组成、工作原理、特点以及实现方法。     

Suppression of Coherent Interference Effect in an Optical Delay Line Signal Processor Using a Single Tone Phase Modulation Technique

A new technique that can suppress the coherent interference effect in an optical delay line signal processor is presented. It is based on single tone phase modulation of the optical carrier to translate the phase-induced intensity noise at baseband into high frequencies. This technique enables a narrow-linewidth telecommunication-type laser to be used as an optical source for a delay line signal processor with robust operation. It has the advantage of not affecting the signal processor and the link configurations. Experimental results demonstrate a robust delay line notch filter frequency response using a narrow-linewidth optical source.      

Noise analysis of an amplified fiber-optic recirculating-ring delayline

We present the first theoretical and experimental noise analysis of a fiber-optic recirculating-ring delay line (RDL) including a doped fiber amplifier to compensate for the roundtrip loss. Both thermal-like sources and laser sources are considered. The output source induced noise (signal-signal beat noise), signal-spontaneous (s-sp) beat noise, and spontaneous-spontaneous (sp-sp) beat noise spectra for a thermal-like source are calculated from the autocorrelation function of the output detector current. It is shown that all three electrical beat noise spectra can be expressed as correlations of the output optical signal and ASE spectra. The source-induced noise will normally be the dominating noise source, but in some applications, the other noise terms also will be of importance. We use our theory to define the maximum number of recirculations in an amplified RDL with a pulsed source, where the fundamental noise floor is determined by the sp-sp beat noise     

面向异构信号处理平台的负载均衡算法

针对当前异构信号处理平台中信号处理应用的调度算法优化目标单一且调度结果中处理器负载不均衡的问题,提出了一种基于蚁群优化算法的负载均衡算法。该算法结合蚁群优化算法的快速搜索能力和组合优化能力,以信号处理应用的调度长度和处理器负载均衡为优化目标,对初始信息素矩阵和蚂蚁的遍历顺序进行改进,提出调度长度启发因子和负载均衡启发因子对处理器选择公式进行改进,利用轮盘赌策略确定信号处理应用各子任务分配的处理器,完成信号处理应用的调度。仿真结果表明,该算法得到调度结果在调度长度和负载均衡方面均有改进,可以充分发挥各处理器性能,提高异构信号处理平台的整体效率。     

Sequential Multistate EMG Signal Processor

A feature of multifunction EMG control is that the operator is always aware when a decision is made. Thus, a sequential processor which observes the EMG signal for the length of time necessary to make a reliable decision would be a logical one. In this paper, two sequential processors are developed for the EMG signal. Exact expressions for the processor performance, error probability, and the average number of samples required to make a decision are derived. The two processors are modeled on a computer and verified experimentally. Both the theoretical and experimental results show that compared to an optimal Bayes receiver the sequential processor, for a given efror probability, requires, on the average, approximately half the number of samples. Finally, a proof is given for the optimum signal set and this set is used in the paper.     

带宽变换的基带信号产生器实现

软件无线电体现了无线电设计模式的重大变化，其很多功能是由可编程的信号处理器件来实现的。利用大规模的集成电路技术，基于FPGA和DSS相结合，设计一种带宽可转换的，具有可编程的基带信号产生器。通过控制器读取数据的速率来控制信号带宽，达到信号带宽可调的目的。     

高性能通用DSP寄存器扩展设计实现方法

本文提出一种高性能通用DSP扩展寄存器的设计及实现方法,该方法是我国自主研发的高性能通用DSP中实现寄存器堆扩展的一种新方法,其优点是在不影响现有指令集及指令机器码位宽的前提下,实现对处理器内部寄存器堆的成比例扩展。通过在我国自主研制DSP上的实际应用,证明了该扩展方法的有效性和实用性。     

某雷达信号处理机调试台的设计

在雷达系统中,信号处理机是核心部件之一,其性能参数及可靠性直接影响到雷达系统的性能。怎样全面系统测试信号处理机,是我们关心的问题。本文介绍了一种有效的信号处理机测试平台的设计。     

风振对OPGW偏振态和通信的影响

光纤复合架空地线(OPGW)中光信号的偏振态会因风振而改变,进而导致系统性能的劣化.为了了解风振对OPGW偏振态的影响,通过实验模拟了在不同摆动情况下OPGW的偏振态变化,并基于所测试的数据分析了偏振态的变化规律和风振对相干光通信的影响,给出了相干光通信系统中所需要补偿算法的计算依据.实验结果表明:2种风振导致的信号光...     

风廓线雷达信号处理机设计与实现

建立一种雷达信号处理机双DSP＋FPGA系统架构，对风廓线雷达信号处理机的功能和软硬件设计作了详细讨论。通过对系统的研制实践表明：基于一体化设计思想，采用模块化的硬件系统设计和功能化的应用软件设计是快速开发现代信息处理设备的有效方法。     

A High-Speed Microprogrammable Digital Signal Processor Employing Distributed Arithmetic

This paper describes a gesteral-purpose digital-signal processor which is constructed with 4 bit bipolar microprocessor slices. The signal processor is microprogrammable and contains special features which allow it to employ distributed arithmetic. Hence, the processor can achieve high sampling rates without using a hardware multiplier unit. The processor's architecture is presented and its micro-order structure is examined. The processor wordlength is 16 bit; its basic cycle time, 300 ns; its data memory size, 2K words; its control store size, 256 x 56 bits. It consumes 48 W of power and has special address processing hardware. Experimental results with a twelfth-order digital filter are demonstrated. The signal processor is also compared with several other signal processors of its class described in the literature.     

Timing Jitter Reduction by All-Optical Signal Regeneration Using a Polarization Bistable VCSEL

All-optical signal regeneration is experimentally demonstrated using a polarization bistable vertical-cavity surface-emitting laser. The retiming operation of signal regeneration is performed by using an AND gate operation and a reset operation. An optical clock pulse and input data signal are used for the AND gate operation. The timing jitter of the regenerated signal is reduced by optimizing the injection power ratio of the clock pulse and the data signal. The retiming operation is analyzed using a simple model that includes random fluctuation of the polarization switching threshold and bandwidth limitation of the response to the injection light.      

一种新颖的单片集成红外传感信号处理器

介绍一种新颖的单片集成红外传感信号处理器。这种处理器能与多种红外传感器匹配 ,对接收到的传感信号进行处理 ,产生控制信号 ,快速启动各类装置 ,实现自动控制。芯片设计中采用多种抗噪声和低功耗设计技术。本处理器用 1 .2μm双层多晶双层金属 N阱 CMOS工艺实现 ,芯片总面积 2 .7mm2 ,电源电压 5 V时的静态电流为 1 .2 m A,封装后样品测试结果获得设计预期的功能和性能     

An Efficient Adaptive Polarimetric Processor with an Embedded CFAR

To improve the detection performance of surveillance radars with polarization diversity, we developed an adaptive polarimetric processor and compared it with other polarimetric processors. We derived our adaptive polarimetric processor, called the polarization discontinuity detector (PDD), from the generalized likelihood ratio (GLR) test principle for the unspecified target component. We derived closed‐form expressions of its probabilities of detection and false alarm, and compared its performance to that of the adaptive polarization canceller (APC) and Kelly's GLR processor. The PDD had a performance similar to Kelly's GLR in Gaussian clutter, and both the PDD and Kelly's GLR, which have embedded constant false alarm rates (CFARs), outperformed the APC, especially when the target polarization state was close to the clutter's polarization state. The important difference is that the PDD is much simpler than Kelly's GLR for hardware/software implementation, because the PDD does not require a costly two‐parameter filter bank to cover the unknown target polarization state as Kelly's GLR does.     

基于CORDIC算法的雷达信号坐标变换处理器

在雷达光栅显示系统中,将回波信号实时地转换成光栅扫描图形显示信号是其中的关键技术,而雷达回波信号从极坐标到直角坐标的变换是决定系统性能的关键。提出了一种以全流水ＣＯＲＤＩＣ算法为基础的雷达信号坐标变换处理器,并介绍了用ＦＰＧＡ实现的过程及结果。     

一种实用的红外弱小目标检测跟踪处理机研究

以小波变换作为对红外弱小目标进行检测识别的核心算法，并根据该算法搭建了基于FPGA和DSP的红外信号处理器的硬件平台。该平台在FPGA上实时完成了离散小波变换算法，可用于检测弱小目标，并通过DSP实现了稳定地跟踪。结果表明，该设计的方案对红外弱小目标的检测识别和跟踪具有实际意义。     

基于数字信号处理的集成光学陀螺信号检测方法

集成光学陀螺的输出信号叠加了多种噪声成分,干扰了有用信息的检测.根据集成光学陀螺输出信号的特点,提出了一种在高速数字信号处理器组成的数字系统中,利用数字滤波器及互相关理论,对集成光学陀螺的含噪声信号进行处理的方法.结果表明在信噪比为10 dB的情况下,该技术可以将信号误差基本控制在3%以下,实现了复杂噪声环境下集成光学陀螺系统信号的检测.     

一种提高遥测信号处理器测试性方法

针对遥测信号处理器的设计原理,增加少量硬件电路,利用其自身FPGA剩余逻辑资源完成自检模块设计,实现了信号处理器BIT测试功能,提高了信号处理器在挂机状态下的测试覆盖率和故障检测率。     

Multichannel Signal Processing Based on Logic Averaging

The multichannel signal processor described provides an excellent capability for the detection of any kind of signal, on-line, with a SNR of 0.1 dB at a wide frequency range. This very efficient and inexpensive approach to improving the SNR by the processor wiUl reduce the need for other signal processing techniques. The processor's reaction on an input signal and noise has been analyzed by a mathematical model. This effect is IMustrated by an in vivo noninvasive detection on a beat-by-beat basis of electrical activity of the His?Purkinje system of the heart, and the detection of a pulse-like signal from a generator.