A 2 V 1.8 GHz fully integrated CMOS dual-loop frequency synthesizer

A 2 V 1.8 GHz fully integrated CMOS dual-loop frequency synthesizer is designed in a standard 0.5 /spl mu/m digital CMOS process for wireless communication. The voltage-controlled oscillator (VCO) required for the low-frequency loop is designed using a ring-type VCO and achieves a tuning range of 89% from 356 to 931 MHz and a phase noise of -109.2 dBc/Hz at 600 kHz offset from 856 MHz. With an active chip area of 2000/spl times/1000 /spl mu/m/sup 2/ and at a 2 V supply voltage, the whole synthesizer achieves a tuning range from 1.8492 to 1.8698 GHz in 200 kHz steps with a measured phase noise of -112 dBc/Hz at 600 kHz offset from 1.86 GHz. The measured settling time is 128 /spl mu/s and the total power consumption is 95 mW.     

Low-Phase Noise Hartley Differential CMOS Voltage Controlled Oscillator

This letter presents a novel Hartley low phase noise differential CMOS voltage-controlled oscillator (VCO). The low noise CMOS VCO has been implemented with the TSMC 0.18-mum 1P6M CMOS technology and adopts full PMOS to achieve a better phase noise performance. The VCO operates from 4.02 to 4.5GHz with 11.3% tuning range. The measured phase noise at 1-MHz offset is about -119dBc/Hz at 4.02GHz and 122dBc/Hz at 4.5GHz. The power consumption of the VCO core is 6.75mW     

A 5-GHz low phase noise differential colpitts CMOS VCO

A low noise 5-GHz differential Colpitts CMOS voltage-controlled oscillator (VCO) is proposed in this letter. The Colpitts VCO core adopts only PMOS in a 0.18-/spl mu/m CMOS technology to achieve a better phase noise performance since PMOS has lower 1/f noise than NMOS. The VCO operates from 4.61 to 5 GHz with 8.3% tuning range. The measured phase noise at 1-MHz offset is -120.42 dBc/Hz at 5 GHz and -120.99 dBc/Hz at 4.61 GHz. The power consumption of the VCO core is only 3 mW. To the authors' knowledge, this differential Colpitts CMOS VCO achieves the best figure of merit (FOM) of 189.6 dB at 5-GHz band.     

A novel complementary Colpitts differential CMOS VCO with low phase noise performance

A low phase noise Ka-band CMOS voltage-controlled oscillator is proposed in this paper. A new complementary Colpitts structure was adopted in a 0.18-μm CMOS process to achieve differential-ended outputs, low phase-noise performance, and low-power consumption. The designed VCO oscillates from 29.8 to 30 GHz with 200 MHz tuning range. The measured phase noise at 1-MHz offset is −109 dBc/Hz at 30 GHz and −105.5 dBc/Hz at 29.8 GHz. The power consumption of VCO is only 27 mW. In addition, compared with the published papers, the proposed CMOS VCO achieves the best figure of merit (FOM) of −185 dB at 29.95-GHz band.     

5-GHz CMOS LC VCOs with wide tuning ranges

A 4.8-GHz LC voltage-controlled oscillator (VCO) optimized for maximum tuning range was designed and fabricated using 0.25-/spl mu/m 1P5M CMOS process. The optimized design used an inverse proportionality between the two parasitic capacitances of the inductor and the MOS transistors for minimizing the parasitic capacitance at the oscillation node. The fabricated LC VCO has a wide tuning range of 20.3% from 4.32 GHz to 5.3 GHz with a power dissipation of 7.3 mW. This tuning range performance is comparable to, or better than, those of the reported CMOS LC VCOs in 5-GHz band. The measured phase noise is -82 dBc/Hz and -114.6 dBc/Hz at 100 KHz and 1-MHz offset, respectively.     

A low-noise, 900-MHz VCO in 0.6-μm CMOS

This paper describes a low-noise, 900-MHz, voltage-controlled oscillator (VCO) fabricated in a 0.6-μm CMOS technology. The VCO consists of four-stage fully differential delay cells performing full switching. It utilizes dual-delay path techniques to achieve high oscillation frequency and obtain a wide tuning range. The VCO operates at 750 MHz to 1.2 GHz, and the tuning range is as large as 50%. The measured results of the phase noise are -101 dBc/Hz at 100-kHz offset and -117 dBc/Hz at 600-kHz offset from the carrier frequency. This value is comparable to that of LC-based integrated oscillators. The oscillator consumes 10 mA from a 3.0-V power supply. A prototype frequency synthesizer with the VCO is also implemented in the same technology, and the measured phase noise of the synthesizer is -113 dSc/Hz at 100-kHz offset     

A 0.6 V, 4.32 mW, 68 GHz Low Phase-Noise VCO With Intrinsic-Tuned Technique in 0.13 $mu$m CMOS

An intrinsic-tuned, 68 GHz voltage controlled oscillator (VCO) without an extra on-chip accumulation-mode metal oxide semiconductor (MOS)-varactor is demonstrated in a standard, 0.13 mum CMOS technology. This VCO exhibits phase noises of -98.4 dBc/Hz and -115.2 dBc/Hz at 1 and 10 MHz offset, respectively, along with a tuning range of 4.5 % even under a small power consumption of 4.32 mW. Besides, the highest figure-of-merit (taking frequency tuning range into account) of -182 dBc/Hz under the 1 MHz offset condition is achieved among all previously reported >60 GHz CMOS-based VCOs, which is attributed to the proposed intrinsic tuning mechanism.     

A wideband frequency synthesizer for a receiver application at multiple frequencies

An integer-N frequency synthesizer for a receiver application at multiple frequencies was implemented in 0.18 μm IP6M CMOS technology. The synthesizer generates 2.57 GHz, 2.52 GHz, 2.4 GHz and 2.25 GHz local signals for the receiver. A wide-range voltage-controlled oscillator (VCO) based on a reconfigurable LC tank with a binary-weighted switched capacitor array and a switched inductor array is employed to cover the desired frequencies with a sufficient margin. The measured tuning range of the VCO is from 1.76 to 2.59 GHz. From the carriers of 2.57 GHz,2.52 GHz, 2.4 GHz and 2.25 GHz, the measured phase noises are -122.13 dBc/Hz, -122.19 dBc/Hz, -121.8 dBc/Hz and -121.05 dBc/Hz, at 1 MHz offset, respectively. Their in-band phase noises are -80.09 dBc/Hz, -80.29 dBe/Hz,-83.05 dBc/Hz and -86.38 dBc/Hz, respectively. The frequency synthesizer including buffers consumes a total power of 70 Mw from a 2 V power supply. The chip size is 1.5 × 1 mm~2.     

A Wide Tuning Range 69 GHz Push-Push VCO Using 0.18 CMOS Technology

A wide tuning range V-band push-push CMOS voltage controlled oscillator (VCO) is proposed in this study. A new core complementary Colpitts structure was adopted in a 0.18 $mu{rm m}$ CMOS process to reduce dc power consumption and to improve tuning range owing to the reduction weighting of FET induced capacitance of L-C tank. The designed VCO oscillates from 64.2 to 69.4 GHz with a 5.2 GHz tuning range under a control voltage range of 1.2 V. The measured phase noise at 1 MHz offset is $-76.23~ {rm dBc}/{rm Hz}$ at 69.39 GHz. The power consumption of the VCO core is only 27.52 mW.      

频率覆盖3.2～6.1 GHz的CMOS LC VCO

通过提高MIM电容的调整范围,实现了一个覆盖3.2～6.1 GHz的CMOS LC VCO.该VCO使用0.18μm射频CMOS工艺制作,芯片面积约为1260μm×670μm.当输出5.5GHz时,VCO内核消耗功率为17.5mW;在100kHz频偏处的相位噪声是～101.67dBc/Hz.     

一种用于双波段GPS接收机的低功耗宽带CMOS频率合成器

提出了一种用于双波段GPS接收机的宽带CMOS频率合成器.该GPS接收机芯片已经在标准O.18μm射频CMOS工艺线上流片成功,并通过整体功能测试.其中压控振荡器可调振荡频率的覆盖范围设计为2～3.6GHz,覆盖了L1,L2波段的两倍频的频率点.并留有足够的裕量以确保在工艺角和温度变化较大时能覆盖所需频率.芯片测试结果显示,该频率综合器在L1波段正常工作时的功耗仅为5.6mW,此时的带内相位噪声小于-82dBc/Hz,带外相位噪声在距离3.142G载波1M频偏处约为-112dBc/Hz,这些指标很好地满足了GPS接收芯片的性能要求.     

2GHz低功耗差分控制的CMOS单片LC压控振荡器

设计了工作在2GHz,差分控制的单片LC压控振荡器,并利用0.18μm CMOS工艺实现.利用模拟和数字(4位二进制开关电容阵列)调频技术,压控振荡器的调频范围达到16.15%(1.8998～2.2335GHz).在2.158GHz工作频率下,在1MHz频偏处的相位噪声为-118.17dBc/Hz.应用给出的开关设计,相位噪声在不同的数字位控制下变化不超过3dB.由于利用pn结二级管作为变容管,在调频范围内,相位噪声仅改变约2dB.压控振荡器在1.8V电源电压下消耗2.1mA电流并能够在1.5V电源电压下正常工作.     

Dual-band ultra-wide tuning range CMOS voltage-controlled oscillator

A dual-band wide-tuning range LC CMOS voltage controlled oscillator (VCO) topology is proposed. Dual-band operation is realised by employing a double-tuned double-driven transformer as a resonator. The proposed approach eliminates MOS switches, which are typically used in multi-standard oscillators, and thus improves phase noise and tuning range characteristics. The concept is demonstrated through the design of an LC VCO in a standard 0.18 mum CMOS process. Two frequency bands are realised (2.4 and 6 GHz) with 740 MHz tuning range in the first band and 1.56 GHz tuning range in the second band. Operating from a 1.8 V supply, the VCO has a simulated phase noise of -119 dBc/Hz in the 2.4 GHz band and -110 dBc/Hz in the 6 GHz band at 600 KHz offset from the carrier     

准恒定压控增益的压控振荡器设计

在DRM DAB系统设计中,压控振荡器需要满足宽的调频范围,而其压控增益的差别需要控制在一定的范围内,以使得锁相环的稳定性得到提高,同时为了降低锁相环环路对噪声的敏感性,我们需要低的压控增益。据此,本文所采用的可变电容阵列结构有效地满足了上述要求,使用SMIC 0.18μm CMOS工艺,仿真得到的结果显示在1.71G振荡频率1MHZ频偏处的相位噪声为-124.3d Bc/Hz.压控范围为1.71-2.31GHz。     

A 900-MHz 1.5-V CMOS voltage-controlled oscillator using switched resonators with a wide tuning range

A 900-MHz fully integrated VCO was fabricated in a 0.18-/spl mu/m foundry CMOS process. Under 1.5 V power supply, this VCO can be tuned from 667 MHz to 1156 MHz which corresponds to a 53.6% tuning range. The VCO has nearly constant phase noise over the whole tuning frequency, credit to the switched resonators used in this VCO. The phase noise at a 600 kHz offset is -123.1 dBc/Hz at 1125 MHz center frequency and -124.2 dBc/Hz at 667 MHz center frequency.     

单片CMOS UHF RFID阅读器中低噪声LC VCO的设计

设计了一种应用于单片CMOS超高频射频识别阅读器中的低功耗、低相位噪声LC VCO。根据超高频射频识别阅读器的系统架构和协议要求,对本振相位噪声要求做出详细讨论;采用LC滤波器和低压差调压器分别对尾电流源噪声和电源噪声进行抑制,提高了VCO相位噪声性能。电路采用IBM 0.18μm RF CMOS工艺实现,电源电压3.3 V时,偏置电流为4.5 mA,中心频率为1.8 GHz,在频偏1 MHz处,相位噪声为-136.25 dBc/Hz,调谐范围为30%。     

A 1.8-2.6 GHz CMOS VCO with switched capacitor array and switched inductor array

The design of a 1.76-2.56 GHz CMOS voltage-controlled oscillator(VCO)with switched capacitor array and switched inductor array is presented.Fabricated in 0.18μm 1P6M CMOS technology,the VCO achieves a 37% frequency tuning range.The measured phase noise varies between-118.5 dBc/Hz and-122.8 dBc/Hz at 1 MHz offset across the tuning range.Power consumption is about 14.4 mW with a 1.8 V supply.Based on a reconfigurable LC tank with switched capacitor array and switched inductor array,the mnmg range is analyzed and derived in terms of design parameters,yielding useful equations to guide the circuit design.     

一种LC全集成、具有对称噪声滤波及宽调节范围的4.8GHz CMOS平衡振荡器

将对称噪声滤波技术应用到4.8GHz LC全集成VCO设计中.该VCO具有很低的相位噪声以及716MHz的调节范围,在SMIC 0.25μm单层多晶、五层金属、n阱 RF CMOS工艺上实现,在2.5V电源电压下工作电流仅为6mA,与常规VCO比较,在相同条件下,噪声性能改善了6dBc/Hz.芯片测试结果表明,在偏离4.8GHz载波1MHz的地方相位噪声为-123.66dBc/Hz,该设计在锁相环及其他消费类电子产品中有广泛应用.     

9.3-10.4-GHz-band cross-coupled complementary oscillator with low phase-noise performance

A fully integrated 10-GHz-band voltage-controlled oscillator (VCO) has been designed and fabricated using commercial 0.18-/spl mu/m CMOS technology. The complementary cross-coupled differential topology is adopted in the design. The measured phase-noise is around -89 dBc/Hz at the offset frequency of 100 kHz from the center frequency of 9.83 GHz, the output frequency tuning range of the fabricated VCO is 1.1 GHz ranging from 9.3 to 10.4 GHz, and the power consumption of the core VCO circuit is 5.8 mW. The design is the first one that adopts the complementary cross-coupled circuit structure for 10-GHz-band oscillators, and whose performances of the VCO are the best ones for 10-GHz-band oscillators, compared with the 10-GHz-band CMOS oscillators reported earlier.     

A low-phase-noise and low-power multiband CMOS voltage-controlled oscillator

A low voltage multiband all-pMOS VCO was fabricated in a 0.18-/spl mu/m CMOS process. By using a combination of inductor and capacitor switching, four band (2.4, 2.5, 4.7, and 5 GHz) operation was realized using a single VCO. The VCO with an 1-V power supply has phase noises at 1-MHz offset from a 4.7-GHz carrier of -126 dBc/Hz and -134 dBc/Hz from a 2.4-GHz carrier. The VCO consumes 4.6 mW at 2.4 and 2.5 GHz, and 6 mW at 4.7 and 5 GHz, respectively. At 4.7 GHz, the VCO also achieves -80 dBc/Hz phase noise at 10-kHz offset with 2 mW power consumption.