Carrier Type Control of WSe2 Field‐Effect Transistors by Thickness Modulation and MoO3 Layer Doping

Control of the carrier type in 2D materials is critical for realizing complementary logic computation. Carrier type control in WSe₂ field‐effect transistors (FETs) is presented via thickness engineering and solid‐state oxide doping, which are compatible with state‐of‐the‐art integrated circuit (IC) processing. It is found that the carrier type of WSe₂ FETs evolves with its thickness, namely, p‐type (<4 nm), ambipolar (≈6 nm), and n‐type (>15 nm). This layer‐dependent carrier type can be understood as a result of drastic change of the band edge of WSe₂ as a function of the thickness and their band offsets to the metal contacts. The strong carrier type tuning by solid‐state oxide doping is also demonstrated, in which ambipolar characteristics of WSe₂ FETs are converted into pure p‐type, and the field‐effect hole mobility is enhanced by two orders of magnitude. The studies not only provide IC‐compatible processing method to control the carrier type in 2D semiconductor, but also enable to build functional devices, such as, a tunable diode formed with an asymmetrical‐thick WSe₂ flake for fast photodetectors.     

全耗尽异质栅单Halo SOI MOSFET二维模型

为了抑制深亚微米SOI MOSFET的短沟道效应,并提高电流驱动能力,提出了异质栅单Halo SOI MOSFET器件结构,其栅极由具有不同功函数的两种材料拼接而成,并在沟道源端一侧引入Halo技术.采用分区的抛物线电势近似法和通用边界条件求解二维Poisson方程,为新结构器件建立了全耗尽条件下的表面势及阈值电压二维解析模型.对新结构器件与常规SOI MOSFET性能进行了对比研究.结果表明,新结构器件能有效抑制阈值电压漂移、热载流子效应和漏致势垒降低效应,并显著提高载流子通过沟道的输运速度.解析模型与器件数值模拟软件MEDICI所得结果高度吻合.     

A three dimensional semiconductor device simulator for GaAs/AlGaAsheterojunction bipolar transistor analysis

A three-dimensional semiconductor device simulator was developed to study the steady-state characteristics of heterostructure compound semiconductor devices. The semiconductor partial differential equations-Poisson's equation and the two carrier transport equations-are solved using finite-difference discretization. The Gummel iteration method and indirect space matrix solution techniques are utilized for minimizing computation time and memory requirements. This simulator was applied to the analysis of heterojunction bipolar transistors. The effect of emitter grading on the current-voltage characteristic is demonstrated. A comparison between two- and three-dimensional simulations is also presented. The results show that three-dimensional analysis is indispensable, in particular for devices of small geometry     

用三维蒙特卡罗模拟栅-源/漏不对准对体硅FinFET器件性能的影响

We investigate the influence of gate-source/drain(G-S/D) misalignment on the performance of bulk fin field effect transistors(FinFETs) through the three-dimensional(3D) full band Monte Carlo simulator.Several scattering mechanisms,such as acoustic and optical phonon scattering,ionized impurity scattering,impact ionization scattering and surface roughness scattering are considered in our simulator.The influence of G-S/D overlap and underlap on the on-states performance and carrier transport of bulk FinFETs are mainly discussed in our work.Our results show that the on-states currents increase with the increment of G-D/S overlap length and the positions of a potential barrier and average electron energy maximum vary with the G-D/S overlap length.The carrier transport phenomena in bulk FinFETs are due to the effect of scattering and the electric field in the overlap/underlap regime.     

Influence of lattice self-heating and hot-carrier transport ondevice performance

As device technologies improve, the traditional drift-diffusion transport model becomes inadequate to predict the performance of state-of-the-art semiconductor devices. The reasons are believed to be the larger field and field gradient inside advanced devices which cause lattice heating and hot carrier nonlocal transport phenomena. For more accurate prediction on device performance, a new device simulator capable of full thermodynamic simulation was developed. The carrier and carrier energy transport equations are directly derived from the Boltzmann transport equation, and the energy transfer among electrons, holes and crystal lattice takes into account most of the possible mechanisms. This simulator was used to simulate the DC behavior of a BJT and a half-micron NMOS. The simulation results show that for advanced devices, not only the drift-diffusion model becomes inadequate, but including only one of the two thermal effects results in error in simulated device characteristics     

Two-dimensional analytical threshold voltage model for DMG Epi-MOSFET

A two-dimensional (2-D) analytical model of a dual material gate (DMG) epitaxial (Epi)-MOSFET for improved, SCEs, hot electron effects, and carrier transport efficiency is presented. Using a two-region polynomial potential distribution and a universal boundary condition, we calculated the 2-D potential and electric field distribution along the channel. An expression for threshold voltage for short-channel DMG Epi-MOSFETs is also derived. The ratio of gate lengths has been varied to show which gate length ratio gives the best performance. The analytical results have been validated by the 2-D device simulator ATLAS over a wide range of device parameters and bias conditions.     

Physics-based analytical modeling of potential and electrical field distribution in dual material gate (DMG)-MOSFET for improved hot electron effect and carrier transport efficiency

We propose a new two-dimensional (2-D) analytical model of a dual material gate MOSFET (DMG-MOSFET) for reduced drain-induced barrier lowering (DIBL) effect, merging two metal gates of different materials, laterally into one. The arrangement is such that the work function of the gate metal near the source is higher than the one near the drain. The model so developed predicts a step-function in the potential along the channel, which ensures screening of the drain potential variation by the gate near the drain. The small difference of voltage due to different gate material keeps a uniform electric field along the channel, which in turn improves the carrier transport efficiency. The ratio of two metal gate lengths can be optimized along with the metal work functions and oxide thickness for reducing the hot electron effect. The model is verified by comparison to the simulated results using a 2-D device simulator ATLAS over a wide range of device parameters and bias conditions.     

Characteristics of InGaP/InGaAs pseudomorphic high electron mobility transistors with triple delta-doped sheets

Fundamental and insightful characteristics of InGaP/InGaAs double channel pseudomorphic high electron mobility transistors (DCPHEMTs) with graded and uniform triple δ-doped sheets are coomprehensively studied and demonstrated. To gain physical insight, band diagrams, carrier densities, and direct current characteristics of devices are compared and investigated based on the 2D semiconductor simulator, Atlas. Due to uniform carrier distribution and high electron density in the double InGaAs channel, the DCPHEMT with graded triple δ-doped sheets exhibits better transport properties, higher and linear transconductance, and better drain current capability as compared with the uniformly triple δ-doped counterpart. The DCPHEMT with graded triple δ-doped structure is fabricated and tested, and the experimental data are found to be in good agreement with simulated results.     

Current transport across a grain boundary in polycrystalline semiconductors

A unified approach to current transport across a grain boundary in polycrystalline semiconductors is developed. The resulting expressions for potential barrier and J-V characteristics are of general validity, in contrast to the many derivations of previous models, each with its own conditions of validity. The study concentrates on the carrier-trapping effect, and the trapping-state density can be monoenergetic, continuous, gaussian, or any reasonable distribution. By solving Possion's equation under suitable boundary conditions without the depletion approximation, a single formulation is obtained for potential barriers in two adjacent grains with different sizes and doping levels. The grain-boundary scattering effect is approximated as a rectangular potential barrier. The voltage division of an applied bias across the junction is determined under the current-continuity conditions. A single expression with suitable computational simplicity is then presented for the J-V characteristics across the many-valley semiconductor/grain-boundary/semiconductor junction. It uses the generalized WKB approximation and Fermi-Dirac statistics, and also considers the ellipsoidal energy surfaces of different valleys. All the thermionic, thermionic-field, and field emissions are included. As a result, the approach is valid for many-balley semiconductor materials over a wide range of temperatures, trapping-state density distributions, doping concentrations, grain sizes, and crystalline orientations.     

Solution‐Processed Monolayer Organic Crystals for High‐Performance Field‐Effect Transistors and Ultrasensitive Gas Sensors

This work innovatively develops a dual solution‐shearing method utilizing the semiconductor concentration region close to the solubility limit, which successfully generates large‐area and high‐performance semiconductor monolayer crystals on the millimeter scale. The monolayer crystals with poly(methyl methacrylate) encapsulation show the highest mobility of 10.4 cm² V^?1 s^?1 among the mobility values in the reported solution‐processed semiconductor monolayers. With similar mobility to multilayer crystals, light is shed on the charge accumulation mechanism in organic field‐effect transistors (OFETs), where the first layer on interface bears the most carrier transport task, and the other above layers work as carrier suppliers and encapsulations to the first layer. The monolayer crystals show a very low dependency on channel directions with a small anisotropic ratio of 1.3. The positive mobility–temperature correlation reveals a thermally activated carrier transport mode in the monolayer crystals, which is different from the band‐like transport mode in multilayer crystals. Furthermore, because of the direct exposure of highly conductive channels, the monolayer crystal based OFETs can sense ammonia concentrations as low as 10 ppb. The decent sensitivity indicates the monolayer crystals are potential candidates for sensor applications.     

Deconvoluting Energy Transport Mechanisms in Metal Halide Perovskites Using CsPbBr3 Nanowires as a Model System

Understanding energy transport in metal halide perovskites is essential to effectively guide further optimization of materials and device designs. However, difficulties to disentangle charge carrier diffusion, photon recycling, and photon transport have led to contradicting reports and uncertainty regarding which mechanism dominates. In this study, monocrystalline CsPbBr₃ nanowires serve as 1D model systems to help unravel the respective contribution of energy transport processes in metal-halide perovskites. Spatially, temporally, and spectrally resolved photoluminescence (PL) microscopy reveals characteristic signatures of each transport mechanism from which a robust model describing the PL signal accounting for carrier diffusion, photon propagation, and photon recycling is developed. For the investigated CsPbBr₃ nanowires, an ambipolar carrier mobility of μ = 35 cm² V⁻¹ s⁻¹ is determined, and is found that charge carrier diffusion dominates the energy transport process over photon recycling. Moreover, the general applicability of the developed model is demonstrated on different perovskite compounds by applying it to data provided in previous related reports, from which clarity is gained as to why conflicting reports exist. These findings, therefore, serve as a useful tool to assist future studies aimed at characterizing energy transport mechanisms in semiconductor nanowires using PL.     

nextnano: General Purpose 3-D Simulations

nextnano is a semiconductor nanodevice simulation tool that has been developed for predicting and understanding a wide range of electronic and optical properties of semiconductor nanostructures. The underlying idea is to provide a robust and generic framework for modeling device applications in the field of nanosized semiconductor heterostructures. The simulator deals with realistic geometries and almost any relevant combination of materials in one, two, and three spatial dimensions. It focuses on an accurate and reliable treatment of quantum mechanical effects and provides a self-consistent solution of the Schrodinger, Poisson, and current equations. Exchange-correlation effects are taken into account in terms of the local density scheme. The electronic structure is represented within the single-band or multiband kldrp envelope function approximation, including strain. The code is not intended to be a ldquoblack boxrdquo tool. It requires a good understanding of quantum mechanics. The input language provides a number of tools that simplify setting up device geometry or running repetitive tasks. In this paper, we present a brief overview of nextnano and present four examples that demonstrate the wide range of possible applications for this software in the fields of solid-state quantum computation, nanoelectronics, and optoelectronics, namely, 1) a realization of a qubit based on coupled quantum wires in a magnetic field, 2) and 3) carrier transport in two different nano-MOSFET devices, and 4) a quantum cascade laser.     

Thermal Transport in 2D Semiconductors—Considerations for Device Applications

The discovery of graphene has stimulated the search for and investigations into other 2D materials because of the rich physics and unusual properties exhibited by many of these layered materials. Transition metal dichalcogenides (TMDs), black phosphorus, and SnSe among many others, have emerged to show highly tunable physical and chemical properties that can be exploited in a whole host of promising applications. Alongside the novel electronic and optical properties of such 2D semiconductors, their thermal transport properties have also attracted substantial attention. Here, a comprehensive review of the unique thermal transport properties of various emerging 2D semiconductors is provided, including TMDs, black‐ and blue‐phosphorene among others, and the different mechanisms underlying their thermal conductivity characteristics. The focus is placed on the phonon‐related phenomena and issues encountered in various applications based on 2D semiconductor materials and their heterostructures, including thermoelectric power generation and electron–phonon coupling effect in photoelectric and thermal transistor devices. A thorough understanding of phonon transport physics in 2D semiconductor materials to inform thermal management of next‐generation nanoelectronic devices is comprehensively presented along with strategies for controlling heat energy transport and conversion.     

Carrier mobility in two-dimensional disordered hopping systems

A model of the equilibrium 2D hopping mobility in a disordered organic semiconductor is formulated for arbitrary charge carrier densities and arbitrary temperatures. The calculated dependence of the 2D mobility upon inverse temperature is compared with experimental data obtained on 2D carrier transport in poly(3-hexylthiophene) thin film field-effect transistors.     

A note on the semiconductor current flow equations

The current flow equations for nondegenerate and degenerate semiconductors at low temperature are discussed in terms of the Boltzmann transport equation. It is shown that the diffusion current in an inhomogeneous but isotropic semiconductor must be expressed as q.D(r). ∇n(r) where n(r) is the carrier (electron) concentration and D(r) is a spatially varying diffusion "constant." Some formulas which have been given for semiconductor device parameters, i.e., the emitter efficiency for heavily doped transistors when expressed as a ratio of resistivities, could be rigorously developed if the diffusion current were expressible as q.∇[D(r)n(r)]. However, this form is not consistent with the transport equation from which D(r) can be defined and evaluated.     

温度梯度对GaN热压电pn结电学性能的影响

热感应产生的极化电势可以改变压电半导体结构内的力电物理量,这在人工智能、微机电系统(MEMS)中极具应用价值.文章针对温度梯度作用下的氮化镓(GaN)压电pn结,采用二维压电半导体多场耦合方程和精确的热电物理边界条件,数值分析了温度梯度改变对GaN热压电pn结内极化强度、电势、电场、载流子分布及电流等物理场的影响.结果表明:由于温度梯度场和极化电荷之间存在耦合,热压电pn结电学性能对温度梯度高度敏感,由温度改变产生的热感应极化电荷可以有效调节该结构的开启电压和载流子传输特性,这为操控与温度相关的智能异质结器件电流传输提供了新的方法和理论指导.     

Bipolar charge transport in organic field-effect transistors: Enabling high mobilities and transport of photo-generated charge carriers by a molecular passivation layer

High mobility bipolar charge carrier transport in organic field-effect transistors (OFETs) can be enabled by a molecular passivation layer and selective electrode materials. Using tetratetracontane as passivation layer bipolar transport was realised in the organic semiconductors copper-phthalocyanine, diindenoperylene, pentacene, TIPS-pentacene and sexithiophene and mobilities of up to 0.1 cm²/V s were achieved for both electrons and holes. Furthermore, the trap and injection behaviour was analysed leading to a more general understanding of the transport levels of the used molecular semiconductors and their limitations for electron and hole transport in OFETs. With this knowledge the transistor operation can be further improved by applying two different electrode materials and a light-emitting transistor was demonstrated.Additionally, the effect of illumination on organic field-effect transistors was investigated for unipolar and bipolar devices. We find that the behaviour of photo-excited electrons and holes depends on the interface between the insulator and the semiconductor and the choice of contact materials. Whereas filling of electron traps by photo-generated charges and the related accumulation field are the reason for changes in charge carrier transport upon illumination without passivation layer, both types of charge carriers can be transported also in unipolar OFETs, if a passivation layer is present.     

Modelling free-carrier absorption in solar cells

Free-carrier absorption can be a significant parasitic optical absorption process in solar cells. Although estimates of its influence have been made in the past, it has not previously been incorporated into a numerical semiconductor device simulator and studied in conjunction with other effects. A finite element model of free-carrier absorption is presented that incorporates the dependency of the absorption coefficient on the carrier concentration profile, including the change in carrier density that occurs across a single finite element. This model has been implemented in the semiconductor modelling program PC1D for Windows, and used to simulate the effects of free-carrier absorption on several types of silicon solar cells. It was found to have only a very small effect on cell efficiency, but can significantly affect the long-wavelength spectral response, which has implications for device characterization. Empirical equations for the behaviour of free-carrier absorption in a variety of materials are presented. © 1997 John Wiley & Sons, Ltd.     

Structural and Electrostatic Complexity at a Pentacene/Insulator Interface

The properties of organic‐semiconductor/insulator (O/I) interfaces are critically important to the operation of organic thin‐film transistors (OTFTs) currently being developed for printed flexible electronics. Here we report striking observations of structural defects and correlated electrostatic‐potential variations at the interface between the benchmark organic semiconductor pentacene and a common insulator, silicon dioxide. Using an unconventional mode of lateral force microscopy, we generate high‐contrast images of the grain‐boundary (GB) network in the first pentacene monolayer. Concurrent imaging by Kelvin probe force microscopy reveals localized surface‐potential wells at the GBs, indicating that GBs will serve as charge‐carrier (hole) traps. Scanning probe microscopy and chemical etching also demonstrate that slightly thicker pentacene films have domains with high line‐dislocation densities. These domains produce significant changes in surface potential across the film. The correlation of structural and electrostatic complexity at O/I interfaces has important implications for understanding electrical transport in OTFTs and for defining strategies to improve device performance.