GaAs pHEMT工艺6～18GHz有源倍频器MMIC

基于GaAs pHEMT工艺,设计了一个6～18 GHz宽带有源倍频器MM IC,最终实现了较高的转换增益和谐波抑制特性。芯片内部集成了输入匹配、有源巴伦、对管倍频器和输出功率放大器等电路。外加3.5 V电源电压下的静态电流为80 mA;输入功率为6 dBm时,6～18 GHz输出带宽内的转换增益为6 dB;基波和三次谐波抑制30 dBc。当输出频率为12 GHz时,100 kHz频偏下的单边带相位噪声为-143 dBc/Hz。芯片面积为1 mm×1.5 mm。     

基于InP HBT工艺的高功率高谐波抑制W波段宽带八倍频器MMIC

基于0.7μm InP HBT工艺,设计实现了一种高功率高谐波抑制比的W波段倍频器MMIC。电路二倍频单元采用有源推推结构,通过3个二倍频器单元级联形成八倍频链,并在链路的输出端加入输出缓冲放大器,进一步提高倍频输出功率。常温25℃状态下,当输入信号功率为0 dBm时,倍频器MMIC在78.4~96.0 GHz输出频率范围内,输出功率大于10 dBm,谐波抑制度大于50 dBc。芯片面积仅为2.22 mm²,采用单电源+5 V供电。     

A 77 GHz mHEMT MMIC Chip Set for Automotive Radar Systems

A monolithic microwave integrated circuit (MMIC) chip set consisting of a power amplifier, a driver amplifier, and a frequency doubler has been developed for automotive radar systems at 77 GHz. The chip set was fabricated using a 0.15 µm gate‐length InGaAs/InAlAs/GaAs metamorphic high electron mobility transistor (mHEMT) process based on a 4‐inch substrate. The power amplifier demonstrated a measured small signal gain of over 20 dB from 76 to 77 GHz with 15.5 dBm output power. The chip size is 2 mm × 2 mm. The driver amplifier exhibited a gain of 23 dB over a 76 to 77 GHz band with an output power of 13 dBm. The chip size is 2.1 mm × 2 mm. The frequency doubler achieved an output power of –6 dBm at 76.5 GHz with a conversion gain of ?16 dB for an input power of 10 dBm and a 38.25 GHz input frequency. The chip size is 1.2 mm × 1.2 mm. This MMIC chip set is suitable for the 77 GHz automotive radar systems and related applications in a W‐band.     

Practical mm-Wave pHEMT Frequency Multiplier

Details on a broadband MMIC frequency doubler targeting the MVDS market are presented. The design evolution from an individual pHEMT device to the complete practical doubler realisation is discussed. The doubler MMIC, which has been fabricated using the GMMT H40 GaAs process, has been evaluated in a customised package. An output power of +10 dBm at 40 GHz has been achieved with an associated conversion gain of 1.5 dB. The measured and predicted performance responses are compared. This chip is ideally suited to use in a number of emerging mm-wave applications.     

164-GHz MMIC HEMT doubler

In this paper, a MMIC frequency doubler based on an InP HEMT and grounded CPW (GCPW) technology is reported. The doubler demonstrated a conversion loss of only 2 dB and output power of 5 dBm at 164 GHz. The 3 dB output power bandwidth is 14 GHz, or 8.5%. This is the best reported result for a MMIC HEMT doubler above 100 GHz     

An ultra-wideband MMIC balanced frequency doubler usingline-unified HEMTs

A very small, ultrawideband, MMIC balanced frequency doubler that uses line-unified HEMT configurations is proposed. A chip size of 1.0 mm×0.9 mm is achieved with a conversion loss of 8-10 dB in the 4-40-GHz output harmonics frequency range and fundamental frequency signal isolation of better than 21 dB above the input fundamental frequency of 7 GHz. Circuit parameters are optimized in a novel and simple prediction using an equation derived from the HEMT's DC characteristic and a linear-state CAD software package. The doubler has promise for realizing miniaturized, wideband MMIC transmitters/receivers     

A minaturized broad-band MMIC frequency doubler

A miniaturized broadband balanced MMIC (monolithic microwave integrated circuit) frequency double, composed of a common-gate FET and a common-source FET directly connected to each drain electrode, has been proposed and demonstrated. The doubler is designed and fabricated as a miniaturized function module using a conventional two-gate FET configuration, active trapping, and active impedance matching. The doubler design has been performed through phase error estimation, gate width optimization, and gate-source voltage optimization. The phase error estimation in a nonlinear condition has eliminated phase error compensation circuits. The fabricated chip size is only 0.5 mm×0.5 mm, which is about 1/10 the area of previously reported doublers. A conversion loss of 8-10 dB, a fundamental frequency suppression better than 17 dB, and an input return loss better than 8 dB are obtained in the output frequency range from 6 to 16 GHz. The broadband doubler as a miniaturized MMIC function module can be applicable to small-size oscillator MMICs and multifunction MMICs     

基于GaAs PHEMT工艺的60~90GHz功率放大器MMIC

研制了一款60~90 GHz功率放大器单片微波集成电路(MMIC),该MMIC采用平衡式放大结构,在较宽的频带内获得了平坦的增益、较高的输出功率及良好的输入输出驻波比(VSWR)。采用GaAs赝配高电子迁移率晶体管(PHEMT)标准工艺进行了流片,在片测试结果表明,在栅极电压为-0.3 V、漏极电压为+3 V、频率为60~90 GHz时,功率放大器MMIC的小信号增益大于13 dB,在71~76 GHz和81~86 GHz典型应用频段,功率放大器的小信号增益均大于15 dB。载体测试结果表明,栅极电压为-0.3 V、漏极电压为+3 V、频率为60~90 GHz时,该功率放大器MMIC饱和输出功率大于17.5 dBm,在71~76 GHz和81~86 GHz典型应用频段,其饱和输出功率可达到20 dBm。该功率放大器MMIC尺寸为5.25 mm×2.10 mm。     

振荡型有源集成天线

研制中心频率为18 GHz的振荡型有源集成天线,包括微带天线设计、单片压控振荡器(MMIC VCO)的设计及微带天线与单片压控振荡器二者的集成。微带天线的芯片面积为4.5 mm×3.5 mm,增益为3.67 dB,中心频率为18.032 GHz,最小输入驻波系数为1.098;单片压控振荡器芯片面积1.1 mm×1.0 mm,调谐范围为15.978～18.247 GHz,输出功率大于6 dBm。振荡型有源集成天线的方向图测试结果与微带天线的特性符合,该振荡型有源集成天线能够正常工作。     

A 36–80 GHz High Gain Millimeter-Wave Double-Balanced Active Frequency Doubler in SiGe BiCMOS

This letter presents a high conversion gain double-balanced active frequency doubler operating from 36 to 80 GHz. The circuit was fabricated in a 200 GHz ${rm f}_{rm T}$ and ${rm f}_{max}$ 0.18 $mu$m SiGe BiCMOS process. The frequency doubler achieves a peak conversion gain of 10.2 dB at 66 GHz. The maximum output power is 1.7 dBm at 66 GHz and ${-}3.9$ dBm at 80 GHz. The maximum fundamental suppression of 36 dB is observed at 60 GHz and is better than 20 dB from 36 to 80 GHz. The frequency doubler draws 41.6 mA from a nominal 3.3 V supply. The chip area of the active frequency doubler is 640 $mu$m $,times,$424 $mu$m (0.272 mm $^{2}$) including the pads. To the best of authors' knowledge, this active frequency doubler has demonstrated the highest operating frequency with highest conversion gain and output power among all other silicon-based active frequency doublers reported to date.      

Highly integrated 60 GHz transmitter and receiver MMICs in a GaAs pHEMT technology

Highly integrated transmitter and receiver MMICs have been designed in a commercial 0.15 /spl mu/m, 88 GHz f/sub T//183 GHz f/sub MAX/ GaAs pHEMT MMIC process and characterized on both chip and system level. These chips show the highest level of integration yet presented in the 60 GHz band and are true multipurpose front-end designs. The system operates with an LO signal in the range 7-8 GHz. This LO signal is multiplied in an integrated multiply-by-eight (X8) LO chain, resulting in an IF center frequency of 2.5 GHz. Although the chips are inherently multipurpose designs, they are especially suitable for high-speed wireless data transmission due to their very broadband IF characteristics. The single-chip transmitter MMIC consists of a balanced resistive mixer with an integrated ultra-wideband IF balun, a three-stage power amplifier, and the X8 LO chain. The X8 is a multifunction design by itself consisting of a quadrupler, a feedback amplifier, a doubler, and a buffer amplifier. The transmitter chip delivers 3.7/spl plusmn/1.5 dBm over the RF frequency range of 54-61 GHz with a peak output power of 5.2 dBm at 57 GHz. The single-chip receiver MMIC contains a three-stage low-noise amplifier, an image reject mixer with an integrated ultra-wideband IF hybrid and the same X8 as used in the transmitter chip. The receiver chip has 7.1/spl plusmn/1.5 dB gain between 55 and 63 GHz, more than 20 dB of image rejection ratio between 59.5 and 64.5 GHz, 10.5 dB of noise figure, and -11 dBm of input-referred third-order intercept point (IIP3).     

A 12 GHz 1.9 W Direct Digital Synthesizer MMIC Implemented in 0.18 $mu$m SiGe BiCMOS Technology

This paper presents a 12 GHz direct digital synthesizer (DDS) MMIC with 9-bit phase and 8-bit amplitude resolution implemented in a 0.18 mum SiGe BiCMOS technology. Composed of a 9-bit pipeline accumulator and an 8-bit sine-weighted current-steering DAC, the DDS is capable of synthesizing sinusoidal waveforms up to 5.93 GHz. The maximum clock frequency of the DDS MMIC is measured as 11.9 GHz at the Nyquist output and 12.3 GHz at 2.31 GHz output. The spurious-free dynamic range (SFDR) of the DDS, measured at Nyquist output with an 11.9 GHz clock, is 22 dBc. The power consumption of the DDS MMIC measured at a 12 GHz clock input is 1.9 W with dual power supplies of 3.3 V/4 V. The DDS thus achieves a record-high power efficiency figure of merit (FOM) of 6.3 GHz/W. With more than 9600 transistors, the active area of the MMIC is only 2.5 x 0.7 mm². The chip was measured in packaged prototypes using 48-pin ceramic LCC packages.     

A broadband GaAs MMIC frequency doubler on left-handed nonlinear transmission lines

A broadband frequency doubler using left-handed nonlinear transmission lines(LH NLTLs) based on MMIC technology is reported for the first time.The second harmonic generation on LH NLTLs was analyzed theoretically. A four-section LH NLTL which has a layout of 5.4×0.8 mm~2 was fabricated on GaAs semi-insulating substrate. With 20-dBm input power,the doubler obtained 6.33 dBm peak output power at 26.8 GHz with 24-43 GHz—6 dBm bandwidth.The experimental results were quite consistent with the simulated results.The compactness and the broad band characteristics of the circuit make it well suit for GaAs RF/MMIC application.     

S波段35W GaN功率MMIC

报道了一款采用两级拓扑结构的2～4 GHz宽带高功率单片微波功率放大器芯片.放大器采用了微带结构,并使用电抗匹配进行设计,重点在于宽带功率效率平坦化设计.经匹配优化后放大器在2～4 GHz整个频带内脉冲输出功率大于35 W,小信号增益达到22 dB,在2.4 GHz频点处峰值输出功率达到40 W,对应的功率附加效率为3...     

A 77-GHz MMIC power amplifier for automotive radar applications

A MMIC 77-GHz two-stage power amplifier (PA) is reported in this letter. This MMIC chip demonstrated a measured small signal gain of over 10 dB from 75 GHz to 80 GHz with 18.5-dBm output power at 1 dB compression. The maximum small signal gain is above 12 dB from 77 to 78 GHz. The saturated output power is better than 21.5 dBm and the maximum power added efficiency is 10% between 75 GHz and 78 GHz. This chip is fabricated using 0.1-/spl mu/m AlGaAs/InGaAs/GaAs PHEMT MMIC process on 4-mil GaAs substrate. The output power performance is the highest among the reported 4-mil MMIC GaAs HEMT PAs at this frequency and therefore it is suitable for the 77-GHz automotive radar systems and related transmitter applications in W-band.     

一种基于MMIC技术的宽带左手非线性传输线二次倍频器

本文首次报道了基于MMIC技术的左手非线性传输线宽带二次倍频器。理论上分析了左手非线性传输线的二次谐波产生原理。在GaAs半绝缘衬底上制作了4节左手非线性传输线,面积为5.4mm*0.8mm。当输入信号为20dBm时,该倍频器在26.4GHz处获得最大二次谐波输出功率为6.33dBm,对应的-6dB带宽为24GHz~43GHz。实验结果与仿真结果吻合良好。以低频放大器作为激励,该倍频器可用于低成本,有效的毫米波甚至THz信号源系统。     

A Broadband Balanced Distributed Frequency Doubler With a Sharing Collector Line

A broadband balanced distributed frequency doubler fabricated by 0.35 $mu$m SiGe BiCMOS technology is developed to operate from 4 to 18 GHz output frequency. This balanced doubler consists of an active balun and a distributed doubler. A sharing collector line is used in the balanced distributed doubler to reduce the chip size. This circuit exhibits a measured conversion loss of less than 8 dB and a fundamental rejection of better than 23 dB for the output frequency between 4 and 18 GHz. The chip size is 1.1$, times ,$0.7 mm $^{2}$.      

基于平面肖特基二极管的平衡式亚毫米波倍频器芯片

基于标准的平面肖特基二极管单片工艺设计了一款平衡式亚毫米波倍频单片集成电路.依据二极管实际结构进行电磁建模,提取了器件寄生参数,并与实测的器件本征参数相结合获得了二极管非线性模型;依据该模型,采用平衡式拓扑结构以实现良好的基波抑制,设计了三线耦合巴伦电桥,并与肖特基二极管集成在同一芯片上,实现了单片集成,提高了设计准确...     

Ultracompact SOI CMOS frequency doubler for low power applications at 26.5-28.5 GHz

In this paper, a complementary metal oxide semiconductor (CMOS) frequency doubler for wireless applications at Ka-band is presented. The microwave monolithic integrated circuit (MMIC) is fabricated using digital 90 nm silicon on insulator (SOI) technology. All impedance matching, filter and bias elements are implemented on the chip, which has a very compact size of 0.37 mm/spl times/0.27 mm. At an output frequency of 27 GHz, source/load impedances of 50 /spl Omega/, a supply voltage of 1.25 V, a supply current of 8 mA and an input power of -4.5 dBm, a conversion gain of 1.5 dB was measured. To the knowledge of the authors, the circuit has by far the highest operation frequency for a CMOS frequency multiplier reported to date and requires lower supply power than circuits using leading edge III/V and silicon germanium (SiGe) technologies.     

Fully-integrated GaAs HBT power amplifier MMIC with high linear output power for 3 GHz-band broadband wireless applications

A high linear output power two-stage GaAs heterojunction bipolar transistor (HBT) power amplifier MMIC is reported. The input, interstage and output matching circuits are designed for wideband and low-voltage operations, and are fully integrated into an MMIC chip. The power amplifier measured with 54 Mbits 64-QAM OFDM signals at a collector supply voltage of 3.3 V showed linear output power of higher than 23.2 dBm at an error vector magnitude of 3.0% in a frequency range 3.3-3.6 GHz