PECVD制备纳米晶多晶硅薄膜

以Si(100)为衬底,采用磁控溅射和射频等离子体增强化学气相沉积系统制备了Si(100)/Al膜/非晶Si膜结构的样品。对该样品进行Al诱导真空退火以制备多晶硅薄膜,采用X射线衍射仪(XRD)和AFM分析薄膜微结构及表面形貌。实验结果表明,在经过500℃、550℃Al诱导退火后,形成了择优取向为〈111〉晶向的多晶硅薄膜。AFM给出了550℃退火后薄膜表面形貌,为100～200nm大小的圆丘状硅晶粒,密集排列在薄膜表面;并对Al诱导真空退火晶化的机理进行了分析。     

不同衬底温度生长的La_(0.5)Sr_(0.5)CoO_3薄膜椭圆偏振光谱研究

采用脉冲激光沉积法(PLD)在不同Si(100)衬底温度下制备了La_(0.5)Sr_(0.5)CoO_3(LSCO)导电金属氧化物薄膜.X射线衍射(XRD)分析表明,随着衬底温度升高LSCO薄膜的结晶质量增加,在650℃和700℃下制备的薄膜是具有单一钙钛矿结构的多晶薄膜.通过椭圆偏振光谱仪测量了400～1100nm波长范围内该导电金属氧化物薄膜的光学性质,采用双Lorentz振子色散关系及三相结构模型(Air/LSCO/Si)拟合获得了薄膜的光学常数.结果表明,薄膜的折射率随着衬底温度的升高而减小,然而在可见-近红外波长范围内消光系数随着衬底温度的升高而增大.这主要与薄膜的晶化质量和导电性能有密切的关系.     

高剂量离子注入直接形成Ge纳米晶的物理机理

研究了单束双能高剂量Ge离子注入、不经过退火在非晶态SiO2薄膜中直接形成镶嵌结构Ge纳米晶的物理机制.实验中利用不加磁分析器的离子注入机,采用Ge弧光放电离化自动形成的Ge+和Ge2+双电荷离子并存的单束双能离子注入方法,制备了1016～1018cm-2多种剂量Ge离子注入的Si基SiO2薄膜样品.用GIXRD表征了Ge纳米晶的存在,并仔细分析得到了纳米晶形成的阈值剂量.通过TEM分析了Ge纳米晶的深度分布和晶粒尺寸.用SRIM程序分别计算了双能离子在SiO2非晶层的射程和深度分布,与实验结合,得到纳米晶形成的物理机制,即纳米晶的形成与单束双能离子注入时Ge+和Ge2+相互碰撞产生的能量沉积在SiO2中形成的局域高温有关.     

金属诱导非晶硅薄膜低温晶化

介绍了一种非晶硅 (a- Si)薄膜低温晶化的新工艺 :金属诱导非晶硅薄膜低温晶化。研究了各种 a- Si/金属双层膜退火后的晶化情况。利用 X射线衍射分析了结晶硅膜的结构 ,通过光学显微镜观察了 Al诱导 a- Si薄膜晶化后的表面形貌 ,并初步探讨了金属诱导非晶硅薄膜低温晶化的机理     

a-SiGe_x∶H薄膜准分子激光晶化的研究

用KrF准分子激光、XeCl准分子激光在不同条件下对Ge含量不同的四种a－SiGex∶H样品进行退火。只要激光退火能量密度合适，Ge含量不同的a－siGex∶H薄膜都可以被多晶化；随着Ge含量的增加，激光晶化阈值能量密度降低，耐退火能力也降低；在相同的激光晶化能量密度下，Ge含量越高的薄膜，激光晶化的效果越好，晶粒尺寸长得越大。     

金属诱导生长法在Ni硅化物上异质生长多晶GeSi薄膜

采用金属Ni诱导与超高真空化学气相沉积相结合的方法,低温下在氧化Si衬底上制备出了多晶GeSi薄膜.利用X射线衍射仪、场发射扫描电镜等对多晶GeSi薄膜的晶体质量、表面形貌进行了表征,研究了在Ni上生长多晶GeSi的生长方式及表面形貌随生长参数变化的规律.结果表明,在温度高于510℃时,Ni金属诱导作用明显;生长压强为10Pa时,多晶GeSi能够形成连续致密的薄膜,而采用先低压(0.1Pa)后高压(10Pa)的生长方式,多晶GeSi呈现分离的晶须状,晶须尺寸多在100nm以上.     

金属诱导生长法在Ni硅化物上异质生长多晶GeSi薄膜

采用金属Ni诱导与超高真空化学气相沉积相结合的方法,低温下在氧化Si衬底上制备出了多晶GeSi薄膜.利用X射线衍射仪、场发射扫描电镜等对多晶GeSi薄膜的晶体质量、表面形貌进行了表征,研究了在Ni上生长多晶GeSi的生长方式及表面形貌随生长参数变化的规律.结果表明,在温度高于510℃时,Ni金属诱导作用明显;生长压强为10Pa时,多晶GeSi能够形成连续致密的薄膜,而采用先低压(0.1Pa)后高压(10Pa)的生长方式,多晶GeSi呈现分离的晶须状,晶须尺寸多在100nm以上.     

Si衬底上Ge外延薄膜与器件研究进展

随着Si基器件发展遇到瓶颈,具有更优异性能且与Si基CMOS工艺良好兼容的Ge基器件展现出了应用于集成电子与光电子领域的广阔前景.然而,Si基Ge器件性能会受制于Si与Ge之间较大的晶格失配所产生的高密度位错.因此,控制Si衬底上Ge外延薄膜的位错密度成为高性能Ge器件制备的研究重点.文章着重介绍了插入层、低温成核层和选区外延生长技术3种Si衬底上Ge外延薄膜位错控制技术的基本原理及研究进展,讨论了Si基Ge器件的最新研究进展,并展望了Si基Ge薄膜生长和器件制备的发展前景.     

金属诱导法低温多晶硅薄膜的制备与研究

利用金属诱导晶化 ( Metal Induced Crystallization,MIC)的方法研究了 a- Si/ Ni的低温晶化 ,MIC晶化温度能降低到 44 0℃ .采用 XRD、Raman、SEM、XPS等分析手段研究了 Ni- MIC多晶硅薄膜的特性 ,对薄膜结构和组成进行了分析 ,对晶化过程的机理进行了讨论     

BST薄膜的残余应力分析

采用射频磁控溅射在Pt/Ti/SiO2/Si(100)衬底上制备了钛酸锶钡(BST)薄膜,利用气氛炉对薄膜进行晶化处理,晶化后薄膜的应力采用XRD表征。研究其残余应力随晶化温度变化的趋势。结果表明:在550,650,700℃晶化后的BST薄膜宏观残余应力表现为压应力,且随着晶化温度的升高,呈线性变大。     

Effects of crystallization on trap state densities at grain boundaries in polycrystalline silicon

The relationship between crystallization processes in the formation of polycrystalline-silicon (poly-Si) films and trap state densities at grain boundaries is described. Three different crystallization techniques were used to obtain poly-Si films: 1) LPCVD, 2) solid-phase crystallization, and 3) laser recrystallization. Trap state densities in laser-recrystallized poly-Si are 9.2-9.6 × 10¹¹cm^-2, regardless of grain size. These values are half of those in LPCVD and solid-phase crystallized poly-Si. It is indicated quantitatively that laser-induced melting and the subsequent solidification process exert a significant influence on the electrical activity of silicon grain boundaries.     

Deposition and crystallization of a-Si thin films by rapid thermal processing

The deposition and crystallization of a-Si thin films grown by rapid thermal processing have been studied, using transmission electron microscopy. The a-Si films were deposited in a rapid thermal processor at reduced pressures in the temperature range of 530–580°C, at different deposition pressures and silane flow rates and subsequently were annealed in-situ by high temperature rapid thermal annealing (RTA) or by a two-step annealing process involving low temperature furnace annealing (FA) followed by high temperature RTA. The activation energy of a-Si deposition was found to be approximately 1.7 eV, in reasonable agreement with the conventional LPCVD technique. It has been found that the deposition temperature and deposition rate have a strong effect on the grain size, which is attributed to the nucleation processes in the bulk of the films. The combination of low deposition temperature, high deposition rate and a two-step annealing process permits the low temperature growth of poly-Si films of 100 nm thickness, with large grains of 520 nm size, containing a low density of microtwins and characterized by very low surface roughness of 2.2 nm.     

快速光热退火法制备多晶硅薄膜的研究

为了制备应用于太阳电池的优质多晶硅薄膜,研究了非晶硅薄膜的快速光热退火技术。先利用 PECVD 设备沉积非晶硅薄膜,然后放入快速光热退火炉中进行退火。退火前后的薄膜利用 X 射线衍射仪(XRD)和扫描电子显微镜(SEM)测试其晶体结构及表面形貌,用电导率设备测试其暗电导率。研究表明退火温度、退火时间对非晶硅薄膜的晶化都有很大的影响,光热退火前先用常规高温炉预热有助于增大多晶硅薄膜的晶粒尺寸和暗电导率。     

Large-Grain Polycrystalline Silicon Solar Cell on Epitaxial Thickening of AIC Seed Layer by Hot Wire CVD

Large-grain polycrystalline silicon (poly-Si) films were prepared on foreign substrates by the epitaxial thickening of seed layers. The seed layers were formed by aluminum-induced crystallization (AIC). Large-grain n-i-p poly-Si solar cells were deposited on epitaxial seeds by hot-wire chemical vapor deposition (HWCVD). Highly (93%) crystalline fractions with a lateral grain size of 5 ?m and an intrinsic layer were grown without incubation. These techniques were employed to prepare large-grain poly-Si thin-film solar cells. An ITO/n-i-p (HWCVD)/p+ (AIC)/Ti/glass-structured poly-Si thin-film solar cell with an initial efficiency of 5.6% was obtained.     

A novel method for a smooth interface at poly-SiOx/SiO2 by employing selective etching

We have investigated the excimer laser recrystallization of slightly oxygen-added amorphous silicon (a-SiO_x) films for the application to the active layer of thin film transistors. We also propose a new method to reduce the surface roughness of poly-SiO_x films by etching the grain boundaries selectively. SEM images show that the Si-O bonds are well segregated into the poly-Si grain boundaries after laser crystallization and the surface morphology is remarkably improved after the selective buffered oxide etchant (BOE) etching of the grain boundaries. The electrical conductivity measurement shows that the activation energies of poly-SiO_x and poly-Si films have an identical value of 0.52 eV. This may confirm that oxygen-induced defects do not cause any difference in the electrical performance even at the oxygen concentration of 0.18 at.%. Moreover, the electrical mobility and subthreshold slope of poly-SiO_x TFTs are considerably improved by employing the proposed method, which smooths the poly-SiO_x/SiO₂ interface     

准分子激光晶化制备TFT多晶硅薄膜的研究进展

对准分子激光晶化制备TFT用多晶硅薄膜的研究进展进行了综述。介绍了晶化过程中的超级横向生长现象。主要结合各种基于光束调制和光刻技术的人工控制超级横向生长方法,讨论了获得大晶粒尺寸优质多晶硅薄膜的途径。     

Performance of poly-Si TFTs fabricated by SELAX

Selectively enlarging laser crystallization (SELAX) has been proposed as a new crystallization process for use in the fabrication of thin-film transistors (TFTs). This method is capable of producing a large-grained and flat film of poly-Si. The average grain size is 0.3/spl times/5 /spl mu/m, and the surface roughness of the poly-Si layer is less than 5 nm. The TFTs fabricated with this method have better performance and are more uniform than those produced with the conventional excimer laser crystallization (ELC) method. The average values of field-effect mobility are 440 cm/sup 2//Vs (n-type), and 130 cm/sup 2//Vs (p-type). The subthreshold slope for both types is 0.20 V/dec. Values for standard deviation of threshold voltage are 0.03 V (n-type) and 0.20 V (p-type). The delay time of the CMOS-inverter of SELAX TFTs is less than half that of ELC TFTs.     

镍硅化物诱导横向晶化制备高性能多晶硅薄膜晶体管

提出一种新的采用镍硅化物作为种子诱导横向晶化制备低温多晶硅薄膜晶体管的方法。分别采用微区Raman、原子力显微镜和俄歇电子能谱对制备的多晶硅薄膜进行结构和性能表征,并以此多晶硅薄膜为有源层制备了薄膜晶体管,测试其I-V转移特性。测试结果显示,制备的多晶硅薄膜具有较低的金属污染和较大的晶粒尺寸,且制备的多晶硅薄膜晶体管具有良好的电学特性,可以有效地减小漏电流,同时可提高场效应载流子迁移率。这主要是由于多晶硅沟道区中镍含量的有效降低使得俘获态密度减少。     

Electric field-enhanced metal-induced lateral crystallization and P-channel poly-Si TFTs fabricated by it

The poly-Si thin film was obtained by electric field-enhanced metal-induced lateral crystallization technique at low temperature. Raman spectra, X-ray diffraction (XRD) and scan electron microscope (SEM) were used to analyze the crystallization state, crystal structure and surface morphology of the poly-Si thin film. Results show that the poly-Si has good crystallinity, and the electric field has the effect of enhancing the crystallization when DC electric voltage is added to the film during annealing. Secondary ion mass spectroscopy (SIMS) shows that the metal Ni improves the crystallization by diffusing into the a-Si thin film, so the crystallization of the lateral diffused region of Ni is the best. The p-channel poly-Si thin film transistors (TFTs) were fabricated by this large-size grain technique. The I_DS−V_DS and the transfer characteristics of the TFTs were measured, from which, the hole mobility of TFTs was 65 cm²/V s, the on and off current ratio was 5×10⁶. It is a promising method to fabricate high-performance poly-Si TFTs at low temperature for applications in AMLCD and AMOLED.     

Ag掺杂对Ge_2Sb_2Te_5结晶行为的影响

通过磁控溅射仪制备了Ge2Sb2Te5(GST)和Ag10.6(GST)89.4薄膜,利用X射线衍射(XRD)、电阻-温度(RT)测试、透射电子显微学以及径向分布函数(RDF)等方法对比研究了GST和Ag10.6(GST)89.4的结晶过程和微观结构及其演化的差异。发现掺Ag的薄膜非晶态、晶态电阻均比GST更高,而且结晶过程只有非晶相到面心立方相(fcc)的转变,没有出现GST的非晶到fcc再到六方相(hcp)的过程,XRD分析进一步证实了这一结果。同时,透射电镜原位加热实验证实了在300℃时,Ag10.6(GST)89.4仍然保持着fcc结构,而GST中已经出现了hcp相。通过统计230℃下时效处理的晶态薄膜的晶粒尺寸,发现Ag10.6(GST)89.4的平均晶粒尺寸小于Ge2Sb2Te5薄膜的,这可能是造成其晶态电阻高于GST的主要原因。