Induced base transistor fabricated by molecular beam epitaxy

A novel three-terminal hot-electron device, the induced base transistor (IBT), has been fabricated by molecular beam epitaxy (MBE). Two-dimensional electron gas (2-DEG) induced by the applied collector field in an undoped GaAs quantum well is used as the base of the IBT. The common-base current gain α has been achieved as high as 0.96 under a collector bias of 2.5 V and an emitter current of 3 mA.     

Atomic layer epitaxy grown heterojunction bipolar transistor havinga carbon-doped base

The fabrication of a GaAs/AlGaAs heterojunction bipolar transistor (HBT) having a carbon-doped base is reported. The low diffusion coefficient of carbon makes it attractive for HBT applications since it will prevent out diffusion. The base was grown by atomic layer epitaxy (ALE), from a TMG (trimethylgallium) source that allowed the incorporation of carbon into the layer from the partially related TMG metal carbide. HBTs with common-emitter current gains of 100 were obtained at current densities of 1300 A-cm^-2     

Selective low-pressure silicon epitaxy for MOS and bipolar transistor application

The selective low-pressure epitaxy is presented in this paper. In contrast to LOCOS technology, this process starts with structuring a thick field oxide by anisotropic RIE etching. Then monocrystalline silicon is grown selectively in the windows formed. Si-gate MOS transistors have been produced using this technology. In the field of bipolar transistors, reactive ion etching and selective low-pressure epitaxy has been used to optimize the Schottky collector transistor to a nearly one-dimensional structure. These transistors have been built on a submicrometer epitaxial layer.     

Heavily doped base GaInP/GaAs heterojunction bipolar transistor grown by chemical beam epitaxy

The first demonstration of a GaInP/GaAs heterojunction bipolar transistor grown by chemical beam epitaxy is reported. A common-emitter current gain of 30 at a current density of 110 A/cm/sup 2/ is obtained for a beryllium base doping as high as 8*10/sup 19/ cm/sup -3/. The base sheet resistance of 140 Omega / Square Operator is among the lowest reported values.<>     

Self-aligned SiGe-base heterojunction bipolar transistor byselective epitaxy emitter window (SEEW) technology

In the device a SiGe epitaxial base is integrated in a structure which uses in situ doped epitaxial lateral overgrowth for the formation of the emitter window and the extrinsic base contact. Nearly ideal I -V characteristics have been achieved for a base width of 60 nm with an intrinsic base resistance of 4.6 kΩ/□ and for emitter widths down to 0.4 μm. A DC collector current enhancement factor of 3.1 was obtained relative to a Si homojunction transistor with a 1.25 times higher intrinsic base resistance. The breakdown voltage BV_CBO is identical for both Si and SiGe devices, even though the collector-base depletion region is partly overlapped with the reduced-bandgap SiGe strained layer. The lower BV_CEO, measured for the SiGe-base transistor, is due to the higher current gain. Based on these results the fabrication of high-speed bipolar circuits that take advantage of SiGe-base bandgap engineering seems possible using selective epitaxy emitter window (SEEW) technology     

Heterojunction bipolar transistor using a (Ga,In)P emitter on a GaAs base, grown by molecular beam epitaxy

We report the first N-p-n heterojunction bipolar transistor (HBT) using a (Ga,In)P/GaAs heterojunction emitter on a GaAs base. This combination is of interest as a potential alternate to (Al,Ga)As/GaAs, because of theoretical predictions of a larger valence band discontinuity and a smaller conduction band discontinuity, thus eliminating the need for grading of the emitter/base junction. The structure was grown by molecular beam epitaxy, with the base doping (∼10¹⁹cm^-3) far exceeding the n-type doping ∼5¹⁷cm^-3) of the (Ga,In)P wide gap emitter (Eg= 1.88 eV). Common-emitter current gains of 30 were attained at a current density of 3000 A/cm², the highest current density achieved without burnout.     

Subpicosecond base transit time observed in a hot-electron transistor (HET)

It has been found that the transverse magnetic field drastically reduces the current gain of an AlGaAs/GaAs hot-electron transistor (HET) at 4.2 K. The result can be understood in terms of the cyclotron motion of hot electrons within the base layer (1000 ? thick). Estimated subpicosecond base transit time confirms the quasiballistic transport of hot electrons across the base layer of the HET.     

Selective epitaxy for CMOS VLSI

Scaling CMOS for VLSI is difficult owing to increasing latchup susceptibility and lateral diffusion of the well which limits packing density. A novel solution to these problems is presented, using selective epitaxial deposition to refill etched wells. In conjunction with a buried-layer implant, a retrograde well profile is achieved with a low sheet resistivity (440 Ω), giving reduced latchup susceptibility. Shallow wells can be used (typically 1 µm) with source/drain-to-well breakdown voltages greater than 9.5 V. Transistor characteristics are good with a long-channel mobility of 192 cm²/V.s and subthreshold slope of 100-mV/decade for a 2.5-µm channel length.     

Selective area epitaxy of CdTe

We have performed selective area epitaxy (SAE) of CdTe layers grown by molecular beam epitaxy using a shadow mask technique. This technique was chosen over other SAE techniques due to its simplicity and its compatibility with multiple SAE patterning steps. Features as small as 50 microns × 50 microns were obtained with sharp, abrupt side walls and flat mesa tops. Separations between mesas as small as 20 microns were also obtained. Shadowing effects due to the finite thickness of the mask were reduced by placing the CdTe source in a near normal incidence position. Intimate contact between the mask and the substrate was essential in order to achieve good pattern definition.     

Field-effect transistor versus analog transistor (static induction transistor)

The reason why the usual FET shows the saturated characteristics has been shown that with increasing drain voltage, the effect of the negative feedback action, increases through a marked increase of the Series channel resistance in the neighborhood of the pinch-off voltage, under which condition the apparent transfercon-ductanceG_{m'}= G_{m}/(1 + r_{s}.G_{m})becomesG_{m'} simeq r_{s}^{-1}. It is also pointed out that a transistor in analogy to the vacuum type proposed by Watanabe and Nishizawa in 1950, exhibits the nonsaturated build-up character only When the internal negative feedback action is as little asG_{m'} simeq G_{m}. In this case, when the channel has not yet pinched off, the characteristics are ohmic and then the transistor can operate as a good variable resistor; on the other hand, when the channel has already pinched, the transistor shows the build-up characteristics similar to those of a vacuum tube triode as a result of the static induction from the drain. The transistor similar to that of the vacuum tube triode type is named "Static Induction Transistor," because its output character is based on the static induction as well as input characteristics. The SIT has the exponential characteristics in contrast with the "Analog Transistor" which is expected by Shockley to follow the space-charge conduction law. The SIT has already been ascertained to have low noise, low distortion, and high-power capability, and its fabrication has been already realized in the form of a high-power transistor (2 kW, 8 MHz), a high-frequency transistor (a few watts, UHF), and a high-speed thyristor. Microwave transistors and very high-speed integrated circuits are being constructed, as well as variable resistors.     

An induced base hot-electron transistor

A novel three-terminal device is proposed in which the base represents an undoped quantum well in a graded-gap heterostructure. The base conductivity is provided by a two-dimensional electron gas induced by the collector field. The intrinsic delay time is estimated to be about 1 ps at room temperature with a common-base current gain close to unity.     

Low base resistance integrated circuit transistor

The design of a transistor with a very low base resistance is presented. This transistor, manufactured in a standard IC-process, has been designed especially for the input stage of amplifiers for very low impedance transducers, such as moving coil phonocartridges (MCC) and thermocouples. The base spreading and aluminium interconnection resistances have been minimized by careful geometrical design within the constraints of the process. The total equivalent noise voltage of this transistor corresponds to the thermal noise of a resistor of 1.4 /spl Omega/.     

Self-aligned transistor with sidewall base electrode

A multiple self-aligned structure that facilitates high packing density and high speed in bipolar VLSI's is proposed. The device has polysilicon sidewall base electrodes to reduce parasitic junction capacitances. The new devices indicate that capacitances between the base and collector regions are reduced to 14 and the ratio of reverse-to-forward current gain is increased about 5 times that of conventional bipolar transistor structures, and gate delay in IIL circuits is about 1 ns/gate. The structure opens the way for further scaled-down VLSI.     

Bipolar transistor with quantum well base

We report in this study the modeling of a heterostructure bipolar transistor (HBT) where the base is designed as a quantum well. The transistor structure consists of a base layer of GaAs that is heavily p-type doped. The 0.024 μm base is sandwiched between wide band gap In_xGa_1?xP which composes the n-type emitter and collector layers immediately adjacent to the base. The thickness of the base was chosen so that it is comparable to the wavelength of the electrons passing though it. There are two heavily doped cap layers of InGaAs at the emitter contact. The remainder of the emitter and collector regions are composed of GaAs. The purpose of this design is to filter the energies and velocities of electrons as they pass through the base region that forms a quantum barrier to electrons and a quantum well to holes. This should result in a significant decrease of noise in comparison to that observed in non-quantum base HBTs. As expected, the thin quantum well improves the collection of injected carriers, which in turn boosts the DC gain (β) to 750 and increases the power of the novel transistor by a factor of six, in comparison to a commercially available HBT with a similar non-quantum well structure. At high frequencies, the gain of the device is increased by about 5 dB over the non-quantum base HBT that this device is based upon. Additionally, the cutoff frequency is improved from 20 to 50 GHz. Modeling of the novel transistor was done using Silvaco ATLAS?. This study will continue with the fabrication of experimental wafers.     

Bipolar transistor with graded band-gap base

We report the first compositionally graded base bipolar transistor. The device grown by MBE incorporates a wide gap Al0.35Ga0.65As emitter (n = 2 × 1016/cm3 and a 0.4 ?m thick p+ (= 2 × 1018/cm3)base graded from Al0.20Ga0.80As to GaAs. DC current gain of 35 with flat, nearly ideal, collector characteristics are observed. Incorporation of a graded gap base gives much faster base transit times due to the induced quasi-electric field for electrons, thus allowing a precious tradeoff against the base resistance.     

Si/CoSi2/Si permeable base transistor obtained by silicon molecular beam epitaxy over a CoSi2 grating

Permeable base transistors have been fabricated by silicon molecular beam epitaxy over a CoSi2 grating, epitaxially grown on top of an Si wafer. The Si channel widths range from 4 ?m down to 1 ?m. Collector current/voltage characteristics are presented which exhibit the main expected features of an Si permeable base transistor.     

Negative transconductance superlattice base bipolar transistor

The operation of a new superlattice base bipolar transistor is reported. Negative transconductance in the common-base transfer characteristic is achieved at an emitter-base voltage in excellent agreement with the bias required to suppress tunnel injection into the first miniband. In the common emitter configuration a corresponding peak in the current gain of the device is obtained as the base current is increased.<>     

Monomolecular layer epitaxy of GaAs for ideal static induction transistor

An ideal static induction transistor (ISIT) structure was fabricated using molecular layer epitaxy (MLE). The doping method of MLE enabled us to achieve a sufficiently high level of doping for ISIT fabrication. In the fabrication process a low growth temperature was very important for the device structure, which requires very sharp dopant profiles. For the ISIT, two MLE processes, namely source–drain growth and gate regrowth, were required. The electrical characteristics of the source–drain were changed after heat treatment at a temperature higher than 480°C. The effect of the redistribution of dopants of the source–drain structure (n⁺⁺–i–p⁺⁺–i–n⁺) during gate regrowth was clearly shown by SIMS (secondary ion mass spectroscopy) measurements for various temperatures of heat treatment. As a result the doped Se diffused from the n⁺⁺ source region to the other layers and the doped Zn diffused from the p⁺⁺ layer to the i-layers. The source was a heavily Se-doped layer at the doping level of (2–3)×10¹⁹ cm⁻³ containing a larger amount of interstitial Se atoms in the lattice. The redistribution of Se from the heavily doped region was detectable even after heat treatment at 480°C for 30 min. For the p⁺⁺ layer the profile of the C-doped layer was stable even after heat treatment at 620°C for 30 min, but the profile of Zn changed markedly after heat treatment at 480°C for 30 min. In addition, the carbon-doped p⁺⁺ layer acted as a gettering layer for diffused interstitial Se from the source region. The driving force of the redistribution of dopants results in the electric field in the device structures. © 1997 John Wiley & Sons, Ltd.     

A high-gain GaAs/AlGaAs n-p-n heterojunction bipolar transistor on(100) Si grown by molecular beam epitaxy

High-gain GaAs/AlGaAs n-p-n heterojunction bipolar transistors (HBT's) on Si substrates grown by molecular beam epitaxy (MBE) have been fabricated and tested. In this structure, an n⁺-InAs emitter cap layer was grown in order to achieve a nonalloyed ohmic contact. Typical devices with an emitter dimension of 50×50 μm² exhibited a current gain as high as 45 at a collector current density of 2×10³ A/cm² with an ideality factor of 1.4. This is the highest current gain reported for HBT's grown on Si substrates. Breakdown voltages as high as 10 and 15 V were observed for the emitter-base and collector-base junctions respectively. The investigation on devices with varying emitter dimensions demonstrates that much higher current gains can be expected     

Selective area epitaxy and growth over patterned substrates by chemical beam epitaxy

Selective area epitaxy and growth over patterned substrate using chemical beam epitaxy (CBE) were investigated. Truly selective area epitaxy with no deposition over the SiO/sub 2/ masks has been routinely obtained with excellent epilayer morphology. Uniform coverage was obtained for regrowth over etched mesas to form buried heterostructures. For growth over etch channels, very unique growth characteristics were obtained. Buried crescent stripes similar to those formed by liquid-phase epitaxy inside channels were also obtained by CBE. These growth characteristics demonstrated the unique of CBE for diode laser fabrication.<>