共查询到20条相似文献,搜索用时 78 毫秒
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晶圆直接键合技术由于能将表面洁净的两个晶圆集成到一起,从而可以用来制备晶格失配 III-V族多结太阳电池。为了制备GaInP/GaAs/InGaAsP/InGaAs四结太阳电池,需采用具有低电阻率的GaAs/InP键合界面,从而实现GaInP/GaAs和InGaAsP/InGaA上下两个子电池的电学导通。我们设计并研究了具有不同掺杂元素和掺杂浓度的三种键合界面,并采用IV曲线对其电学性质进行表征。此外,对影响键合界面质量的关键工艺过程进行了研究,主要包括表面清洗技术和键合参数优化,例如键合温度、键合压力和键合时间等。最终制备出的键合四结GaInP/GaAs/InGaAsP/InGaAs太阳电池在AM0条件下效率最高达33.2%。 相似文献
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描述了低温硅片直接键合(LTSDB)的实现和质量评价。通过高分辨率电子显微(HREM)和表面电离质谱分析(SIMS)的方法对键合界面特性进行了研究。用HREM图象了诸如位错和SiO2的随机分布等界面结构,SIMS结果表明了靠近键合界面的分布情况和Si-H原子团的其他特性,提出了一种新的两步LTSDB机理。 相似文献
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本文研究了键合片Si/Si界面SiO_2层与材料、化学处理、键合条件及高温处理的关系,并研究了键合片中Si/SiO_2界面态与工艺的关系。 相似文献
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The anodic bonding between glass-ceramics and stainless steel (No. 430#) which was coated with SiO2 layer were investigated. The SiO2 layers with thickness comprised between 150 and 250 nm were coated on stainless steel surfaces by sol-gel method, the bonding process was achieved at 350 °C and 800 V for 45 min under atmosphere. The micro-topography and the compositions of the bonding interfaces were investigated by XRD, SEM and EDS. The results indicated SiO2 layers could help the formation of the bonding with glass-ceramics to stainless steel, lithium iron oxide (LiFeO2) was observed on the surface of glass-ceramics after bonding, and the bonding strength increased with increasing bonding temperature or voltage. 相似文献
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D. V. Singh L. Shi K. W. Guarini P. M. Mooney S. J. Koester A. Grill 《Journal of Electronic Materials》2003,32(11):1339-1343
We demonstrate layer transfer of 150 nm of Si from a 200-mm, silicon-on-insulator (SOI) substrate onto a sapphire substrate
using low-temperature wafer bonding (T=150°C). The crystalline quality and the thermal stability of the transferred Si layer
were characterized by x-ray diffraction (XRD). A broadening of the (004) Si peak is observed only for anneal temperatures
TA≥800°C, indicating some degradation of the crystalline quality of the transferred Si film above these temperatures. The measured
electron Hall mobility in the bonded Si layer is comparable to bulk silicon for TA≤800°C, indicating excellent material quality. 相似文献
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铌酸锂晶片的键合减薄及热释电性能研究 总被引:2,自引:0,他引:2
铌酸锂(LN)作为一种热释电材料,可以被用于制作光电探测器敏感单元的敏感层,但通常LN晶片厚度为0.5 mm,远大于光电敏感单元厚度的要求,所以需要用键合减薄及抛光技术对LN晶片进行加工处理。本研究所用键合减薄技术主要包含:RZJ-304光刻胶键合、铣磨、抛光、剥离液剥离和丙酮清洗RZJ-304胶。利用该技术加工得到了面积为10 mm×10 mm,厚度为50μm,表面比较光滑,表面粗糙度为1.63 nm的LN晶片。LN晶片的热释电信号峰峰值在减薄抛光后为176 mV,是未经处理时的4倍,满足了热释电探测器敏感层的要求。 相似文献
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Krishna N. Vinod Christian A. Zorman Azzam A. Yasseen Mehran Mehregany 《Journal of Electronic Materials》1998,27(3):L17-L20
This paper reports on a process to fabricate single-crystal 3C-SiC on SiO2 structures using a wafer bonding technique. The process uses the bonding of two polished polysilicon surfaces as a means
to transfer a heteroepitaxial 3C-SiC film grown on a Si wafer to a thermally oxidized Si wafer. Transfer yields of up to 80%
for 4 inch diameter 3C-SiC films have been achieved. Homoepitaxial 3C-SiC films grown on the 3C-SiC on SiO2 structures have a much lower defect density than conventional 3C-SiC on Si films. 相似文献
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化学机械抛光是集成电路制造工艺中十分精密的技术。在本文中,为了改善抛光效果,分表讨论了非离子表面活性剂和氧化剂在CMP过程中作用。我们主要分析了非离子表面活性剂对片内非均匀性和表面粗糙度的影响。同时,我们从静态腐蚀速率、电化学曲线和剩余高低差的角度,讨论了在不加BTA条件下,不同氧化剂浓度的抛光液的钝化特性。实验结果明显地表明:加入了非离子表面活性剂的抛光液,更有利于改善抛光后的片内非均匀性和表面粗糙度,并确定2vol%体积分数是比较合适的浓度。当抛光液中氧化剂浓度超过3vol%,抛光液拥有较好的钝化能力,能够有效减小高低差,并有助于获得平整和光滑的表面。根据这些实验结果,非离子表面活性剂和氧化剂的作用进一步被了解,将有助于抛光液性能的改善。 相似文献
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We have investigated a SiO_2/SiN_x/SiO_2 composite insulation layer structured gate dielectric for an organic thin film transistor(OTFT) with the purpose of improving the performance of the SiO_2 gate insulator. The SiO_2/SiN_x/SiO_2 composite insulation layer was prepared by magnetron sputtering.Compared with the same thickness of a SiO_2 insulation layer device,the SiO_2/SiN_x/SiO_2 composite insulation layer is an effective method of fabricating OTFT with improved electric characteristics and decrease... 相似文献
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N. Quitoriano W. S. Wong L. Tsakalakos Y. Cho T. Sands 《Journal of Electronic Materials》2001,30(11):1471-1475
The kinetic behavior of the Pd/In bilayer reaction is analyzed, with emphasis on the effect of nanometer-scale diffusion barriers
at the Pd/In interface. It is shown that the Pd/In reaction proceeds rapidly and without a discernable incubation period at
temperatures below 200 C if the Pd/In interface is nominally free of either contamination or intentionally-deposited intervening
layers. Air exposure of the Pd surface prior to In deposition is sufficient to delay the onset of the reaction to produce
the intermetallic phase by PdIn3 for several minutes at 200 C. This incubation period can be further controlled by deposition of a nanometer-scale Ti layer
onto the Pd prior to air exposure and In deposition. The implications of these results for the design of transient-liquid-phase
waferbonding processes based on Pd−In are discussed. 相似文献