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1.
提出一种占空比可调的高速电平转换电路,能够将频率高达1.33 GHz的低电压域信号提升至高电压域输出。在传统电平转换电路的基础上,增加了占空比调节电路,使得电路工作在不同I/O域时,通过调整接入的PMOS管数量来间接调整控制管的宽长比,进而实现占空比可调。增加了快速响应电路,引入首尾相接的反相器组,通过正反馈功能,加速实现电平转换。基于Global Foundry 14 nm CMOS工艺进行电路设计,采用SPECTRE软件进行仿真。仿真结果表明,该电路能够实现从0.9 V核心电压到2.5 V I/O电压的稳定转换,传播延时为225 ps,占空比为49.63%。当高电压域电压变换为1.8 V后,通过占空比调节电路,使占空比仍可保持在50%左右。  相似文献   

2.
将降压型开关转换器IC配置成反相器,便可获得一个高效大功率-5V电源,其输出电流在输入电压为12V时高达4.5A,在输入电压为5V时为3.2A(图1).常见的反相电源用一个D沟道MOSFET进行开关切换(图2).这种电路配置在输出电流很小时能运转正常,但在输出电流超过2A左右时,其使用受到限制,这要视输入、输出电压电平和你使用的MOSFET而定.  相似文献   

3.
优化了GaAs基InGaP/AlGaAs/InGaAs赝配高电子迁移率晶体管(PHEMT)的外延结构,有利于获得增强型PHEMT的正向阈值电压.采用光学接触式光刻方式,实现了单片集成0.8μm栅长GaAs基InGaP/AlGaAs/InGaAs增强/耗尽型PHEMT.直流和高频测试结果显示:增强型(耗尽型)PHEMT的阈值电压、非本征跨导、最大饱和漏电流密度、电流增益截止频率、最高振荡频率分别为0.1V(-0.5V),330mS/mm(260mS/mm),245mA/mm(255mA/mm),14.9GHz(14.5GHz)和18GHz(20GHz).利用单片集成增强/耗尽型PHEMT实现了直接耦合场效应晶体管逻辑反相器,电源电压为1V,输入0.15V电压时,输出电压为0.98V;输入0.3V电压时,输出电压为0.18V.  相似文献   

4.
设计了一种结构简单,抗干扰能力极强的计算机通信接口电路。该电路利用模拟开关实现了全数字二态电平(1,0)与三态电平(1,0,-1)之间的相互转换;利用模拟开关导通电阻的动态效应以及MOS晶体管开启电压Vτ的衬偏效应,提高了接收电路的抗干扰能力,提出了一种与共模干扰无关的模拟数字混合接收电路。  相似文献   

5.
李凡阳  杨涛 《微电子学》2015,45(1):63-66, 71
介绍了一种片内电流模比较增强型上电复位电路。与传统的片内上电复位电路相比,该上电复位电路避免了二极管复位电路复位信号不彻底和基准增强型上电复位电路较复杂的缺点,利用简单的二极管箝位模块、电流模比较模块和逻辑电平迟滞模块,增强了上电复位信号,有利于后续逻辑单元的翻转。电路采用标准0.35 μm CMOS工艺进行设计和流片。芯片样品电路测试结果表明,在3.3 V电源电压下,电路工作正常,其上电复位逻辑高电平约2.3 V,比普通二极管复位电路高约0.8 V,有利于后续逻辑单元的翻转,且电路结构比基准型复位电路简单。  相似文献   

6.
数字系统设计要求考虑使用多个核心电压。存储器工作在1.8V,I2C和FPGA器件的工作电压为3.3V,微控制器工作在5V,而电荷耦合器件图像传感器则需要-9V~8V的工作电压。每种器件的时钟必须适应于其工作电压。可以用下图中的电平转换电路,将输入时钟信号调整到适当的逻辑高和逻辑低电平,包括负电压。这种特性对于需要负电压的器件很方便,如电荷耦合器件传感  相似文献   

7.
秦尧  明鑫  尤勇  林治屹  庄春旺  王卓  张波 《微电子学》2022,52(5):740-745
设计了一种适用于GaN半桥栅驱动的高噪声抗扰度的电容式电平位移电路。在浮动电源轨发生dV/dt切换和减幅振荡时,采用去耦开关完全消除了影响输出状态的共模噪声,采用动态开关减小了电路失配引起的差模噪声。利用电容耦合技术实现了高负压容忍度、亚纳秒级延时和低功耗。采用0.18μm高压BCD工艺进行电路设计。仿真结果表明,在50 V电平转换下,该电平位移电路的共模瞬态抗扰度达到200 V/ns, 200 V/ns转换速率下的失配容忍度达到30%,负压容忍度达到-5 V,平均传输延时为0.56 ns。  相似文献   

8.
图中所示电路是一个三输出的D/C转换电路。该电路把12V的铅酸电池输出电压转换成隔离的±15V电源电压和未隔离的5V电源电压。 IC_1通常是用来提升电压的开关调节器,  相似文献   

9.
新桥XQF1 5 2 1E2线路放大器采用集中供电方式 ,内设 2 4V开关稳压电源。该电源输入电压适应范围宽 ,输出电压纹波小 ,效率高 ,但比串联型晶体管稳压电源电路复杂。现将我们在维修时根据实物绘制的电路原理图 (见图 1 ) ,提供给大家 ,以供维修时参考。由供电器提供的 6 0V方波电压 ,经电源插入器电缆进入 2 4V稳压电源电路 ,首先经D1D2 进行倍压整流 ,再经开关管Q1调整 ,输出稳定的 2 4V电压。Q1栅极脉冲由TL4 94提供。TL4 94是美国萨斯公司专门为开关电源研制的PWM脉宽调制电路 (各脚功能见表 1 ) ,内含振荡器、双脉冲输出、双误差…  相似文献   

10.
介绍了一种采用0.18μm CMOS工艺制作的高速(500MHz)LVDS驱动电路.分析了开关时序和共模反馈对电路的影响,采用开关控制信号整形电路和基于"主-从"结构的共模设置电路,得到适当的开关时序和较好的共模电平设置,使LVDS输出电路具有更小的过冲电压和更稳定的共模电平.该LVDS驱动电路用于1GHz 14位高速D/A转换器芯片.样品电路测试结果表明,输出速率在500MHz时,LVDS驱动电路的指标满足IEEE-1596 reduced range link标准.  相似文献   

11.
This letter presents the high-temperature performance of AlGaN/GaN HEMT direct-coupled FET logic (DCFL) integrated circuits. At 375 degC, enhancement-mode (E-mode) AlGaN/GaN HEMTs which are used as drivers in DCFL circuits exhibit proper E-mode operation with a threshold voltage (VTH) of 0.24 V and a peak current density of 56 mA/mm. The monolithically integrated E/D-mode AlGaN/GaN HEMTs DCFL circuits deliver stable operations at 375 degC: An E/D-HEMT inverter with a drive/load ratio of 10 exhibits 0.1 V for logic-low noise margin (NML) and 0.3 V for logic-high-noise margin (NMH) at a supply voltage (VDD) of 3.0 V; a 17-stage ring oscillator exhibits a maximum oscillation frequency of 66 MHz, corresponding to a minimum propagation delay ( taupd) of 446 ps/stage at VDD of 3.0 V  相似文献   

12.
Depletion-mode and enhancement-mode AlGaN/GaN HEMTs using fluorine plasma treatment were integrated on one wafer. Direct-coupled FET logic circuits, such as an E/D HEMT inverter, NAND gate and D flip-flop, were fabricated on an AlGaN/GaN heterostructure. The D flip-flop and NAND gate are demonstrated in a GaN system for the first time. The dual-gate AlGaN/GaN E-HEMT substitutes two single-gate E-HEMTs for simplifying the NAND gate and shrinking the area, integrating with a conventional AlGaN/GaN D-HEMT and demonstrating a NAND gate. E/D-mode D flip-flop was fabricated by integrating the inverters and the NAND gate on the AlGaN/GaN heterostructure. At a supply voltage of 2 V, the E/D inverter shows an output logic swing of 1.7 V, a logic-low noise margin of 0.49 V and a logic-high noise margin of 0.83 V. The NAND gate and D flip-flop showed correct logic function demonstrating promising potential for GaN-based digital ICs.  相似文献   

13.
耗尽型和F等离子体处理增强型高电子迁移率晶体管(HEMT)被集成在同一圆片上。增强型/耗尽型 HEMT反向器、与非门以及D触发器等直接耦合场效应晶体管逻辑电路被制作在AlGaN/GaN异质结上。D触发器在GaN体系中首次被实现。在电源电压为2伏的条件下,增强型/耗尽型反向器显示输出逻辑摆幅为1.7伏,逻辑低噪声容限为0.49伏,逻辑高噪声容限为0.83伏。与非门和D触发器的功能正确,证实了GaN基数字电路的发展潜力。  相似文献   

14.
A planar-fabrication technology for integrating enhancement/depletion (E/D)-mode AlGaN/GaN high-electron mobility transistors (HEMTs) has been developed. The technology relies heavily on CF/sub 4/ plasma treatment, which is used in two separate steps to achieve two objectives: 1) active device isolation and 2) threshold-voltage control for the enhancement-mode HEMT formation. Using the planar process, depletion- and enhancement-mode AlGaN/GaN HEMTs are integrated on the same chip, and a direct-coupled FET logic inverter is demonstrated. Compared with the devices fabricated by a standard mesa-etching technique, the HEMTs by a planar process have comparable dc and RF characteristics with no obvious difference in the device isolation. The device isolation by a plasma treatment remains the same after 400 /spl deg/C annealing, indicating a good thermal stability. At a supply voltage (V/sub DD/) of 3.3 V, the E/D-mode inverters show an output swing of 2.85 V, with the logic-low and logic-high noise margins at 0.34 and 1.47 V, respectively.  相似文献   

15.
随着高压开关和高速射频电路的发展,增强型GaN基高电子迁移率晶体管(HEMT)成为该领域内的研究热点。增强型GaN基HEMT只有在加正栅压才有工作电流,可以大大拓展该器件在低功耗数字电路中的应用。近年来,国内外对增强型GaN基HEMT阈值电压的研究主要集中以下两个方面:在材料生长方面,通过生长薄势垒、降低Al组分、生长无极化电荷的AlGaN/GaN异质材料、生长InGaN或p-GaN盖帽层,来控制二维电子气浓度;在器件工艺方面,采用高功函数金属、MIS结构、刻蚀凹栅、F基等离子体处理,来控制表面电势,影响二维电子气浓度。从影响器件阈值电压的相关因素出发,探讨了实现和优化增强型GaN基HEMT的各种工艺方法和发展方向。  相似文献   

16.
We present the detailed dc and radio-frequency characteristics of an Al0.3Ga0.7N/GaN/In0.1Ga0.9 N/GaN double-heterojunction HEMT (DH-HEMT) structure. This structure incorporates a thin (3 nm) In0.1Ga0.9N notch layer inserted at a location that is 6-nm away from the AlGaN/GaN heterointerface. The In0.1Ga0.9N layer provides a unique piezoelectric polarization field which results in a higher potential barrier at the backside of the two-dimensional electron gas channel, effectively improving the carrier confinement and then reducing the buffer leakage. Both depletion-mode (D-mode) and enhancement-mode (E-mode) devices were fabricated on this new structure. Compared with the baseline AlGaN/GaN HEMTs, the DH-HEMT shows lower drain leakage current. The gate leakage current is also found to be reduced, owing to an improved surface morphology in InGaN-incorporated epitaxial structures. DC and small- and large-signal microwave characteristics, together with the linearity performances, have been investigated. The channel transit delay time analysis also revealed that there was a minor channel in the InGaN layer in which the electrons exhibited a mobility slightly lower than the GaN channel. The E-mode DH-HEMTs were also fabricated using our recently developed CF4-based plasma treatment technique. The large-signal operation of the E-mode GaN-based HEMTs was reported for the first time. At 2 GHz, a 1times100 mum E-mode device demonstrated a maximum output power of 3.12 W/mm and a power-added efficiency of 49% with single-polarity biases (a gate bias of +0.5 V and a drain bias of 35 V). An output third-order interception point of 34.7 dBm was obtained in the E-mode HEMTs  相似文献   

17.
We report a novel approach in fabricating high-performance enhancement mode (E-mode) AlGaN/GaN HEMTs. The fabrication technique is based on fluoride-based plasma treatment of the gate region in AlGaN/GaN HEMTs and post-gate rapid thermal annealing with an annealing temperature lower than 500/spl deg/C. Starting with a conventional depletion-mode HEMT sample, we found that fluoride-based plasma treatment can effectively shift the threshold voltage from -4.0 to 0.9 V. Most importantly, a zero transconductance (g/sub m/) was obtained at V/sub gs/=0 V, demonstrating for the first time true E-mode operation in an AlGaN/GaN HEMT. At V/sub gs/=0 V, the off-state drain leakage current is 28 /spl mu/A/mm at a drain-source bias of 6 V. The fabricated E-mode AlGaN/GaN HEMTs with 1 /spl mu/m-long gate exhibit a maximum drain current density of 310 mA/mm, a peak g/sub m/ of 148 mS/mm, a current gain cutoff frequency f/sub T/ of 10.1 GHz and a maximum oscillation frequency f/sub max/ of 34.3 GHz.  相似文献   

18.
研制了一款X波段增强型AlGaN/GaN高电子迁移率晶体管(HEMT)。在3英寸(1英寸=2.54 cm)蓝宝石衬底上采用低损伤栅凹槽刻蚀技术制备了栅长为0.3μm的增强型AlGaN/GaN HEMT。所制备的增强型器件的阈值电压为0.42 V,最大跨导为401 mS/mm,导通电阻为2.7Ω·mm。器件的电流增益截止频率和最高振荡频率分别为36.1和65.2 GHz。在10 GHz下进行微波测试,增强型AlGaN/GaN HEMT的最大输出功率密度达到5.76 W/mm,最大功率附加效率为49.1%。在同一材料上制备的耗尽型器件最大输出功率密度和最大功率附加效率分别为6.16 W/mm和50.2%。增强型器件的射频特性可与在同一晶圆上制备的耗尽型器件相比拟。  相似文献   

19.
Monolithic integration of enhancement (E)- and depletion (D)-mode metamorphic In0.52Al0.48As/In0.53Ga0.47 As/GaAs HEMTs with 0.35 μm gate-length is presented for the first time. Epilayers are grown on 3-inch SI GaAs substrates using molecular beam epitaxy. A mobility of 9550 cm2/V-s and a sheet density of 1.12×1012 -2 are achieved at room temperature. Buried Pt-gate was employed for E-mode devices to achieve a positive shift in the threshold voltage. Excellent characteristics are achieved with threshold voltage, maximum drain current, and extrinsic transconductance of 100 mV, 370 mA/mm and 660 mS/mm, respectively for E-mode devices, and -550 mV, 390 mA/mm and 510 mS/mm, respectively for D-mode devices. The unity current gain cutoff frequencies of 75 GHz for E-mode and 80 GHz for D-mode are reported  相似文献   

20.
首次采用CF4等离子体技术实现可用于功率变换的增强性AlGaN/GaN功率器件。实验结果表明,当AlGaN/GaN器件经功率150W和时间150s等离子体轰击后,器件阈值电压从-4V被调制约为0.5V,表现为增强型。当漂移区LGD从5μm增加到15μm,器件的击穿电压从50V迅速增大到400V,电压增幅达350V。采用长度为3μm源场板结构将器件击穿电压明显地提高,击穿电压增加约为475V,且有着比硅基器件更低的比导通电阻,约为2.9mΩ.cm2。器件模拟结果表明,因源场板在远离栅边缘的漂移区中引入另一个电场强度为1.5MV/cm的电场,从而有效地释放了存在栅边缘的电场,将高达3MV/cm的电场减小至1MV/cm。微波测试结果表明,器件的特征频率fT和最大震荡频率fMAX随Vgs改变,正常工作时两参数均在千兆量级。栅宽为1mm的增强型功率管有较好的交直流和瞬态特性,正向电流约为90mA。故增强型AlGaN/GaN器件适合高压高频大功率变换的应用。  相似文献   

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