电流不连续状态下LLC谐振型DC/DC变换器的分析与最佳设计

分析了LLC谐振型DC/DC变换器整流二极管电流工作在不连续状态的最大谐振电流、电容最大电压、输入输出电压增益与开关频率、谐振电感比和负载之间的关系特性,根据推导出的表达式,应用MATLAB软件绘制了相应的曲线,由此得出了LLC谐振变换器的参数最佳设计的方法。最后根据此方法设计了实验参数,给出了实验结果。     

谐振式双向开关电容变换器

根据串联电容逐个充电升压、逐个取电降压的原理,提出一种新型谐振式双向开关电容变换器.谐振电感仅为一只参数很小的电感,且无须添加辅助器件,即能完成全电路的软开关.在不改变工作方式下,实现了实时双向的电能传输,传输方向仅取决于高压端和低压端的电压值.由RLC电路谐振规律和等电量方法解得充电平均电流、传输功率、输出电压和变换效率的数学表达式.最后通过MATLAB/Simulink仿真和制作样机,进行单向模式和双向模式的实验,验证了本方案的正确性.     

电源与器件

手持式装置用的低压DC/DC变换器国家半导体公司的LM26XX磁性降压变换器和LM2788/98开关电容DC/DC变换器都是降压变换器解决方案。磁性降压变换器由3.3V电源供电,可提供1.8V、1.5V、1.3V或1.05V输出电压,转换效率为95％,精度为±2％;开关电容降压变换器由3.3V电源供电,可提供1.5V、1.8V和2.0V输出电压,效率为80％～90％。开关电容降压变换器具有各种标志,可告诉你     

UC3863控制的并联谐振电源

分析了并联LLC谐振变换器的特性,并做了开关顺序并联与交错并联情况下变换器特性的比较,以UC3863芯片为核心控制芯片的开关电源,电路采用半桥结构的LLC谐振电路,这种模式很少被提出,通过实验证明了可行性和实用性,大大提高了LLC的工作效率。通过对各器件参数的理论计算,运用SABER仿真软件对变换器电路进行仿真和分析。文中以300V电压输入,12V-18V输出电压为例,2．5kW,500kHz并联LLC谐振变换器设计和仿真来进行模型分析,从而总结出并联LLC谐振变换器相对于传统单一LLC谐振变换器的优点。仿真结果验证了设计的可行性与结论的准确性。     

一种零电压开关Zeta变换器的设计

给出了一种零电压开关Zeta变换器,这种变换器可以提高效率和减小功率开关管的电压应力.当变换器工作在连续模式时,应用谐振电容和变压器的漏感实现功率开关管的零电压导通.详细分析了变换器的工作原理,并设计了相应的电路进行验证.仿真结果表明所设计的Zeta变换器效率达92.21%,输出电压纹波为125 mV.它可被用于等离子显示屏(PDP)电源系统.     

基于图论的n阶升压式谐振开关电容变换器潜电路分析技术

高阶升压式谐振开关电容变换器的升压阶数增加,拓扑变得更加复杂,其潜在路径隐蔽性更强,因而需要研究一种系统的分析方法.为此本文基于图论提出一种n阶升压式谐振开关电容变换器潜电路分析方法,文中给出了该图论分析法的原理和步骤,并以3阶升压式谐振开关电容变换器为例进行了仿真和实验证明.研究结果表明,该方法简单易行,是一种可供推广的电力电子变换器的潜电路分析方法,为预先发现和消除高阶升压式谐振开关电容变换器中的安全隐患提供了理论依据.     

一种新型正激零电压零电流转换PWM DC/DC变换器

提出一种新型的零电压零电流转换(ZCZVT)的正激拓扑。拓扑工作频率为300kHz,能实现主开关管的零电压开通(ZVS)和零电流关断(ZCS),同时辅助开关管也能实现零电流关断(ZCS),且变压器的磁通复位不需要辅助绕组。文章进行了拓扑的稳态分析,并且讨论了谐振电路的参数设计。最后,在研制一台48V输入、12V/100W输出样机的基础上,实验验证这种新型正激ZCZVT PWM DC-DC变换器的软开关特性。     

谐振开关电容变换器的潜电路特性

潜电路是一种潜伏在系统中的路径或状态,仅在特定的条件下产生,使系统出现非期望的功能.本文以一个降压式谐振开关电容变换器为例,详细分析了潜电路出现时变换器的工作过程,利用电路能量守恒定理推导出变换器的潜电路特性以及潜电路发生条件.得到潜电路出现后,变换器的输出电压不再保持恒定,而是与电路参数、运行条件等密切相关,呈现出非预期特性的结论,并用实验结果加以证实.     

具有低纹波输出高增益DC-DC变换器

提出一种无耦合电感的交错式高升压比变换器拓扑。该结构由两个Boost电路和两个电压倍增单元组成,并以交错方式运行。所提变换器具备低电流纹波、低开关电压应力和高电压增益的特性。详细分析了变换器工作模态和电压增益特性,并与现有工作进行了对比分析。结果表明,输入电压为30 V时,输出电压高达300 V,并且开关管的电压应力仅为87 V,远低于传统变换器300 V的输出电压。最后,搭建了100 W的实验样机,实验结果验证了所提变换器的有效性。     

一种新颖有源箝位ZVS正激变换器的研究

介绍了一种中心抽头全波整流有源箝位ZVS正激变换器的工作原理及主要参数计算。有源箝位电路由一个箝位开关管和箝位电容组成。变压器磁芯实现无损复位,励磁能量和漏感能量全部传递到负栽.磁芯利用率高,功率开关管承受电压应力降低。通过变压器漏感与开关管输出电容的谐振,主开关管与箝位开关管都可以实现ZVS开通,提高了变换器工作效率。文章首先分析了变换器工作原理,然后给出了主要参数的计算方法,最后通过样机(48V输入5V/20A输出)实验验证了该拓扑的高效性能。     

A zero-current-switching PWM flyback converter with a simpleauxiliary switch

A simple and effective approach of turning an isolated hard-switched converter design into a soft-switched one is presented. By adding an auxiliary winding, switch and small capacitor to the conventional pulsewidth modulation (PWM) isolated flyback converter, all switches and diodes are softly turned on and off. No extra active or passive voltage clamp circuit is needed to suppress voltage stress on the switching devices that were usually found in classical converters. A zero-current-switching (ZCS) PWM flyback converter topology with multiple outputs is analyzed and examined. The proposal inherently utilizes the leakage inductance of the “flyback” transformer to achieve ZCS of all switching devices. A complete steady-state DC analysis and the operating principle are described. The performance of an 80 W experimental converter prototype with dual-voltage outputs is included     

Energy-efficient C-dump converters for switched reluctance motors

Two energy-efficient converter topologies, derived from the conventional C-dump converter, are proposed for switched reluctance motor (SRM) drives. The proposed topologies overcome the limitations of the conventional C-dump converter, and could reduce the overall cost of the SRM drive. The voltage ratings of the dump capacitor and some of the switching devices in the proposed converters are reduced to the supply voltage (V_dc) level compared to twice the supply voltage (2V _dc) in the conventional C-dump converter. Also, the size of the dump inductor is considerably reduced. The converters have simple control requirements, and allow the motor phase current to freewheel during chopping mode. Simulation and experimental results of the converters are presented and discussed     

用开关电容网络改善DC-DC变换器性能的研究

将串并电容组合结构,极性反转开关电容网络和推挽开关电容网络和ｂｕｃｋ,ｂｏｏｓｔ,Ｃｕｋ及ｂｕｃｋ－ｂｏｏｓｔ等传统ＤＣ－ＤＣ变换器相结合,构成一系列新的变换器拓扑结构。理论分析和实验结果秀助于提高具有悬殊电压变化比的ＤＣ－ＤＣ变换器的工作频率和动态响应,还能拓宽变换器的电压变换范围。     

嵌入式开关电容DC-DC变换器的新颖控制技术

提出了一种针对单片集成开关电容DC-DC变换器进行优化的设计方案.阐述了开关电容DC-DC变换器电路的拓扑结构及其基本工作原理,给出了单片集成开关电容DC-DC变换器的等效电阻控制方法.考虑到集成工艺的兼容性问题,在电路设计时,用n沟MOSFET替代二极管;为了改善变换器的输出特性,在标准2μm p阱双层多晶硅单层金属CMOS工艺中增加了一次MOSFET阈值电压的调整步骤,实现了升压开关电容DC-DC变换器的单片集成.芯片面积为0.4mm2,测试结果显示,在变换器输入电压为3V,输出电压为5V,电路开关频率为9.8MHz时,输出功率为0.63mW,效率达到68%.     

Isolated DC-DC converters with high-output voltage for TWTA telecommunication satellite applications

Two alternatives for the implementation of an isolated DC-DC converter operating with a high output voltage and supplied by an unregulated low input voltage are presented in this paper. The proposed topologies are especially qualified for the implementation of travelling wave tube amplifiers (TWTA) utilized in telecommunication satellite applications due to their low mass and volume and their high-efficiency. The converters studied follow different principles and the main operational aspects of each topology are analyzed. A two-stage structure composed by a regulator connected in series with a ZVS/ZCS isolated DC-DC converter is the first topology proposed. The second topology studied is an isolated single-stage converter that continues being highly efficient even with a large input voltage variation. The experimental results obtained from two prototypes, implemented following the design procedures developed, are presented, verifying experimentally the characteristics and the analysis of the proposed structures. The prototypes are developed for an application requiring an output power of 150 W, a total output voltage of 3.2 kV and an input voltage varying from 26 V to 44 V. The minimum efficiency obtained for both converters operating at the nominal output power, is equal to 93.4% for the two-stage structure and equal to 94.1% for the single-stage converter.     

Optimal Modulation of Flying Capacitor and Stacked Multicell Converters Using a State Machine Decoder

Modulation of flying capacitor and stacked multicell converters is complicated by the fact that these converters have redundant states that achieve the same phase leg voltage output. Hence, a modulator must use some secondary criteria such as cell voltage balancing to fully define the converter switched state. Alternatively, the modulator can be adapted to directly specify the cell states, such as has been proposed for the harmonically optimal phase disposition (PD) strategy. However the techniques reported to date can lead to uneven distribution of switching transitions between cells, and the synthesis of narrow switched phase leg pulses. This paper presents an improved strategy that decouples the tasks of voltage level selection and switching event distribution. Conventional PD and centered space vector pulsewidth modulation (CSVPWM) strategies are used to define the target voltage level for the converter, and a finite state machine is then used to distribute the transitions to the converter cells in a cyclical fashion. Experimental results for a four-level flying capacitor inverter are presented, verifying that the natural balancing properties of this converter has been preserved, the cell switching utilization is equal and the expected harmonic gains of PD and CSVPWM compared to phase shifted carrier PWM have been achieved     

一种宽输入电压范围软开关电流型DC/DC转换器

针对太阳能光伏及燃料电池等领域电源需要较宽输入电压范围的需求,提出一种通用的具有较宽输入电压范围的软开关电流型DC/DC转换器。该转换器采用了固定频率混合调制设计,可以在所有工作条件下实现半导体器件的软开关工作,并采用电流馈电技术以便适用于低电压高电流的电源。相较于传统转换器,该转换器更为通用,能够实现零电压开关和零电流开关,并且能够在输入电压和负载变化出现较大变化时控制输出电压。实验结果显示,在20-60V输入电压范围内且负载出现变化时,该转换器均表现出良好的性能。     

Synthetic-ripple modulator for synchronous buck converter

Comprising a hysteretic comparator and a ripple synthesizer, the synthetic-ripple modulator (SRM) allows voltage-hysteretic modulation to be realized in low-voltage buck converters where the natural voltage ripple is too small for reliable hysteretic operation. Circuit implementation, steady-state operation, and design equations are described for an SRM controlling a buck dc-dc converter. The basics are verified experimentally by a buck converter switched at 420 kHz and delivering 10 A at 1.8 V.