Organozinc Compounds as Effective Dielectric Modification Layers for Polymer Field‐Effect Transistors

The interface between the organic semiconductor and dielectric plays an important role in determining the device performance of organic field‐effect transistors (OFETs). Although self‐assembled monolayers (SAMs) made from organosilanes have been widely used for dielectric modification to improve the device performance of OFETs, they suffer from incontinuous and lack uniform coverage of the dielectric layer. Here, it is reported that by introduction of a solution‐processed organozinc compound as a dielectric modification layer between the dielectric and the silane SAM, improved surface morphology and reduced surface polarity can be achieved. The organozinc compound originates from the reaction between diethylzinc and the cyclohexanone solvent, which leads to formation of zinc carboxylates. Being annealed at different temperatures, organozinc compound exists in various forms in the solid films. With organozinc modification, p‐type polymer FETs show a high charge carrier mobility that is about two‐fold larger than a control device that does not contain the organozinc compound, both for devices with a positive threshold voltage and for those with a negative one. After organozinc compound modification, the threshold voltage of polymer FETs can either be altered to approach zero or remain unchanged depending on positive or negative threshold voltage they have.     

Metal–Insulator–Semiconductor Coaxial Microfibers Based on Self‐Organization of Organic Semiconductor:Polymer Blend for Weavable,Fibriform Organic Field‐Effect Transistors

With the increasing importance of electronic textiles as an ideal platform for wearable electronic devices, requirements for the development of functional electronic fibers with multilayered structures are increasing. In this paper, metal–polymer insulator–organic semiconductor (MIS) coaxial microfibers using the self‐organization of organic semiconductor:insulating polymer blends for weavable, fibriform organic field‐effect transistors (FETs) are demonstrated. A holistic process for MIS coaxial microfiber fabrication, including surface modification of gold microfiber thin‐film coating on the microfiber using a die‐coating system, and the self‐organization of organic semiconductor–insulator polymer blend is presented. Vertical phase‐separation of the organic semiconductor:insulating polymer blend film wrapping the metal microfibers provides a coaxial bilayer structure of gate dielectric (inside) and organic semiconductor (outside) with intimate interfacial contact. It is determined that the fibriform FETs based on MIS coaxial microfiber exhibit good charge carrier mobilities that approach the values of typical devices with planar substrate. It additionally exhibits electrical property uniformity over the entire fiber surface and improved bending durability. Fibriform organic FET embedded in a textile is demonstrated by weaving MIS coaxial microfibers with cotton and conducting threads, which verifies the feasibility of MIS coaxial microfiber for use in electronic textile applications.     

Enhancement of Carrier Mobilities of Organic Semiconductors on Sol–Gel Dielectrics: Investigations of Molecular Organization and Interfacial Chemistry Effects

The dielectric‐semiconductor interfacial interactions critically influence the morphology and molecular ordering of the organic semiconductor molecules, and hence have a profound influence on mobility, threshold voltage, and other vital device characteristics of organic field‐effect transistors. In this study, p‐channel small molecule/polymer (evaporated pentacene and spin‐coated poly(3,3?;‐didodecylquarterthiophene) – PQT) and n‐channel fullerene derivative ({6}‐1‐(3‐(2‐thienylethoxycarbonyl)‐propyl)‐{5}‐1‐phenyl‐[5,6]‐C61 – TEPP‐C61) show a significant enhancement in device mobilities ranging from ～6 to ～45 times higher for all classes of semiconductors deposited on sol–gel silica gate‐dielectric than on pristine/octyltrichlorosilane (OTS)‐treated thermally grown silica. Atomic force microscopy, synchrotron X‐ray diffraction, photoluminescence/absorption, and Raman spectroscopy studies provide comprehensive evidences that sol–gel silica dielectrics‐induced enhancement in both p‐ and n‐channel organic semiconductors is attributable to better molecular ordering/packing, and hence reduced charge trapping centers due to lesser structural defects at the dielectric‐semiconductor interface.     

Printed and Electrochemically Gated,High‐Mobility,Inorganic Oxide Nanoparticle FETs and Their Suitability for High‐Frequency Applications

Solution‐processed or printed n‐channel field‐effect transistors (FETs) with high performance are not reported very often in the literature due to the scarcity of high‐mobility n‐type organic semiconductors. On the other hand, low‐temperature processed n‐channel metal oxide semiconductor (NMOS) transistors from electron conducting inorganic‐oxide nanoparticles show reduced‐performance and low mobility because of large channel roughness at the channel‐dielectric interface. Here, a method to produce ink‐jet printed high performance NMOS transistor devices using inorganic‐oxide nanoparticles as the transistor channel in combination with a 3D electrochemical gating (EG) via printed composite solid polymer electrolytes is presented. The printed FETs produced show a device mobility value in excess of 5 cm² V^?1 s^?1, even though the root mean square (RMS) roughness of the nanoparticulate channel exceeds 15 nm. Extensive studies on the frequency dependent polarizability of composite polymer electrolyte capacitors show that the maximum attainable speed in such printed, long channel transistors is not limited by the ionic conductivity of the electrolytes. Therefore, the approach of combining printable, high‐quality oxide nanoparticles and the composite solid polymer electrolytes, offers the possibility to fully utilize the large mobility of oxide semiconductors to build all‐printed and high‐speed devices. The high polarizability of printable polymer electrolytes brings down the drive voltages to ≤1 V, making such FETs well‐suited for low‐power, battery compatible circuitry.     

有机场效应晶体管最新实验研究进展

介绍了近两年新报道的有机半导体材料,列举了其场效应性能参数;综述了有机场效应晶体管(OFET)在器件结构上的改进,重点阐述了基于常见有机功能层材料富勒烯及其衍生物、并五苯、聚3-己基噻吩的OFET对栅介质层及有机功能层与电极的界面的改进,讨论了器件结构改进对OFET阈值电压、开关比、载流子迁移率的影响;介绍了衬底温度、退火处理对OF-ET性能的影响。最后,针对有机场效应晶体管研究现状,指出未来研究中应注重开发高迁移率、高薄膜稳定性的有机功能材料和高介电常数、高成膜质量的有机栅介质材料,继续优化器件结构,改进制备工艺以提高器件性能。     

Organic Field Effect Transistors Based on Graphene and Hexagonal Boron Nitride Heterostructures

Enhancing the device performance of single crystal organic field effect transistors (OFETs) requires both optimized engineering of efficient injection of the carriers through the contact and improvement of the dielectric interface for reduction of traps and scattering centers. Since the accumulation and flow of charge carriers in operating organic FETs takes place in the first few layers of the semiconductor next to the dielectric, the mobility can be easily degraded by surface roughness, charge traps, and foreign molecules at the interface. Here, a novel structure for high‐performance rubrene OFETs is demonstrated that uses graphene and hexagonal boron nitride (hBN) as the contacting electrodes and gate dielectric layer, respectively. These hetero‐stacked OFETs are fabricated by lithography‐free dry‐transfer method that allows the transfer of graphene and hBN on top of an organic single crystal, forming atomically sharp interfaces and efficient charge carrier‐injection electrodes without damage or contamination. The resulting heterostructured OFETs exhibit both high mobility and low operating gate voltage, opening up new strategy to make high‐performance OFETs and great potential for flexible electronics.     

Optimal Structure for High‐Performance and Low‐Contact‐Resistance Organic Field‐Effect Transistors Using Contact‐Doped Coplanar and Pseudo‐Staggered Device Architectures

A low contact resistance achieved on top‐gated organic field‐effect transistors by using coplanar and pseudo‐staggered device architectures, as well as the introduction of a dopant layer, is reported. The top‐gated structure effectively minimizes the access resistance from the contact to the channel region and the charge‐injection barrier is suppressed by doping of iron(III)trichloride at the metal/organic semiconductor interface. Compared with conventional bottom‐gated staggered devices, a remarkably low contact resistance of 0.1–0.2 kΩ cm is extracted from the top‐gated devices by the modified transfer line method. The top‐gated devices using thienoacene compound as a semiconductor exhibit a high average field‐effect mobility of 5.5–5.7 cm² V^?1 s^?1 and an acceptable subthreshold swing of 0.23–0.24 V dec^?1 without degradation in the on/off ratio of ≈10⁹. Based on these experimental achievements, an optimal device structure for a high‐performance organic transistor is proposed.     

Characterising gate dielectrics in high mobility devices using novel nanoscale techniques

Strained Si and strained SiGe layers can increase the speed of MOS devices through enhanced electron and hole mobilities compared with bulk Si. However, epitaxial growth of strained Si and SiGe layers induces surface roughness which impacts gate dielectric properties including leakage, breakdown and interface traps. Gate dielectric quality is conventionally studied at a macroscopic level on individual transistors or capacitors. To understand precisely the effect of roughness on the quality and reliability of dielectrics on high mobility substrate devices requires high spatial resolution characterisation techniques. Device processing modifies the dielectric/semiconductor interface compared with its initial form. Therefore nanoscale analysis on completed devices is necessary. In this work, we present new techniques to enable gate leakage analysis on a nanoscale in fully processed high mobility MOSFETs. This is achieved by careful selective removal of the gate from the dielectric followed by C-AFM measurements on the dielectric surface. Raman spectroscopy, AFM and SEM (EDX) confirmed complete layer removal. The techniques are applied to strained Si devices which have different surface morphologies and different macroscopic electrical data. Dielectric reliability is also assessed through device stressing.     

Self‐Assembled,Millimeter‐Sized TIPS‐Pentacene Spherulites Grown on Partially Crosslinked Polymer Gate Dielectric

Here, a highly crystalline and self‐assembled 6,13‐bis(triisopropylsilylethynyl) pentacene (TIPS‐Pentacene) thin films formed by simple spin‐coating for the fabrication of high‐performance solution‐processed organic field‐effect transistors (OFETs) are reported. Rather than using semiconducting organic small‐molecule–insulating polymer blends for an active layer of an organic transistor, TIPS‐Pentacene organic semiconductor is separately self‐assembled on partially crosslinked poly‐4‐vinylphenol:poly(melamine‐co‐formaldehyde) (PVP:PMF) gate dielectric, which results in a vertically segregated semiconductor‐dielectric film with millimeter‐sized spherulite‐crystalline morphology of TIPS‐Pentacene. The structural and electrical properties of TIPS‐Pentacene/PVP:PMF films have been studied using a combination of polarized optical microscopy, atomic force microscopy, 2D‐grazing incidence wide‐angle X‐ray scattering, and secondary ion mass spectrometry. It is finally demonstrated a high‐performance OFETs with a maximum hole mobility of 3.40 cm² V^?1 s^?1 which is, to the best of our knowledge, one of the highest mobility values for TIPS‐Pentacene OFETs fabricated using a conventional solution process. It is expected that this new deposition method would be applicable to other small molecular semiconductor–curable polymer gate dielectric systems for high‐performance organic electronic applications.     

Self-aligning planarization and passivation for integration applications in III-V semiconductor devices

This work reports an easy planarization and passivation approach for the integration of III-V semiconductor devices. Vertically etched III-V semiconductor devices typically require sidewall passivation to suppress leakage currents and planarization of the passivation material for metal interconnection and device integration. It is, however, challenging to planarize all devices at once. This technique offers wafer-scale passivation and planarization that is automatically leveled to the device top in the 1-3-/spl mu/m vicinity surrounding each device. In this method, a dielectric hard mask is used to define the device area. An undercut structure is intentionally created below the hard mask, which is retained during the subsequent polymer spinning and anisotropic polymer etch back. The spin-on polymer that fills in the undercut seals the sidewalls for all the devices across the wafer. After the polymer etch back, the dielectric mask is removed leaving the polymer surrounding each device level with its device top to atomic scale flatness. This integration method is robust and is insensitive to spin-on polymer thickness, polymer etch nonuniformity, and device height difference. It prevents the polymer under the hard mask from etch-induced damage and creates a polymer-free device surface for metallization upon removal of the dielectric mask. We applied this integration technique in fabricating an InP-based photonic switch that consists of a mesa photodiode and a quantum-well waveguide modulator using benzocyclobutene (BCB) polymer. We demonstrated functional integrated photonic switches with high process yield of >90%, high breakdown voltage of >25 V, and low ohmic contact resistance of /spl sim/10 /spl Omega/. To the best of our knowledge, such an integration of a surface-normal photodiode and a lumped electroabsorption modulator with the use of BCB is the first to be implemented on a single substrate.     

Anisotropy of Charge Transport in a Uniaxially Aligned and Chain‐Extended,High‐Mobility,Conjugated Polymer Semiconductor

Charge transport in the ribbon phase of poly(2,5‐bis(3‐alkylthiophen‐2‐yl)thieno[3,2‐b]thiophene) (PBTTT)—one of the most highly ordered, chain‐extended crystalline microstructures available in a conjugated polymer semiconductor—is studied. Ribbon‐phase PBTTT has previously been found not to exhibit high carrier mobilities, but it is shown here that field‐effect mobilities depend strongly on the device architecture and active interface. When devices are constructed such that the ribbon‐phase films are in contact with either a polymer gate dielectric or an SiO₂ gate dielectric modified by a hydrophobic, self‐assembled monolayer, high mobilities of up to 0.4 cm² V^?1 s^?1 can be achieved, which is comparable to those observed previously in terrace‐phase PBTTT. In uniaxially aligned, zone‐cast films of ribbon‐phase PBTTT the mobility anisotropy is measured for transport both parallel and perpendicular to the polymer chain direction. The mobility anisotropy is relatively small, with the mobility along the polymer chain direction being higher by a factor of 3–5, consistent with the grain size encountered in the two transport directions.     

A Facile Method for the Growth of Organic Semiconductor Single Crystal Arrays on Polymer Dielectric toward Flexible Field‐Effect Transistors

Polymer dielectrics with intrinsic mechanical flexibility are considered as a key component for flexible organic field‐effect transistors (OFETs). However, it remains a challenge to fabricate highly aligned organic semiconductor single crystal (OSSC) arrays on the polymer dielectrics. Herein, for the first time, a facile and universal strategy, polar surface‐confined crystallization (PSCC), is proposed to grow highly aligned OSSC arrays on poly(4‐vinylphenol) (PVP) dielectric layer. The surface polarity of PVP is altered periodically with oxygen‐plasma treatment, enabling the preferential nucleation of organic crystals on the strong‐polarity regions. Moreover, a geometrical confinement effect of the patterned regions can also prevent multiple nucleation and misaligned molecular packing, enabling the highly aligned growth of OSSC arrays with uniform morphology and unitary crystallographic orientation. Using 2,7‐dioctyl[1]benzothieno[3,2‐b]benzothiophene (C8‐BTBT) as an example, highly aligned C8‐BTBT single crystal arrays with uniform molecular packing and crystal orientation are successfully fabricated on the PVP layer, which can guarantee their uniform electrical properties. OFETs made from the C8‐BTBT single crystal arrays on flexible substrates exhibit a mobility as high as 2.25 cm² V^?1 s^?1, which has surpassed the C8‐BTBT polycrystalline film‐based flexible devices. This work paves the way toward the fabrication of highly aligned OSSCs on polymer dielectrics for high‐performance, flexible organic devices.     

Probing the Anisotropic Field‐Effect Mobility of Solution‐Deposited Dicyclohexyl‐α‐quaterthiophene Single Crystals

Measuring the anisotropy of the field‐effect mobility provides insight into the correlation between molecular packing and charge transport in organic semiconductor materials. Single‐crystal field‐effect transistors are ideal tools to study intrinsic charge transport because of their high crystalline order and chemical purity. The anisotropy of the field effect mobility in organic single crystals has previously been studied by lamination of macroscopically large single crystals onto device substrates. Here, a technique is presented that allows probing of the mobility anisotropy even though only small crystals are available. Crystals of a soluble oligothiophene derivative are grown in bromobenzene and drop‐cast onto substrates containing arrays of bottom‐contact gold electrodes. Mobility anisotropy curves are recorded by measuring numerous single crystal transistor devices. Surprisingly, two mobility maxima occur at azimuths corresponding to both axes of the rectangular cyclohexyl‐substituted quaterthiophene (CH4T) in‐plane unit cell, in contrast to the expected tensorial behavior of the field effect mobility.     

High permittivity dielectrics for poly(3-alkylthiophene) field-effect transistor devices

In an attempt to disentangle the effects of permittivity and surface energy of the gate insulator (expressed by its dielectric constant k and water contact angle, respectively) on the performance of organic field-effect transistors (FETs), we fabricated top- and bottom-gate FET architectures with poly(3-alkylthiophenes) (P3ATs) of different side-chain lengths, using a range of gate dielectrics. We find that this class of semiconductor, including the short butyl-(C₄-) substituted derivative, is significantly less susceptible to the often detrimental effects that high-k dielectrics can have on the performance of many organic FETs. For bottom gate devices we identify the surface energy of the gate dielectric to predominantly dictate the device mobility.     

Flexible organic field-effect transistors with TIPS-Pentacene crystals exhibiting high electrical stability upon bending

Flexible organic field-effect transistors with high electrical stability upon bending are demonstrated on indium tin oxide coated polyethylene terephthalate substrates with TIPS-Pentacene semiconductor crystals formed by drop casting on a hybrid gate dielectric consisting hafnium dioxide grown by atomic layer deposition and spin coated poly(4-vinylphenol). Fabricated devices exhibited excellent p-channel characteristics with field-effect mobility up to 0.12 cm²/Vs with high current on/off ratio >10⁴ and low threshold voltage of −0.2 V. Device performance was slightly affected by mechanical strain applied by bending for 5 min with radius varying from 12.5 mm to as low as 5.0 mm; and a high stability in performance was demonstrated upon applying constant tensile strain for more than 48 h at bending radius of 5.0 mm. It was found that strain induced changes in the device performance primarily occur due to increase in dielectric surface roughness; and the semiconductor-dielectric interface uniformity is influenced more with magnitude of strain rather than its duration.     

Inkjet‐Printed Single‐Droplet Organic Transistors Based on Semiconductor Nanowires Embedded in Insulating Polymers

Fabrication of organic field‐effect transistors (OFETs) using a high‐throughput printing process has garnered tremendous interest for realizing low‐cost and large‐area flexible electronic devices. Printing of organic semiconductors for active layer of transistor is one of the most critical steps for achieving this goal. The charge carrier transport behavior in this layer, dictated by the crystalline microstructure and molecular orientations of the organic semiconductor, determines the transistor performance. Here, it is demonstrated that an inkjet‐printed single‐droplet of a semiconducting/insulating polymer blend holds substantial promise as a means for implementing direct‐write fabrication of organic transistors. Control of the solubility of the semiconducting component in a blend solution can yield an inkjet‐printed single‐droplet blend film characterized by a semiconductor nanowire network embedded in an insulating polymer matrix. The inkjet‐printed blend films having this unique structure provide effective pathways for charge carrier transport through semiconductor nanowires, as well as significantly improve the on‐off current ratio and the environmental stability of the printed transistors.     

Contact Resistance in Organic Field‐Effect Transistors: Conquering the Barrier

Organic semiconductors have sparked interest as flexible, solution processable, and chemically tunable electronic materials. Improvements in charge carrier mobility put organic semiconductors in a competitive position for incorporation in a variety of (opto‐)electronic applications. One example is the organic field‐effect transistor (OFET), which is the fundamental building block of many applications based on organic semiconductors. While the semiconductor performance improvements opened up the possibilities for applying organic materials as active components in fast switching electrical devices, the ability to make good electrical contact hinders further development of deployable electronics. Additionally, inefficient contacts represent serious bottlenecks in identifying new electronic materials by inhibiting access to their intrinsic properties or providing misleading information. Recent work focused on the relationships of contact resistance with device architecture, applied voltage, metal and dielectric interfaces, has led to a steady reduction in contact resistance in OFETs. While impressive progress was made, contact resistance is still above the limits necessary to drive devices at the speed required for many active electronic components. Here, the origins of contact resistance and recent improvement in organic transistors are presented, with emphasis on the electric field and geometric considerations of charge injection in OFETs.     

C8 BTBT薄膜结晶形貌及OTFT器件性能研究

以p型共轭有机小分子2,7二辛基[1]苯并噻吩并[3,2‐b]苯并噻吩(C8‐BTBT)作为底栅顶接触有机薄膜晶体管(OTFT)的有源层,采用浸渍提拉法、喷墨打印法和真空蒸镀法三种制备工艺,探究半导体薄膜载流子迁移率与结晶形貌的关系,发现不同工艺下有机小分子呈现出不同的生长行为和结晶情况,在很大程度上决定了OTFT器件性能的优劣;此外,通过XRD分析研究了退火处理对C8‐BTBT结晶的影响。结果表明,真空蒸镀制备的薄膜具有更高的结晶度、衬底覆盖率高,并且呈现出SK(Stranski‐Krastanov)模式的结晶生长特征,相应器件中陷阱密度最低,迁移率高达5.44 cm^2·V^-1·s^-1,开关比超过106;且退火处理会严重破坏C8‐BTBT薄膜的结晶。因此,控制半导体层的生长行为,提升半导体层的覆盖率和结晶度是制备高性能共轭小分子OTFT器件的有效途径。     

Porous Organic Field‐Effect Transistors for Enhanced Chemical Sensing Performances

The thin‐film structures of chemical sensors based on conventional organic field‐effect transistors (OFETs) can limit the sensitivity of the devices toward chemical vapors, because charge carriers in OFETs are usually concentrated within a few molecular layers at the bottom of the organic semiconductor (OSC) film near the dielectric/semiconductor interface. Chemical vapor molecules have to diffuse through the OSC films before they can interact with charge carriers in the OFET conduction channel. It has been demonstrated that OFET ammonia sensors with porous OSC films can be fabricated by a simple vacuum freeze‐drying template method. The resulted devices can have ammonia sensitivity not only much higher than the pristine OFETs with thin‐film structure but also better than any previously reported OFET sensors, to the best of our knowledge. The porous OFETs show a relative sensitivity as high as 340% ppm^?1 upon exposure to 10 parts per billion (ppb) NH₃. In addition, the devices also exhibit decent selectivity and stability. This general and simple strategy can be applied to a wide range of OFET chemical sensors to improve the device sensitivity.