Performance analysis of multilayer graphene nanoribbon (MLGNR) interconnects

This paper addresses the impact of interlayer resistance due to c-axis resistivity and contact resistance on performance in terms of delay, power dissipation and power delay product (PDP) of Multi-layer graphene nanoribbon (MLGNR) interconnect. The impact of model parameter i.e. Fermi energy \((\hbox {E}_\mathrm{F})\) on performance of MLGNR is also discussed. A similar analysis is performed for copper interconnect and results are compared with MLGNR at 22 nm technology node. The impact of interlayer resistance on equivalent resistance of MLGNR is critically analyzed. Inductive and capacitive coupling between the adjacent layers are included in this analysis. It is found that the MLGNR with interlayer resistance, compared to copper, gives better performance in terms of delay, power dissipation and PDP with higher value of Fermi energy for semi global to global lengths of interconnect (300–1000 \(\upmu \hbox {m})\) whereas reverse is true for local lengths 100–200 \((\upmu \hbox {m})\). In addition, performance gap between MLGNR with and without interlayer resistance decreases with increase in Fermi energy.     

Crosstalk noise analysis in ternary logic multilayer graphene nanoribbon interconnects using shielding techniques

This paper presents an accurate structure for multilayer graphene nanoribbon (MLGNR) bundled interconnects to reduce the effects of crosstalk in ternary logic circuits. In the proposed structures, the signal line is surrounded by the shielding lines to reduce the crosstalk effects. The crosstalk effects such as noise peak, noise area, delay, and power consumptions are compared to effects produced by conventional methods. The impacts of process variation in the proposed structures are also presented. Additionally, the proposed MLGNR interconnect results are compared with the carbon nanotube interconnections. All the proposed circuits are implemented and simulated using HSPICE tool. The simulation results indicated that the passively shielded MLGNR interconnects provide lower crosstalk effects up to 47.7% and 69.4%, respectively, over the active and without shielded interconnects.     

CDMA移频直放站的规划和应用

本文通过对CDMA移频直放站的分析介绍,讨论了直放站对基站接受灵敏度的影响,并利用上下链路分析提出了移频直放站规划设计的思路和方法.     

The design of a graphene nanoribbon field-effect transistor with reduced internal fringe capacitance for application in the gigahertz to terahertz frequency range

Journal of Computational Electronics - The ultrahigh-frequency (from several GHz to THz) performance of a graphene nanoribbon field-effect transistor (GNRFET) is analyzed using a semiquantum...     

Double gate graphene nanoribbon field effect transistor with electrically induced junctions for source and drain regions

In this paper a novel graphene nanoribbon transistor with electrically induced junction for source and drain regions is proposed. An auxiliary junction is used to form electrically induced source and drain regions beside the main regions. Two parts of same metal are implemented at both sides of the main gate region. These metals which act as side gates are connected to each other to form auxiliary junction. A fixed voltage is applied on this junction during voltage variation on other junctions. Side metals have smaller workfunction than the middle one. Tight-binding Hamiltonian and nonequilibrium Green’s function formalism are used to perform atomic scale electronic transport simulation. Due to the difference in metals workfunction, additional gates create two steps in potential profile. These steps increase horizontal distance between conduction and valance bands at gate to drain/source junction and consequently lower band to band tunneling probability. Current ratio and subthreshold swing improved at different channel lengths. Furthermore, device reliability is improved where electric field at drain side of the channel is reduced. This means improvement in leakage current, hot electron effect behavior and breakdown voltage. Application to multi-input logic gates shows higher speed and smaller power delay product in comparison with conventional platform.     

Crosstalk reduction in copper on-chip interconnects with graphene barrier for ternary logic applications

This paper presents the investigations of crosstalk effects in ternary logic-based coupled interconnects. The crosstalk analysis is investigated for coupled copper interconnects and copper-multilayer graphene (Cu-MLG) interconnects. In Cu-MLG interconnects, the Cu interconnect is enclosed with MLG barrier and standard ternary inverter is used to drive the interconnect. Based on the industry standard HSPICE simulation results, the crosstalk effects such as noise peak and delay are lower compared with conventional Cu interconnects. Moreover, the Cu-MLG interconnects show reduced power dissipation, power delay product (PDP), and energy delay product (EDP) over the Cu interconnects. From the simulation results, it is observed that the Cu-MLG interconnects provides the performance improvements up to 30.67% compared with the Cu interconnects. Thus, the Cu-MLG interconnects are more compatible for ternary logic integrated circuits compared with traditional Cu interconnects.     

An ultra-energy-efficient crosstalk-immune interconnect architecture based on multilayer graphene nanoribbons for deep-nanometer technologies

An ultra-energy-efficient interconnect structure based on multilayer graphene nanoribbon (MLGNR) interconnects for deep-nanometer technologies is proposed herein. First, a low-swing interconnect based on MLGNRs and high-performance interface circuits using carbon nanotube field-effect transistors (CNTFETs) is proposed. Then, an ultra-energy-efficient interconnect structure is obtained by actively shielding such low-swing lines. The structures under study are simulated comprehensively at the 7-nm technology node. The results indicate that the MLGNR interconnect is significantly more energy efficient than its multiwall carbon nanotube (MWCNT) counterpart in the low-voltage regime. Moreover, the proposed approach is superior to its MLGNR counterparts. The proposed structure leads to 86%, 75%, and 31% lower energy consumption over a length of 500 µm as compared with the typical, actively shielded, and low-swing MLGNR interconnects, respectively. Moreover, the impact of the ratio of the widths of the signal line to the shield line on the performance of the interconnects is evaluated. The energy consumption reduction achieved by the proposed approach is mostly preserved even when using minimum-width shield lines on wider signal lines to reduce the area overhead. Moreover, the impact of process variations on the performance of the interconnects is assessed using Monte Carlo simulations, demonstrating the robustness of the proposed approach.

     

IO circuit design for 2.5D through‐silicon‐interposer interconnects

This paper presents four topologies of voltage‐mode un‐terminated IO cells in 28‐nm CMOS for single‐ended rail‐to‐rail signaling over a passive interposer die in 2.5D configuration for >1Gbps data rates. The presented design explores the existing IO design‐space from a 2.5D viewpoint, optimizing existing topologies from area, speed, power and protection perspectives, with a higher degree of configurability in the form of pre‐emphasis and slew‐rate control. The transmitter (TX) embeds pre‐emphasis to enhance high‐frequency components of the signal for longer low‐pass natured channels. The TX also implements slew‐rate control to minimize reflections on shorter channels because of impedance discontinuities and also to minimize simultaneous switching noise. Level‐shifting capability embedded in the receiver (RX) enables multi‐technology interfacing where different dies are signaling at their core voltages (range: 0.7 V–1.8 V) instead of following a particular signaling standard. The measurement results of the transceivers, over a interposer of length of 3.5 mm, demonstrate ±5% duty‐cycle distortion with 700 μW at 500 MHz/0.8‐V‐signaling on the channel with jitter of 20 ps, ±10% duty‐cycle distortion with 1.8 mW at 1Gbps/0.9‐V signaling with jitter of 20 ps, ±10% duty‐cycle distortion with 2 mW at 2Gbps/0.7‐V signaling for 1‐V receiver core voltage with a jitter of 10 ps. Copyright © 2016 John Wiley & Sons, Ltd.     

大容量混合有源滤波器多目标优化设计

针对混合有源滤波器参数设计问题,提出基于粒子群优化算法的混合滤波装置的多目标优化设计方法.建立混合有源滤波器的多目标满意优化模型,综合考虑系统成本、无功补偿容量及滤波效果等因素,并将滤波器对于失谐因素影响的鲁棒性测试作为一个约束条件放在优化过程中进行判决,以提高设计结果的实用性.通过将各个子目标函数模糊化,并选择最大关联满意度作为最后的寻优变量,解决了多目标优化问题.仿真与模拟实验结果表明:采用该优化设计方法设计的混合有源滤波器可以同时满足成本、谐波抑制以及无功补偿多方面要求,而且该优化设计方法算法简单、操作方便.     

STATCOM模糊控制的综合优化设计

针对严重非线性静止同步补偿器模糊逻辑控制隶属函数的参数和模糊控制规则调整困难的问题,根据微遗传算法,并利用模糊系统的逼近能力,提出了一种模糊控制综合优化设计方法.选择模糊控制器的输入/输出观测信号,应用MATLAB中的模糊控制工具箱快速地获得初始的模糊控制规则,再采用微遗传算法优化其隶属函数参数和模糊控制规则,并给出了模糊控制规则优化后的结果.对带有一个静止同步补偿器的四机电力系统,在三种不同的负荷和三种不同的控制方式下进行仿真实验,结果表明:在宽负荷变化范围内,该控制器的追踪控制能力和鲁棒性等比常规的超前滞后控制、未优化模糊控制都优越.     

Integrity of the tubes used in vertical and horizontal steam generators

Statistical data on experience gained from operation of steam generators around the world are presented, problems arising in vertical and horizontal steam generators are described, and the conditions of heattransfer tubes used in them are compared.     

无源滤波器多目标优化设计及实验仿真

针对现有无源电力滤波器的设计方法中过分依赖经验和优化能力不强的情况,利用改进遗传算法的全局寻优能力,提出了一种基于遗传算法的无源电力滤波器设计方法,即从无源滤波器的成本、无功补偿和滤波效果3个目标全局优化.通过适应度函数的阈值制约以及以不同概率进行染色体选择操作,使得种群朝3个目标最佳协调点的方向进化.通过混沌算子来解决早熟收敛的问题.最后利用PSIM软件建立仿真模型,仿真实验结果说明了该方法在无源滤波器优化设计中的有效性和正确性.     

Probabilistic multicriteria analyses for optimal biomass power plant design

The design of biomass power plants is traditionally performed by using a deterministic approach. The deterministic model takes into account energetic, local and social factors to maximize the plant economic profit. When dealing with renewable energy applications, uncertainty, which involves unpredictable factors having a major influence, has recently been recognized as an important factor. In order to take into account the stochastic nature of uncertainty, probabilistic approaches have been widely applied to electric power system design and management [G.J. Anders, Probability Concepts in Electric Power Systems, Wiley-Interscience, 1990].     

太阳能路灯系统优化设计探讨

随着太阳能电池转换效率和生产技术的不断提高,太阳能光伏发电的应用越来越广泛.在照明领域,太阳能路灯作为光伏发电系统的主要应用模式,被越来越多地关注和接受.本文对太阳能路灯系统优化设计提出了自己的观点,并针对太阳能路灯系统储能部件--蓄电池提出了防水型阀控式铅酸蓄电池的概念和技术发展方向.     

Microoptical fiber switch for a large number of interconnects:optical design considerations and experimental realizations usingmicrolens arrays

The authors investigate a 1 × N free-space microoptical fiber switch for a large number of interconnects. The system to be studied is a reflective 4f optical system. Alignment tolerances and coupling efficiency are investigated and the benefit brought by collimating microlens arrays is reported (theoretically and experimentally). The use of microlenses enables power coupling efficiency between 3 and 2 dB (including losses due to the optical elements) for an optical switch allowing up to 3000 receiver fibers     

三电平变流器开关频率优化设计方法研究

开关频率作为变流器的重要参数,直接影响着系统运行时的效率与损耗分布,然而目前对其优化设计方法的讨论却较少。以NPC三电平拓扑为背景,在分析系统的工作原理后,推导各器件损耗关于开关频率的函数,并将变流器系统作为一个整体进行效率优化,从而获得开关频率设计方法。最后利用PLECS软件仿真以及实验验证了设计的正确性与可行性。     

An optimal design method for efficiency of permanent magnet motors

In optimal design of a permanent magnet (PM) motor, many design variables are required to consider some device properties. These variables are, for example, the shape of core and magnet, the tooth length, the number of turns, and the winding radius. Moreover, many restrictions must be considered in practical PM motor design. These restrictions are, for example, the slot space factor and the cogging torque. However, the optimization problem, which has many design variables by the finite element method (FEM), has not been reported. In this paper, the efficiency of PM motor under the considerations given above is optimized by using FEM and optimization algorithm. In this problem, an objective function has many local minima and it is difficult to calculate its gradient. For these reasons, the genetic algorithm (GA) and simulated annealing method (SA), which are stochastic methods, are used for optimization method, because of the possibility of global range search and because gradient calculation is not required. Adding to both optimization methods, in this paper, SA combined with GA is used for one of the optimization methods. It is found that the solutions optimized by these methods are reasonable from an engineering point of view. © 2001 Scripta Technica, Electr Eng Jpn, 138(3): 72–79, 2002     

变电站二次设备的布置方式及设计优化

提出了一套变电站二次设备分散布置到高压开关场内的设计优化方案，以弥补现行工程设计及实施中存在的不足，除了考虑保护小室的屏蔽效能外，还应尽量缩短电缆长度，按保护控制对象分块组屏可减少屏数，屏间电缆接线；采用分布式母线保护，避免保护屏间接线出保护小；将高频保护的通道设备配置在保护小室内；可以缩短高频通信电缆；旁路保护按保护小室配置；通道切换接线可不出保护小室；将直流电源设备配置在保护小室内，取消接入直流电源的长电缆。分散布置采用上述措施后，不仅可进一步减少控制电缆及相关投资，而且能更有效地缓解电磁强干扰对保护和控制设备和损坏，以及防止不正确动作行为的发生。