A compact planar ultra-wideband bandpass filter with multiple resonant and defected ground structure

A compact bandpass filter with dumbbell shape Defected Ground Structure (DGS) operating on ultra wide pass band (UWB – 3.1 to 10.6 GHz) is proposed. It is based on hybrid microstrip coplanar waveguide (dual sided metal) structure. A Multiple Resonant Structure (MRS) is constructed using coplanar waveguide (CPW) planar transmission line. The MRS makes the resonance using quarter wavelength and half wavelength open-ended CPW. The equispaced three resonances at lower (3.1 GHz), center (6.85 GHz) and higher edge (10.6 GHz) of the whole Ultra Wide Band is achieved using CPW MRS. To make the band as flat as possible, two more resonances are introduced using quarter wavelength microstrip patches on top of the commonly shared substrate, so the proposed filter becomes a five pole bandpass filter. A dumbbell shaped defected ground structure on either side of CPW MRS improves the return loss almost less than 20 dB over the whole UWB passband. The simulated results of proposed filter show good transmission response within passband and good rejection in out of the band. The simulated and measured results are very close to each other which proves the efficacy of proposed design.     

RF measurements to pinpoint defects in inkjet-printed,thermally and mechanically stressed coplanar waveguides

In this work 10-GHz-band RF measurement and microscopy characterizations were performed on thermally and mechanically long-term-stressed coplanar waveguides (CPW) to observe electrical and mechanical degradation in 1-mm-thick PPO/PPE polymer substrates with inkjet-printed Ag conductors. The structure contained two different CPW geometries in a total of 18 samples with 250/270 μm line widths/gaps and 670/180 μm line widths/gaps. A reliability test was carried out with three sets. In set #1 three 250 μm and three 670 μm lines were stored in room temperature conditions and used as a reference. In set #2 six samples were thermally cycled (TC) for 10,000 cycles, and in set #3 six samples were thermally cycled and bent with 6 mm and 8 mm bending diameters.Thermal stressing was done by cycling the samples in a thermal cycling test chamber operating at 0/100 °C with 15-minutes rise, fall, and dwell times, resulting in a one-hour cycle. The samples were analyzed during cycling breaks using a vector network analyzer (VNA). In addition to optical microscopy, field emission scanning electron microscopy (FESEM) and atomic force microscopy (AFM) imaging were used to mechanically characterize the structures.The results showed that the line width of 670 μm had better signal performance and better long-term reliability than the line width of 250 μm. In this study, the average limit for proper RF operation was 2500 thermal cycles with both line geometries. The wide CPW lines provided more stable characteristics than the narrow CPW lines for the whole 10,000-cycle duration of the test, combined with repeated bending with a maximum bending radius of 6 mm. A phenomenon of nanoparticle silver protruding from cracks in the print of the bent samples was observed, as well as fracturing of the silver print in the CPW lines.     

Design,fabrication and characterization of miniature RF MEMS switched capacitor based phase shifter

This paper aims to present in detail the design, fabrication and the various characterization techniques adopted in realizing a novel miniature-size switched capacitor based phase shifter. The work strives to provide an all-round development of a DMTL (Distributed MEMS Transmission Line) based phase shifting unit yielding an overall phase shift of 15° at a frequency of 15 GHz. The RF MEMS (Radio Frequency Micro Electro Mechanical Systems) Switched Capacitor based phase shifter has highly miniaturized dimensions, and is capable of solving many limitations to which the conventional Switched Capacitors are mostly susceptible. This miniature RF MEMS switched capacitor actuates at a low actuation voltage of 12 V, exhibits a fundamental frequency of vibration as high as 1.468 MHz and a switching time of 1.4 µs which is an improvement over the other reported designs. Various characterization results seem to validate the simulations.     

Amorphous SiC as a structural layer in microbridge-based RF MEMS switches for use in software-defined radio

This paper reports an effort to develop amorphous silicon carbide (a-SiC) films for use in shunt capacitor RF MEMS microbridge-based switches. The films were deposited using methane and silane as the precursor gases. Switches were fabricated using 500 nm and 300 nm-thick a-SiC films to form the microbridges. Switches made from metallized 500 nm-thick SiC films exhibited favorable mechanical performance but poor RF performance. In contrast, switches made from metallized 300 nm-thick SiC films exhibited excellent RF performance but poor mechanical performance. Load-deflection testing of unmetallized and metallized bulk micromachined SiC membranes indicates that the metal layers have a small effect on the Young’s modulus of the 500 nm and 300 nm-thick SiC MEMS. As for residual stress, the metal layers have a modest effect on the 500 nm-thick structures, but a significant affect on the residual stress in the 300 nm-thick structures.     

On design of a novel class of selective CIC FIR filter functions with improved response

The Cascaded-Integrator-Comb (CIC) filter is a non-recursive (FIR) filter which is multiplier free, consisting only of two building blocks (simple integrator stage and simple comb filter stage) and has a linear phase. This paper summarizes some key points of classical CIC filters and proposes a novel class of CIC FIR filter functions. A novel class of CIC filter functions maintains simplicity of FIR filters by avoiding the multipliers, but shows excellent performances in term of insertion loss in stopband and selectivity with respect to conventional CIC filters. A set of simulations along with illustrative examples is conducted in order to compare the attenuation characteristics of the classical CIC filter functions and the proposed novel class of selective CIC FIR filter functions. For the same level of a constant group delay τ = 45.5 s, a classical CIC filter function has insertion loss of 166.3 dB, and designed novel filter function has a higher level of insertion loss 206.55 dB.     

A 0.1–1 GHz low power RF receiver front-end with noise cancellation technique for WSN applications

A low power 0.1–1 GHz RF receiver front-end composed of noise-cancelling trans-conductor stage and I/Q switch stage was presented in this paper. The RF receiver front-end chip was fabricated in 0.18 µm RF CMOS. Measurement results show the receiver front-end has a conversion gain of 28.1 dB at high gain mode, and the single-sideband (SSB) noise figure is 6.2 dB. In the low gain mode, the conversion gain of the receiver front-end is 15.5 dB and the IP1dB is −12 dBm. In this design, low power consumption and low cost is achieved by current-reuse and inductor-less topology. The receiver front-end consumes only 5.2 mW from a 1.8 V DC supply and the chip size of the core circuit is 0.12 mm².     

A low power and small area digital self-calibration technique for pipeline ADC

A digital self-calibration implementation with discontinuity-error and gain-error corrections for a pipeline analog-to-digital converter (ADC) is presented. In the proposed calibration method, the error owing to each reference unit capacitor of the multiplying D/A converter is measured separately using a calibration capacitor and an enhanced resolution back-end pipeline ADC acting as an error quantizer. The offset and finite open loop DC-gain of the operational amplifier and capacitor mismatches, the reference voltage mismatch can all be calibrated. The calibration can be achieved by that only used addition and subtraction. Hence, it needs low power and area consuming. A prototype ADC with the proposed calibration was fabricated on a 0.5 μm double-poly triple-metal CMOS process. The power consumption and area of the calibration circuit are only 10.1 mW and 1.05 mm², respectively. At a sampling rate of 30 MS/s, the calibration improves the DNL and INL from 2.59 LSB and 14.98 LSB to 0.72 LSB and 1.82 LSB, respectively. For a 1.25 MHz sinusoidal signal, the calibration improves the signal-to-noise-distortion ratio and spurious-free dynamic range from 43.1 dB and 52.1 dB to 75.51 dB and 83.61 dB, respectively. The 12.25 effective number of bits at 30 MS/s ADC consumes a total power of 136 mW.     

A hybrid ring coupler quasi-optical antenna-mixer

This paper proposes a hybrid ring coupler quasi-optical antenna-mixer for mitigating local oscillator retransmission. By demonstrating at K-band, the antenna element consists of back-to-back aperture coupled inverted square patch antenna to couple the RF signal at 18.8 GHz to the sigma port of a hybrid ring mixer while the LO signal at 17.5 GHz is coupled to the delta port. The HSCH-9101 Schottky diodes are used to transform the RF signal to the intermediate frequency signal at 1.3 GHz. The results show that the RF/LO isolation is better than 29 dB at 18.19 GHz, and the isotropic conversion loss of the down converted signal is better than 16 dB at 19.25 GHz. The application of the interest is an inverse measurement technique for dielectric property determination.     

A low-voltage low-power CMOS fully differential linear transconductor with mobility reduction compensation

A highly linear fully differential CMOS transconductor architecture based on flipped voltage follower (FVF) is proposed. The linearity of the proposed architecture is improved by mobility reduction compensation technique. The simulated total harmonic distortion (THD) of the proposed transconductor with 0.4V_pp differential input is improved from ?42 dB to ?55 dB while operating from 1.0 V supply. As an example of the applications of the proposed transconductor, a 4th-order 5 MHz Butterworth Gm-C filter is presented. The filter has been designed and simulated in UMC 130 nm CMOS process. It achieves THD of ?53 dB for 0.4V_pp differential input. It consumes 345 μw from 1.0 V single supply. Theoretical and simulated results are in good agreement.     

A 24-dB Ku-band low-power linearized 90-nm amplifier with a built-in output buffer

In this paper, we present a 90-nm high gain (24 dB) linearized CMOS amplifier suitable for applications requiring high degree of port isolation in the K_u-band (13.2–15.4 GHz). The two-stage design is composed of a low-noise common-gate stage and a gain-boosting cascode block with an integrated output buffer for measurement. Optimization of input stage and load-port buffer parameters improves the front-end's linear coverage, port return-loss, and overall gain without burdening its power demand and noise contribution. With low gate bias voltages (0.65–1.2 V) and an active current source, <?10 dB port reflection loss and 3.25–3.41 dB NF are achieved over the bandwidth. The input reflection loss of the overall amplifier lies between ?35 and ?10 dB and the circuit demonstrates a peak forward gain of 24 dB at 14.2 GHz. The output buffer improves the amplifier's forward gain by ～9 dB and pushes down the minimum output return loss to ?22.5 dB while raising the front-end NF by only 0.05 dB. The effect of layout parasites is considered in detail in the 90-nm process models for accurate RF analysis. Monte Carlo simulation predicts 9% and 8% variation in gain and noise figures resulting from a 10% mismatch in process. The K_u-band amplifier including the buffer block consumes 7.69 mA from a 1.2-V supply. The proposed circuit techniques achieve superior small signal gain, GHz-per-milliwatt, and range of linearity when compared with simulated results of reported microwave amplifiers.     

High linearity,low power RF mixer design in 65 nm CMOS technology

A design of RF down-conversion Gilbert-Cell, with 65 nm CMOS technology, at a supply voltage of 1.8 V, with a new degenerating structure to improve linearity. This architecture opens the way to more integrated CMOS RF circuits and to achieve a good characteristics in terms of evaluating parameters of RF mixers with a very low power consumption (2.17 mW). At 1.9 GHz RF frequency; obtained results show a third order input intercept point (IIP3) equal to 11.6 dBm, Noise Figure (NF) is 4.12 dB, when conversion gain is 8.75 dB.     

Utility of RF MEMS miniature switched capacitors in phase shifting applications

This paper demonstrates research carried out towards the development of switched capacitors having miniature dimensions. Such devices are based on the Radio Frequency Micro Electro Mechanical Systems (RF MEMS) technique which has gained prominence in implementing a wide variety of microwave and millimetre devices till date. Switched capacitors having standard or conventional dimensions are prone to several limitations which are addressed by scaling down the standard dimensions by 150× times (in terms of area requirement). Such switched capacitors are employed to develop phase shifters working in K-band (22 GHz) frequency range to yield appreciable performance both in terms of electromechanical and RF characterizations. Such switched capacitors are utilized to develop phase shifters which find immense applications in the design of Phased Array RADARs. Switched capacitors fabricated on 500 µm thick quartz substrates, result in 30° phase shift (0.66 mm × 1 mm in dimension) with associated minimum −0.18 dB insertion loss and better than −21 dB reflection coefficient at 22 GHz frequency. Electromechanical characterization reports an actuation voltage of 14.6 V, mechanical vibration frequency of 2.5 MHz and a switching time of 620 ns respectively. Demonstrations showing complete realization of 180° phase shifter (4 mm × 1 mm) employing a cascaded arrangement of six similar 30° unit cells are also included in this paper.     

Generation of a 50-tone optical frequency comb with a tone-to-noise ratio larger than 37 dB

By inserting an asymmetric Mach–Zehnder interferometer (AMZI) into the re-circulating frequency shift loop, we experimentally obtained a 50-tone optical frequency comb with a tone-to-noise ratio larger than 37 dB. The simulation and experimental results show that the amplified spontaneous emission (ASE) noise of the optical frequency comb can be suppressed by 3 dB after the first loop, and the tone-to-noise ratio of the 50-tone optical frequency comb is enhanced by 23.5 dB compared to that without the AMZI.     

Surface micromachined RF MEMS variable capacitor

We used simple microelectromechanical systems (MEMS) technology to fabricate low-voltage-controlled variable capacitors with high-quality factor. The surface profile of the variable capacitor at different values of applied voltage is measured using WYKO NT1100 optical surface profiler. The pull-in voltage of the variable capacitor was below 15 V. The capacitance and quality factor at 1 GHz are 0.792 and 51.6 pF. The pull-in voltage is 13.5 V, the tuning ratio of the capacitor is more than 1.31:1.     

A wideband RF receiver with extended statistical element selection based harmonic rejection calibration

In this paper we present a wideband harmonic rejection (HR) RF receiver design. Both gain mismatch and phase mismatch of the HR mixer have been calibrated using a design and calibration method called extended statistical element selection to achieve best-in-class HR ratio (HRR) performance. The achieved concurrent 3rd order HRR and 5th order HRR are greater than 80 dB and 70 dB, respectively, after calibration. The even order HRR is also calibrated to greater than 80 dB. A single calibration performed at 750 MHz was further observed to be effective over more than two octaves of bandwidth with greater than 70 dB HRR. The receiver was manufactured in 65 nm CMOS technology. Input RF frequency range was 0.15–1 GHz and the receiver consumes 64 mW at 1 GHz. Noise figure is 3.2 dB and out-of-band IIP3 is −7 dBm at a total gain of 48 dB.     

A sub-sampling 4.25 GS/s 3-bit flash ADC with asymmetric spatial filter response

A sub-sampling 3-bit 4.25 GS/s flash ADC with a novel averaging termination technique—asymmetric spatial filter response—in 0.13 um CMOS for impulse radio ultra-wideband (IR-UWB) receiver is presented. In this design, a track and hold (T/H) circuit with self-biased buffer is used to compensate the degradation in amplitude when frequency increases to giga Hz. Averaging termination technique using asymmetric spatial filter response is proposed to relieve the termination offset of the flash ADC. A revised encoder scheme is adopted to solve the problem of different propagation delay. The measurement results reveal that the SFDR and SNDR of the ADC are 26.3 dB and 18.4 dB, respectively, even the input signal frequency is 4.2 GHz. INL and DNL are measured improved to 0.11LSB and 0.18LSB, respectively, when asymmetric spatial filter is used. The power of ADC is 63 mW and the active area is 0.49×0.72 mm². The ADC achieves a figure of merit (FoM) of 2.2 pJ/conversion-step.     

Single-grain Si thin-film transistors SPICE model,analog and RF circuit applications

Single-grain thin-film transistors (SG-TFTs) fabricated inside location-controlled using μ-Czochralski process exhibit SOI-FETs like performance despite processing temperatures remaining below 350 °C. Thus, the SG-TFT is a potential technology for large-area highly-integrated electronic system and system-in-package, taking advantage of the system-on-flexible substrate and low manufacturing cost capabalities. The SG-TFT is modeled based on the BSIMSOI SPICE model where the mobility parameter is modified to fit the SG-TFT behavior. Therefore, analog and RF circuits can be designed and benchmarked. A two-stage telescopic cascode operational amplifier fabricated in a prototype 1.5 μm SG-TFT technology demonstrates DC gain of 55 dB and unity-gain bandwidth of 6.3 MHz. A prototype CMOS voltage reference demonstrates a power supply rejection ratio (PSRR) of 50 dB. With unity-gain frequency, f_T, in the GHz range, the SG-TFT can also enable RF circuits for wireless applications. A 12 dB gain RF cascode amplifier with integrated on-chip inductors operating in the 433 MHz ISM band is demonstrated.     

Design,fabrication, and preliminary characterization of a novel MEMS bionic vector hydrophone

According to the auditory principle of fish's lateral line organ, a novel microelectromechanical systems (MEMS) bionic vector hydrophone used for obtaining vector information of underwater sound field is introduced in this paper. It is desirable that the application of MEMS-based piezoresistive effect and bionics structure may improve the low-frequency sensitivity of the vector hydrophone as well as its miniaturization. The bionic structure consists of two parts: high-precision four-beam microstructure and rigid plastic cylinder which is fixed at the center of the microstructure. The piezoresistor located at the beam is simulated to the hair cell of lateral line and the rigid plastic cylinder is simulated to stereocilia. When the plastic cylinder is stimulated by sound, the piezoresistor transforms the resultant strain into a differential voltage output signal via the Wheatstone bridge circuit. Microfabrication technology has been employed for the fabrication of the microstructure and measurement results are given. The experiment results show that the receiving sensitivity of the hydrophone is −197.7 dB (0 dB=1 V/μPa). The novel hydrophone not only possesses satisfactory directional pattern as well as miniature structure, but also has good low-frequency characteristics, and satisfies the requirements for low-frequency acoustic measurement.     

Design and analysis of implantable CPW fed bowtie antenna for ISM band applications

A novel implantable coplanar waveguide (CPW) fed crossed bowtie antenna is proposed for short-range biomedical applications. The antenna is designed to resonate at 2.45 GHz, one of the industrial-scientific-medical (ISM) bands. It is investigated by use of the method of moments design equations and its simulation software (IE3D version 15). The size of the antenna is 371.8 mm³ (26 mm × 22 mm × 0.65 mm). The simulated and analyzed return losses are −23 and −25 dB at the resonant frequency of 2.45 GHz. We have analyzed some more performances of the proposed antenna and the results show that the proposed antenna is a perfect candidate for implantation. The proposed antenna has substantial merits like low profile, miniaturization, lower return loss and better impedance matching with high gain over other implanted antennas.     

An 8 bit, 100 kS/s,switch-capacitor DAC SAR ADC for RFID applications

An 8 bit switch-capacitor DAC successive approximation analog to digital converter (SAR-ADC) for sensor-RFID application is presented in this paper. To achieve minimum chip area, maximum simplicity is imposed on capacitive DAC; replacing capacitor bank with only a one switch-capacitor circuit. The regulated dynamic current mirror (RDCM) design is introduced to provide stabilized current. This invariable current from RDCM, charging or discharging the only capacitor in circuit is controlled by pulse width modulated signal to realize switch capacitor DAC. The switch control scheme is built using basic AND gates to generate the control signals for RDCM. Only one capacitor and reduced transistor count in digital part reduces the silicon area occupied by the ADC to only 0.0098 mm². The converter, designed in GPDK 90 nm CMOS, exhibits maximum sampling frequency of 100 kHz & consumes 6.75 µW at 1 V supply. Calculated signal to noise and distortion ratio (SNDR) at 1 V supply and 100 kS/s is 48.68 dB which relates to ENOB of 7.79 bits. The peak values of differential and integral nonlinearity are found to be +0.70/−0.89 LSB and +1.40/−0.10 LSB respectively. Evaluated figure of merit (FOM) is 3.87×10²⁰, which show that the proposed ADC acquires minimal silicon area and has sufficiently low power consumption compared to its counterparts in RFID applications.