Partial Crystallization of HfO2 for Two-Bit/Four-Level SONOS-Type Flash Memory

The nonvolatile memory properties of the partially crystallized HfO₂ charge storage layer are investigated using short-channel devices of gate length L_g down to 80 nm. Highly efficient two-bit and four-level device operation is demonstrated by channel hot electron injection programming and hot hole injection erasing for devices of L_g > 170 nm, although the reduction of the memory window is observed for devices of L_g < 170 nm. A memory window of 5.5 V, ten-year retention of V_th clearance larger than 1.5 V between adjacent levels, endurance for 10⁵ programming/erasing cycles, and immunity to programming disturbances are demonstrated. Flash memory with partially crystallized HfO₂ shows a larger memory window than HfO₂ nanodot memory, assisted by the enhanced electron capture efficiency of an amorphous HfO₂ matrix, which is lacking in other types of reported nanodot memory. The scalability, programming speed, V_th control for two-bit and four-level operation, endurance, and retention are also improved, compared with NROM devices that use a Si₃N₄ trapping layer.     

Performance of interface engineeredSiNx/ICL/InP/In0.53Ga0.47As/InP dopedchannel HIGFET's

SiN_x/InP/InGaAs doped channel passivated heterojunction insulated gate field effect transistors (HIGFETs) have been fabricated for the first time using an improved In-S interface control layer (ICL). The insulated gate HIGFETs exhibit very low gate leakage (10 nA@V_GS =±5 V) and I_DS (sat) of 250 mA/mm. The doped channel improves the DC characteristics and the HIGFETs show transconductance of 140-150 mS/mm (L_g=2 μm), f_t of 5-6 GHz (L_g=3 μm), and power gain of 14.2 dB at 3 GHz. The ICL HIGFET technology is promising for high frequency applications     

High-performance, 0.1 μm InAlAs/InGaAs high electron mobilitytransistors on GaAs

This letter describes the material characterization and device test of InAlAs/InGaAs high electron mobility transistors (HEMTs) grown on GaAs substrates with indium compositions and performance comparable to InP-based devices. This technology demonstrates the potential for lowered production cost of very high performance devices. The transistors were fabricated from material with room temperature channel electron mobilities and carrier concentrations of μ=10000 cm² /Vs, n=3.2×10¹² cm^-2 (In=53%) and μ=11800 cm²/Vs, n=2.8×10¹² cm^-2 (In=60%). A series of In=53%, 0.1×100 μm² and 0.1×50 μm² devices demonstrated extrinsic transconductance values greater than 1 S/mm with the best device reaching 1.074 S/mm. High-frequency testing of 0.1×50 μm² discrete HEMT's up to 40 GHz and fitting of a small signal equivalent circuit yielded an intrinsic transconductance (g_m,i) of 1.67 S/mm, with unity current gain frequency (f_T) of 150 GHz and a maximum frequency of oscillation (f_max) of 330 GHz. Transistors with In=60% exhibited an extrinsic g_m of 1.7 S/mm, which is the highest reported value for a GaAs based device     

Ultrahigh-speed pseudomorphic InGaAs/InAlAs HEMTs with 400-GHzcutoff frequency

An excellent cutoff frequency (f_t) as high as 400 GHz was successfully realized in 45-nm-gate pseudomorphic InGaAs/InAlAs high electron mobility transistors (HEMTs). An additional vertical gate-recess suppressed short-channel effects, while keeping good pinchoff characteristics. Gate length (L_g) dependence of electron transit time (τ_transit) implied an increased saturation velocity (υ_s) of 3.6×10⁷ cm/s in the developed pseudomorphic HEMTs. This f_t is the highest value ever reported for any transistors to date     

Extremely high transconductance Ge/Si0.4Ge0.6p-MODFET's grown by UHV-CVD

Ge-channel modulation-doped field-effect transistors (MODFET's) with extremely high transconductance are reported. The devices were fabricated on a compressive-strained Ge/Si_0.4Ge_0.6 heterostructure with a Hall mobility of 1750 cm²/Vs (30,900 cm²/Vs) at room temperature (77 K). Self-aligned, T-gate p-MODFET's with L_g=0.1 μm displayed an average peak extrinsic transconductance (g(m_ext)) of 439 mS/mm, at a drain-to-source bias voltage (V_ds) of -0.6 V, with the best device having a value of g(m_ext)=488 mS/mm. At 77 K, values as high as g(m_ext)=687 mS/mm were obtained at a bias voltage of only V_ds=-0.2 V. These devices also displayed a unity current gain cutoff frequency (f_T) of 42 GHz and maximum frequency of oscillation (f_max) of 86 GHz at V_ds=-0.6 V and -1.0 V, respectively     

Metamorphic InAlAs/InGaAs HEMTs on GaAs substrates with a novelcomposite channels design

We report on fabrication and performance of novel 0.13 μm T-gate metamorphic InAlAs/InGaAs HEMTs on GaAs substrates with composite InGaAs channels, combining the superior transport properties of In_0.52Ga_0.48As with low-impact ionization in the In_0.32Ga_0.68As subchannel. These devices exhibit excellent DC characteristics, high drain currents of 750 mA/mm, extrinsic transconductances of 600 mS/mm, combined with still very low output conductance values of 20 mS/mm, and high channel and gate breakdown voltages. The use of a composite InGaAs channels leads to excellent cut-off frequencies: f_max of 350 GHz and an f_T 160 GHz at V_DS=1.5 V. These are the best microwave frequency results ever reported for any FET on GaAs substrate     

Exploration of velocity overshoot in a high-performance deepsub-0.1-μm SOI MOSFET with asymmetric channel profile

The electron velocity overshoot phenomenon in the inversion layer is experimentally investigated using a novel thin-film silicon-on-insulator (SOI) test structure with channel lengths down to 0.08 μm. The uniformity of the carrier density and tangential field is realized by employing a lateral asymmetric channel (LAC) profile. The electron drift velocity observed in this work is 9.5×10⁶ cm/s for a device with L_eff=0.08 μm at 300 K. The upward trend in electron velocity can be clearly noticed for decreasing channel lengths     

High-performance double-modulation-doped InAlAs/InGaAs/InAs HFETs

We demonstrate the improvement of double-sided-doped InAlAs/InGaAs MODFETs by inserting a thin InAs layer in the center of the conventional InGaAs channel. A maximum extrinsic transconductance of 1.4 S/mm is achieved for 0.13-μm devices. The current gain cutoff frequency of this device is as high as 265 GHz. Delay time analysis shows a significant improvement in the effective saturated velocity, from 2.4×10⁷ cm/s for LM devices to 3.1×10⁷ cm/s for InAs devices. We believe the superior performance of this device is primarily due to the reduction of scattering from donor layers, especially under the channel, and the interface roughness, which is achieved by inserting a 4-nm InAs layer in the channel     

High-speed performance of OMCVD grown InAlAs/InGaAs MSMphotodetectors at 1.5 μm and 1.3 μm wavelengths

A report is presented on the fabrication of high-speed In_0.53 Ga_0.47As metal-semiconductor-metal (MSM) photodetectors incorporating a high-quality lattice-matched InAlAs barrier enhancement layer, grown by organometallic chemical vapor deposition (OMCVD). Fast responses of ~55 ps full-width half-maximum at 1.5 μm and ~48 ps at 1.3 μm wavelengths are observed, corresponding to intrinsic device bandwidths of ~8 GHz and ~11 GHz, respectively. The absence of any tail to the pulse response, and of any low-bias DC gain, indicates a low-trap density at the InAlAs/InGaAs heterointerface. Bias independent dark currents of 10-20 μA are observed below breakdown, which occurred at >30 V in devices with a 500-A-thick InAlAs layer     

SiGe pMODFETs on silicon-on-sapphire substrates with 116 GHzfmax

The dc and microwave results of Si_0.2Ge_0.8/Si_0.7Ge_0.3 pMODFETs grown on silicon-on-sapphire (SOS) substrates by ultrahigh vacuum chemical vapor deposition are reported. Devices with L_g=0.1 μm displayed high transconductance (377 mS/mm), low output conductance (25 mS/mm), and high gate-to-drain breakdown voltage (4 V). The dc current-voltage (I-V) characteristics were also nearly identical to those of control devices grown on bulk Si substrates. Microwave characterization of 0.1×50 μm² devices yielded unity current gain (f_T) and unilateral power gain (f _max) cutoff frequencies as high as 50 GHz and 116 GHz, respectively. Noise parameter characterization of 0.1×90 μm² devices revealed minimum noise figure (F_min) of 0.6 dB at 3 GHz and 2.5 dB at 20 GHz     

Metamorphic InAlAs/InGaAs enhancement mode HEMTs on GaAs substrates

In_0.5Al_0.5As/In_0.5Ga_0.5 As HEMTs have been grown metamorphically on GaAs substrates oriented 6° off (100) toward (111)A using a graded InAlAs buffer. The devices are enhancement mode and show good dc and RF performance. The 0.6-μm gate length devices have saturation currents of 262 mA/mm at a gate bias of 0.7 V and a peak transconductance of 647 mS/mm. The 0.6 μm×3 mm devices tested on-wafer have output powers up to 30 mW/mm and 46% power-added-efficiency (PAE) at 1 V drain bias and 850 MHz. When biased and matched for best efficiency performance, this same device has up to 68% PAE at V_d=1 V     

Electrical characteristics of an optically controlled N-channelAlGaAs/GaAs/InGaAs pseudomorphic HEMT

Electrical characteristics of an n-channel Al_0.3Ga_0.7As/GaAs/In_0.13Ga_0.87 As pseudomorphic HEMT (PHEMT) with L_g=1 μm on GaAs are characterized under optical input (P_opt). Gate leakage and drain current have been analyzed as a function of V_GS, V _DS, and P_opt. We observed monotonically increasing gate leakage current due to the energy barrier lowering by the optically induced photovoltage, which means that gate input characteristics are significantly limited by the photovoltaic effect. However, we obtained a strong nonlinear photoresponsivity of the drain current, which is limited by the photoconductive effect. We also proposed a device model with an optically induced parasitic Al_0.3Ga_0.7As MESFET parallel to the In_0.13Ga_0.87As channel PHEMT for the physical mechanism in the drain current saturation under high optical input power     

A recessed-gate InAlAs/n+-InP HFET with an InP etch-stoplayer

The authors have exploited both the attractive transport properties and the etch selectivity of InP in a novel InAlAs/n⁺ -InP metal-insulator-doped-channel heterostructure FET (MIDFET). In several other material systems, the MIDFET has been shown to be well-suited to high-power telecommunications applications. The device employs InP both as the channel layer and as an etch-stop layer in a selective-etch recessed-gate process. L_g=1.8-μm devices achieve g_m and I_D,max values of 224 mS/mm and 408 mA/mm, respectively, the highest recorded values for an InP channel HFET with L_g⩾0.8-μm, including MODFETs. These figures combine with a breakdown voltage of 10 V and peak values of f _T and f_max of 10.5 and 28 GHz, respectively. The selective-etch recessed-gate process contributes to excellent device performance while maintaining a tight 60-mV threshold voltage distribution (13 mV between adjacent devices)     

n+-polysilicon gate PMOSFET's with indium dopedburied-channels

In this letter a n⁺-polysilicon gate PMOSFET with indium doped buried-channel is discussed, The gate length scaling of n ⁺-polysilicon gate buried-length PMOSFET's is limited by the channel punch-through effect. Designing shallow counter-doped layers (buried-channels) has been established as a means to reduce the undesirable short channel effects in these devices. Indium, an acceptor dopant in Si, has a low diffusion coefficient and implant statistics favorable for achieving shallow doping layers. Indium implants are explored (as an alternative to BF₂) to counter dope the n-tub for adjusting the threshold voltage. Devices are fabricated using AT&T's 0.5 μm CMOS technology but with t_ox=50 Å. Although no special effort has been made to optimize the n-tub or to take full advantage of the diffusion and implant characteristics of indium, excellent electrical results are obtained for devices with L_eff=0.25 μm. Improved V_th roll-off characteristics and reduced body effect (γ≈0.18 V^½ versus γ_B≈0.40 V^½) in indium implanted buried channels are demonstrated over BF₂ implanted buried channels for PMOSFET's with identical long channel threshold voltages. The effects of incomplete ionization (freeze-out) of the indium acceptor states on the electrical device characteristics are demonstrated by device simulations and measurements     

Delay time analysis for 0.4- to 5-μm-gate InAlAs-InGaAs HEMTs

InAlAs-InGaAs HEMTs with 0.4- to 5-μm gate lengths have been fabricated and a maximum f_T of 84 GHz has been obtained by a device with a 0.4-μm gate length. A simple analysis of their delay times was performed. It was found that gradual channel approximation with a field-dependent mobility model with E_c of 5 kV/cm holds for long-channel devices (L _g>2 μm), while a saturated velocity model with a saturated velocity of 2.7×10⁷ cm/s holds for short-channel devices (L_g<1 μm)     

InP-based enhancement-mode pseudomorphic HEMT with strainedIn0.45Al0.55As barrier andIn0.75Ga0.25As channel layers

Using strained aluminum-rich In_0.45Al_0.55As as Schottky contact materials to enhance the barrier height and indium-rich In_0.75Ga_0.25As as channel material to enhance the channel performance, we have developed InP-based enhancement-mode pseudomorphic InAlAs/InGaAs high electron mobility transistors (E-PHEMT's) with threshold voltage of about 170 mv. A maximum extrinsic transconductance of 675 mS/mm and output conductance of 15 mS/mm are measured respectively at room temperature for 1 μm-gate-length devices, with an associated maximum drain current density of 420 mA/mm at gate voltage of 0.9 V. The devices also show excellent rf performance with cutoff frequency of 55 GHz and maximum oscillation frequency of 62 GHz. To the best of the authors' knowledge, this is the first time that InP-based E-PHEMT's with strained InAlAs barrier layer have been demonstrated     

Spatial retardation of carrier heating in scaled 0.1-μmn-MOSFET's using Monte Carlo simulations

A comprehensive Monte Carlo simulator is employed to investigate nonlocal carrier transport in 0.1 μm n-MOSFET's under low-voltage stress. Specifically, the role of electron-electron (e-e) interactions on hot electron injection is explored for two emerging device designs biased at a drain voltage V_d considerably less than the Si/SiO₂ injection barrier height φ_b. Simulation of both devices reveal that 1) although qV_d<φ_b, carriers can obtain energies greater than φ_b, and 2) the peak for electron injection is displaced approximately 20 nm beyond the peak in the parallel channel electric field. These phenomena constitute a spatial retardation of carrier heating that is strongly influenced by e-e interactions near the drain edge. (Virtually no injection is observed in our simulations when e-e scattering is not considered.) Simulations also show that an aggressive design based on larger dopant atoms, steeper doping gradients, and a self-aligned junction counter-doping process produces a higher peak in the channel electric field, a hotter carrier energy distribution, and a greater total electron injection rate into the oxide when compared to a more conventionally-doped design. The impact of spatially retarded carrier heating on hot-electron-induced device degradation is further examined by coupling an interface state distribution obtained from Monte Carlo simulations with a drift-diffusion simulator. Because of retarded carrier heating, the interface states are mainly generated further over the drain region where interface charge produces minimal degradation. Thus, surprisingly, both 0.1 μm n-MOSFET designs exhibit comparable drain current degradation rates     

Doubly strainedIn0.41Al0.59As/n+-In0.65Ga0.35As HFET with high breakdown voltage

An In_0.41Al_0.59As/n⁺-In_0.65 Ga_0.35As HFET on InP was designed and fabricated, using the following methodology to enhance device breakdown: a quantum-well channel to introduce electron quantization and increase the effective channel bandgap, a strained In_0.41Al_0.59As insulator, and the elimination of parasitic mesa-sidewall gate leakage. The In_0.65Ga_0.35As channel is optimally doped to N_D=6×10¹⁸ cm^-3. The resulting device (L_g=1.9 μm, W_g =200 μm) has f_t=14.9 GHz, f_max in the range of 85 to 101 GHz, MSG=17.6 dB at 12 GHz V_B=12.8 V, and I_D(max)=302 mA/mm. This structure offers the promise of high-voltage applications at high frequencies on InP     

Breakdown voltage improvement in strained InGaAlAs/GaAs FETs

GaAs MESFETs with a surface layer of pseudomorphic InGaAlAs have been fabricated. The compressive strain and wide bandgap in the InGaAlAs layer reduce the impact ionization rate in this layer and improve the breakdown voltage of the device. A 1 μm×75 μm gate device with the pseudomorphic surface layer showed an improvement in gate-to-drain breakdown of over 55% and an improvement in channel breakdown of 50% as compared to a similar device without the pseudomorphic layer. Both devices had a peak transconductance of about 190 mS/mm and a saturation current of about 265 mA/mm     

DC and RF characteristics of doped multichannelAlAs0.56Sb0.44/In0.53Ga0.47As field effect transistors with variable gate-lengths

Depletion-mode doped-channel field effect transistors (DCFETs) using a AlAs_0.56Sb_0.44/In_0.53Ga_0.47 As heterostructure with multiple channels grown by molecular beam epitaxy (MBE) on an InP substrate are presented. Devices with gate lengths ranging from 0.2 μm to 1.0 μm have been fabricated. Three doped In_0.53Ga_0.47As channels separated by undoped AlAs_0.56Sb_0.44 layers are used for the devices. The devices exhibit unity current gain cut-off frequencies typically between 18 GHz and 73 GHz and corresponding maximum oscillation frequencies typically between 60 GHz and 160 GHz. The multiple channel approach results in wide linearity of dc and RF performance of the device