Minimal universal library for reversible circuits

Reversible logic plays an important role in quantum computing. Several papers have been recently published on universality of sets of reversible gates. However, a fundamental unsolved problem remains: “what is the minimum set of gates that are universal for n-qubit circuits without ancillae bits”. We present a library of 2 gates which is sufficient to realize all reversible circuits of n variables. It is a minimal library of gates for binary reversible logic circuits. We also analyze the complexity of the syntheses.     

Synthesis of quaternary reversible/quantum comparators

Multiple-valued quantum circuits are promising choices for future quantum computing technology, since they have several advantages over binary quantum circuits. Quaternary logic has the advantage that classical binary functions can be very easily represented as quaternary functions by grouping two bits together into quaternary values. Grover’s quantum search algorithm requires a sub-circuit called oracle, which takes a set of inputs and gives an output stating whether a given search condition is satisfied or not. Equality, less-than, and greater-than comparisons are widely used as search conditions. In this paper, we show synthesis of quaternary equality, less-than, and greater-than comparators on the top of ion-trap realizable 1-qudit gates and 2-qudit Muthukrishnan–Stroud gates.     

On synthesis of 3 × 3 reversible logic functions

Reversible logic plays an important role in quantum computing. This article presents some novel results on synthesis of 3?×?3 reversible Boolean gates. We derive the relationship between reversible 3?×?3 gates and corresponding symmetric groups. By introducing a set of universal libraries, we show how to use group theory to synthesize any 3?×?3 reversible gate.     

Solitary wave families of NLPDES via reversible systems theory

The Ostrovsky equation is an important canonical model for the unidirectional propagation of weakly nonlinear long surface and internal waves in a rotating, inviscid and incompressible fluid. Since solitary wave solutions often play a central role in the long-time evolution of an initial disturbance, we consider such solutions here (via the normal form approach) within the framework of reversible systems theory. Besides confirming the existence of the known family of solitary waves and its reduction to the KdV limit, we find a second family of multihumped (or N-pulse) solutions, as well as a continuum of delocalized solitary waves (or homoclinics to small-amplitude periodic orbits). On isolated curves in the relevant parameter region, the delocalized waves reduce to genuine embedded solitons. The second and third families of solutions occur in regions of parameter space distinct from the known solitary wave solutions and are thus entirely new. Directions for future work, including on other NLPDEs, are also mentioned.     

FPGA implementation of reversible watermarking in digital images using reversible contrast mapping

Reversible contrast mapping (RCM) and its various modified versions are used extensively in reversible watermarking (RW) to embed secret information into the digital contents. RCM based RW accomplishes a simple integer transform applied on pair of pixels and their least significant bits (LSB) are used for data embedding. It is perfectly invertible even if the LSBs of the transformed pixels are lost during data embedding. RCM offers high embedding rate at relatively low visual distortion (embedding distortion). Moreover, low computation cost and ease of hardware realization make it attractive for real-time implementation. To this aim, this paper proposes a field programmable gate array (FPGA) based very large scale integration (VLSI) architecture of RCM-RW algorithm for digital images that can serve the purpose of media authentication in real-time environment. Two architectures, one for block size (8 × 8) and the other one for (32 × 32) block are developed. The proposed architecture allows a 6-stage pipelining technique to speed up the circuit operation. For a cover image of block size (32 × 32), the proposed architecture requires 9881 slices, 9347 slice flip-flops, 11291 number 4-input LUTs, 3 BRAMs and a data rate of 1.0395 Mbps at an operating frequency as high as 98.76 MHz.     

Simulating reversible Turing machines and cyclic tag systems by one-dimensional reversible cellular automata

In this paper, we investigate how 1-D reversible cellular automata (RCAs) can simulate reversible Turing machines (RTMs) and cyclic tag systems (CTSs). A CTS is a universal string rewriting system proposed by M. Cook. First, we show that for any m-state n-symbol RTM there is a 1-D 2-neighbor RCA with a number of states less than (m+2n+1)(m+n+1) that simulates it. It improves past results both in the number of states and in the neighborhood size. Second, we study the problem of finding a 1-D RCA with a small number of states that can simulate any CTS. So far, a 30-state RCA that can simulate any CTS and works on ultimately periodic infinite configurations has been given by K. Morita. Here, we show there is a 24-state 2-neighbor RCA with this property.     

A recursive method for synthesizing quantum/reversible quaternary parallel adder/subtractor with look-ahead carry

Multiple-valued quantum logic circuits are a promising choice for future quantum computing technology since they have several advantages over binary quantum logic circuits. Adder/subtractor is the major component of the ALU of a computer and is also used in quantum oracles. In this paper, we propose a recursive method of hand synthesis of reversible quaternary full-adder circuit using macro-level quaternary controlled gates built on the top of ion-trap realizable 1-qudit quantum gates and 2-qudit Muthukrishnan–Stroud quantum gates. Based on this quaternary full-adder circuit we propose a reversible circuit realizing quaternary parallel adder/subtractor with look-ahead carry. We also show the way of adapting the quaternary parallel adder/subtractor circuit to an encoded binary parallel adder/subtractor circuit by grouping two qubits together into quaternary qudit values.     

Adaptive reversible watermarking with improved embedding capacity

Embedding capacity is one of the most important issues of the reversible watermarking. However, the theoretical maximum embedding capacity of most reversible watermarking algorithms is only 1.0 bits per pixel (bpp). To achieve a higher capacity, we have to modify the least significant bit (LSB) multiple times which definitely lowers the quality of the embedded image. To this end, this paper proposes a novel reversible watermarking algorithm by employing histogram shifting and adaptive embedding. Specifically, the amount of the embedded watermark is adaptively determined in terms of the context of each pixel. For pixels with small prediction error, we modify the second, third and even the fourth LSBs as well to embed more than one watermark bit. Consequently, the proposed method achieves the embedding capacity larger than 1.0 bpp in single-pass embedding as well as bringing relatively low embedding distortion. The superiority of the proposed method is experimental verified by comparing with other existing schemes.     

On figures of merit in reversible and quantum logic designs

Five figures of merit including number of gates, quantum cost, number of constant inputs, number of garbage outputs, and delay are used casually in the literature to compare the performance of different reversible or quantum logic circuits. In this paper we propose new definitions and enhancements, and identify similarities between these figures of merit. We evaluate these measures to show their strength and weakness. Instead of the number of gates, we introduce the weighted number of gates, where a weighting factor is assigned to each quantum or reversible gate, based on its type, size and technology. We compare the quantum cost with weighted number of gates of a circuit and show three major differences between these measures. It is proved that it is not possible to define a universal reversible logic gate without adding constant inputs. We prove that there is an optimum value for number of constant inputs to obtain a circuit with minimum quantum cost. Some reversible logic benchmarks have been synthesized using Toffoli and Fredkin gates to obtain their optimum values of number of constant inputs. We show that the garbage outputs can also be used to decrease the quantum cost of the circuit. A new definition of delay in quantum and reversible logic circuits is proposed for music line style representation. We also propose a procedure to calculate the delay of a circuit, based on the quantum cost and the depth of the circuit. The results of this research show that to achieve a fair comparison among designs, figures of merit should be considered more thoroughly.      

A reversible data hiding scheme based on graph neighbourhood degree

Abstract

The perceptibility and capacity are two vital criteria of data hiding scheme. Concerning these criteria, data hiding algorithm used images as cover object based on the graph theory is proposed in this study. Images are quantised according to determined range and then quantised images are divided into n × n sized blocks. Each block is accepted as a graph and vertexes which have the same quantisation value are accepted as neighbours. Neighbourhood degrees of vertexes are calculated and indices of vertexes that have a neighbourhood degree over the threshold value are stored in the codebook. Pixel values indicated by these indices in the codebook are used for data hiding process. In this algorithm, there is no need for edge extraction because of hiding data to pixels containing vertexes having high neighbourhood degrees. The proposed method is compared with similar methods in literature in terms of the perceptibility and capacity. More successful results are provided than the others.     

全排列的递归算法实现

递归算法的设计与实现是非常重要的内容,全排列是组合数学中最常见的问题。提出了基于递归算法并通过c语言编程实现了计算机解题,实例数据表明程序非常高效。     

Reversible computing and cellular automata—A survey

Reversible computing is a paradigm where computing models are defined so that they reflect physical reversibility, one of the fundamental microscopic physical property of Nature. In this survey/tutorial paper, we discuss how computation can be carried out in a reversible system, how a universal reversible computer can be constructed by reversible logic elements, and how such logic elements are related to reversible physical phenomena. We shall see that, in reversible systems, computation can often be carried out in a very different manner from conventional (i.e., irreversible) computing systems, and even very simple reversible systems or logic elements have computation- or logical-universality. We discuss these problems based on reversible logic elements/circuits, reversible Turing machines, reversible cellular automata, and some other related models of reversible computing.     

Prediction-based reversible data hiding

For some applications such as satellite and medical images, reversible data hiding is the best solution to provide copyright protection or authentication. Being reversible, the decoder can extract the hidden data and recover the original image without distortion. In this paper, a reversible data hiding scheme based on prediction error expansion is proposed. The predictive value is computed by using various predictors. The secret data is embedded in the cover image by exploiting the expansion of the difference between a pixel and its predictive value. Experimental results show that our method is capable of providing a great embedding capacity without making noticeable distortion. In addition, the proposed scheme is also applicable to various predictors.     

基于相似函数与相似网络的可逆网络化简

提出了可逆函数的相似函数及可逆网络的相似网络,在此基础上构建了可逆网络化简方法。由可逆函数求出其所有的相似函数,对每个相似函数利用可逆逻辑综合算法生成可逆网络,再将其转换成对应的相似网络,并从中选取最优。该网络化简算法实现了生成三变量全部可逆函数和多变量可逆函数的可逆网络,与相关文献及Benchmark中的例题相比,构造可逆网络的门数较少,具有一定的优势。     

What can we do with a linear optical logic gate?

In an earlier paper [H.J. Caulfield, J. Westphal, The logic of optics and the optics of logic, Information Sciences 162 (2004) 21-33], we considered a simple interferometer (initially conceived as Mach-Zehnder) with two uniform intensity mutually coherent inputs. By encoding those inputs with phases 0 and π representing Boolean 0 and 1 and identifying the detected values of the outputs as logical Boolean values, we found that the outputs could be identified as the Boolean operations XOR and COINC (sometimes called XNOR). Here, we show that this seemingly simple interferometer can perform many additional functions if we use phases to interpret its outputs. But the XOR/COINC are the only non-trivial logic gate we can get no matter how we cascade Mach-Zehnder interferometers. We also generalize those operations upwards (to three or four arguments). We show that the three argument interferometer or four-argument interferometer cannot produce a Fredkin gate or its variation.     

A local variance-controlled reversible data hiding method using prediction and histogram-shifting

The stego image quality produced by the histogram-shifting based reversible data hiding technique is high; however, it often suffers from lower embedding capacity compared to other types of reversible data hiding techniques. In 2009, Tsai et al. solved this problem by exploiting the similarity of neighboring pixels to construct a histogram of prediction errors; data embedding is done by shifting the error histogram. However, Tsai et al.’s method does not fully exploit the correlation of the neighboring pixels. In this paper, a set of basic pixels is employed to improve the prediction accuracy, thereby increasing the payload. To further improve the image quality, a threshold is used to select only low-variance blocks to join the embedding process. According to the experimental results, the proposed method provides a better or comparable stego image quality than Tsai et al.’s method and other existing reversible data hiding methods under the same payload.     

ScaffCC: Scalable compilation and analysis of quantum programs

We present ScaffCC, a scalable compilation and analysis framework based on LLVM (Lattner and Adve, 2004), which can be used for compiling quantum computing applications at the logical level. Drawing upon mature compiler technologies, we discuss similarities and differences between compilation of classical and quantum programs, and adapt our methods to optimizing the compilation time and output for the quantum case. Our work also integrates a reversible-logic synthesis tool in the compiler to facilitate coding of quantum circuits. Lastly, we present some useful quantum program analysis scenarios and discuss their implications, specifically with an elaborate discussion of timing analysis for critical path estimation. Our work focuses on bridging the gap between high-level quantum algorithm specifications and low-level physical implementations, while providing good scalability to larger and more interesting problems.     

Block cipher based on reversible cellular automata

We propose a new encryption algorithm relying on reversible cellular automata (CA). The behavior complexity of CA and their parallel nature makes them interesting candidates for cryptography. The proposed algorithm belongs to the class of symmetric key systems. Marcin Seredynski: He is a Ph.D. student at University of Luxembourg and Polish Academy of Sciences. He received his M.S. in 2004 from Faculty of Electronics and Information Technology in Warsaw University of Technology. His research interests include cryptography, cellular automata, nature inspired algorithms and network security. Currently he is working on intrusion detection algorithms for ad-hoc networks. Pascal Bouvry, Ph.D.: He earned his undergraduate degree in Economical & Social Sciences and his Master degree in Computer Science with distinction (’91) from the University of Namur, Belgium. He went on to obtain his Ph.D. degree (’94) in Computer Science with great distinction at the University of Grenoble (INPG), France. His research at the IMAG laboratory focussed on Mapping and scheduling task graphs onto Distributed Memory Parallel Computers. Next, he performed post-doctoral researches on coordination languages and multi-agent evolutionary computing at CWI in Amsterdam. He gained industrial experience as manager of the technology consultant team for FICS in the banking sector (Brussels, Belgium). Next, he worked as CEO and CTO of SDC (Ho Chi Minh city, Vietnam) in the telecom, semi-conductor and space industry. After that, He moved to Montreal Canada as VP Production of Lat45 and Development Director for MetaSolv Software in the telecom industry. He is currently serving as Professor in the group of Computer Science and Communications (CSC) of the Faculty of Sciences, Technology and Communications of Luxembourg University and he is heading the Intelligent & Adaptive Systems lab. His current research interests include: ad-hoc networks & grid-computing, evolutionary algorithms and multi-agent systems.     

Adaptive reversible image watermarking scheme

This paper presents an adaptive block sized reversible image watermarking scheme. A reversible watermarking approach recovers the original image from a watermarked image after extracting the embedded watermarks. Without loss of generality, the proposed scheme segments an image of size 2^N × 2^N adaptively to blocks of size 2^L × 2^L, where L starts from a user-defined number to 1, according to their block structures. If possible, the differences between central ordered pixel and other pixels in each block are enlarged to embed watermarks. The embedded quantity is determined by the largest difference in a block and watermarks are embedded into LSB bits of above differences. Experimental results show that the proposed adaptive block size scheme has higher capacity than conventional fixed block sized method.