Temperature dependent IDS-VGS characteristics of an N-channel Si tunneling field-effect transistor with a germanium source on Si(110) substrate

在Si(110)衬底上制备了Ge源n型Si沟道隧穿场效应晶体管（TFET）。本文研究了温度对Ge源Si TFET器件的电学性能的影响。温度相关性研究显示器件漏电流主要由漏区的Shockley - Read - Hall (SRH) 产生于复合电流决定。器件开态电流随温度升高而增加,这是因为温度升高材料禁带宽度减小,隧穿几率增大。界面缺陷引起的隧穿电流的亚阈值摆幅随温度升高而变差,但是带间隧穿电流的亚阈值摆幅不随温度变化而变化。     

High‐Sensitivity Floating‐Gate Phototransistors Based on WS2 and MoS2

In recent years, 2D layered materials have been considered as promising photon absorption channel media for next‐generation phototransistors due to their atomic thickness, easily tailored single‐crystal van der Waals heterostructures, ultrafast optoelectronic characteristics, and broadband photon absorption. However, the photosensitivity obtained from such devices, even under a large bias voltage, is still unsatisfactory until now. In this paper, high‐sensitivity phototransistors based on WS₂ and MoS₂ are proposed, designed, and fabricated with gold nanoparticles (AuNPs) embedded in the gate dielectric. These AuNPs, located between the tunneling and blocking dielectric, are found to enable efficient electron trapping in order to strongly suppress dark current. Ultralow dark current (10^?11 A), high photoresponsivity (1090 A W^?1), and high detectivity (3.5 × 10¹¹ Jones) are obtained for the WS₂ devices under a low source/drain and a zero gate voltage at a wavelength of 520 nm. These results demonstrate that the floating‐gate memory structure is an effective configuration to achieve high‐performance 2D electronic/optoelectronic devices.     

Mid-wavelength infrared p-on-n Hg1−xCdxTe heterostructure detectors: 30–120 kelvin state-of-the-Art performance

We report on Hg_1−xCd_xTe mid-wavelength infrared (MWIR) detectors grown by molecular-beam epitaxy (MBE) on CdZnTe substrates. Current-voltage (I-V) characteristics of HgCdTe-MWIR devices and temperature dependence of focal-plane array (FPA) dark current have been investigated and compared with the most recent InSb published data. These MWIR p-on-n Hg_1−xCd_xTe/CdZnTe heterostructure detectors give outstanding performance, and at 68 K, they are limited by diffusion currents. For temperatures lower than 68 K, in the near small-bias region, another current is dominant. This current has lower sensitivity to temperature and most likely is of tunneling origin. High-performance MWIR devices and arrays were fabricated with median R_oA values of 3.96 × 10¹⁰ Ω-cm² at 78 K and 1.27 × 10¹² Ω-cm² at 60 K; the quantum efficiency (QE) without an antireflection (AR) coating was 73% for a cutoff wavelength of 5.3 μm at 78 K. The QE measurement was performed with a narrow pass filter centered at 3.5 μm. Many large-format MWIR 1024 × 1024 FPAs were fabricated and tested as a function of temperature to confirm the ultra-low dark currents observed in individual devices. For these MWIR FPAs, dark current as low as 0.01 e⁻/pixel/sec at 58 K for 18 × 18 μm pixels was measured. The 1024 × 1024 array operability and AR-coated QE at 78 K were 99.48% and 88.3%, respectively. A comparison of these results with the state-of-the-art InSb-detector data suggests MWIR-HgCdTe devices have significantly higher performance in the 30–120 K temperature range. The InSb detectors are dominated by generation-recombination (G-R) currents in the 60–120 K temperature range because of a defect center in the energy gap, whereas MWIR-HgCdTe detectors do not exhibit G-R-type currents in this temperature range and are limited by diffusion currents.     

Ultrathin Epitaxial Ferromagnetic γ‐Fe2O3 Layer as High Efficiency Spin Filtering Materials for Spintronics Device Based on Semiconductors

In spintronics, identifying an effective technique for generating spin‐polarized current has fundamental importance. The spin‐filtering effect across a ferromagnetic insulating layer originates from unequal tunneling barrier heights for spin‐up and spin‐down electrons, which has shown great promise for use in different ferromagnetic materials. However, the low spin‐filtering efficiency in some materials can be ascribed partially to the difficulty in fabricating high‐quality thin film with high Curie temperature and/or partially to the improper model used to extract the spin‐filtering efficiency. In this work, a new technique is successfully developed to fabricate high quality, ferrimagnetic insulating γ‐Fe₂O₃ films as spin filter. To extract the spin‐filtering effect of γ‐Fe₂O₃ films more accurately, a new model is proposed based on Fowler–Nordheim tunneling and Zeeman effect to obtain the spin polarization of the tunneling currents. Spin polarization of the tunneled current can be as high as ?94.3% at 2 K in γ‐Fe₂O₃ layer with 6.5 nm thick, and the spin polarization decays monotonically with temperature. Although the spin‐filter effect is not very high at room temperature, this work demonstrates that spinel ferrites are very promising materials for spin injection into semiconductors at low temperature, which is important for development of novel spintronics devices.     

高峰谷电流比的高掺杂发射区In0.53Ga0.47As/AlAs共振隧穿二极管

利用空气桥工艺设计和制作了高掺杂发射区In0.53Ga0.47As/AlAs共振隧穿二极管（RTD）。在室温下,器件的峰谷电流比大于40,峰值电流密度为24kA/cm2。建立了RTD器件等效电路模型,并从直流和微波测试结果中提取出器件参数。高峰谷电流比的RTD器件具有非常小的电容,有利于在微波/太赫兹领域中的应用。     

AsP/InSe Van der Waals Tunneling Heterojunctions with Ultrahigh Reverse Rectification Ratio and High Photosensitivity

Van der Waals heterojunctions made of 2D materials offer competitive opportunities in designing and achieving multifunctional and high‐performance electronic and optoelectronic devices. However, due to the significant reverse tunneling current in such thin p–n junctions, a low rectification ratio along with a large reverse current is often inevitable for the heterojunctions. Here, a vertically stacked van der Waals heterojunction (vdWH) tunneling device is reported consisting of black arsenic phosphorus (AsP) and indium selenide (InSe), which shows a record high reverse rectification ratio exceeding 10⁷ along with an unusual ultralow forward current below picoampere and a high current on/off ratio over 10⁸ simultaneously at room temperature under the proper band alignment design of both the Schottky junction and the heterojunction. Therefore, the vdWH tunneling device can function as an ultrasensitive photodetector with an ultrahigh light on/off ratio of 1 × 10⁷, a comparable responsivity of around 1 A W^?1, and a high detectivity over 1 × 10¹² Jones in the visible wavelength range. Furthermore, the device exhibits a clear photovoltaic effect and shows a spectral detection capability up to 1550 nm. The work sheds light on developing future electronic and optoelectronic multifunctional devices based on the van der Waals integration of 2D materials with designed band alignment.     

High performance AlAs/GaXIn1-xAs resonant tunneling diodes by metalorganic chemical vapor deposition

We report on AlAs/Ga_xJn_1−xAs (x = 0.47) quantum well heterostructures grown by metalorganic chemical vapor deposition (MOCVD) on InP substrates. Heterostructure quality was evaluated by high resolution x-ray diffraction for various growth conditions. Double barrier quantum well heterostructures were grown and processed into resonant tunneling diodes (RTDs). Room temperature electrical measurements of the RTDs yielded maximum peak to valley current ratios of 7.7 with peak current density of 96 kA/cm² and 11.3 with peak current density of 12 kA/cm², for devices grown by atmospheric and low pressure MOCVD, respectively.     

Characterization of the switching in tunnel MISS devices

The observed bistable characteristics of metal-insulator-silicon switch (MISS) devices with moderate epi-layer doping levels are proven to be controlled by trap assisted tunneling. The switching current and the switching voltage are shown to depend on the reverse saturation current of the MIS substructure and on fabrication parameters (insulator thickness and epi-layer doping level). A method to obtain the metal-semiconductor barrier height, the injection factor at the interface and the trap density in the insulator is presented. The results have been applied to characterize AlSiO₂Si(n)Si(p⁺) structu in which the switching point and the reverse saturation current have been measured. The observed dispersion in the values of the current can be explained by assuming a unique value of the barrier height and the trap density for all devices, allowing the values of the tunneling damping factors to be different from those obtained in the two-band model, which validity is also discussed.     

Low‐Power Nonvolatile Charge Storage Memory Based on MoS2 and an Ultrathin Polymer Tunneling Dielectric

Low‐power, nonvolatile memory is an essential electronic component to store and process the unprecedented data flood arising from the oncoming Internet of Things era. Molybdenum disulfide (MoS₂) is a 2D material that is increasingly regarded as a promising semiconductor material in electronic device applications because of its unique physical characteristics. However, dielectric formation of an ultrathin low‐k tunneling on the dangling bond‐free surface of MoS₂ is a challenging task. Here, MoS₂‐based low‐power nonvolatile charge storage memory devices are reported with a poly(1,3,5‐trimethyl‐1,3,5‐trivinyl cyclotrisiloxane) (pV3D3) tunneling dielectric layer formed via a solvent‐free initiated chemical vapor deposition (iCVD) process. The surface‐growing polymerization and low‐temperature nature of the iCVD process enable the conformal growing of low‐k (≈2.2) pV3D3 insulating films on MoS₂. The fabricated memory devices exhibit a tunable memory window with high on/off ratio (≈10⁶), excellent retention times of 10⁵ s with an extrapolated time of possibly years, and an excellent cycling endurance of more than 10³ cycles, which are much higher than those reported previously for MoS₂‐based memory devices. By leveraging the inherent flexibility of both MoS₂ and polymer dielectric films, this research presents an important milestone in the development of low‐power flexible nonvolatile memory devices.     

Comparative investigation of InP/InGaAs heterostructure-emitter tunneling and superlattice bipolar transistors

In this article, the characteristics of InP/InGaAs heterostructure-emitter bipolar transistors with 30 n-InP layer tunneling layers and a five-period InP/InGaAs superlattice are demonstrated and comparatively investigated by experimentally results and analysis. In the three devices, a 200 Å n-In_0.53Ga_0.47As layer together with an n-InP tunneling emitter layer (or n-InP/n-InGaAs superlattice) forms heterostructure emitter to decrease collector-emitter offset voltage. The results exhibits that the largest collector current and current gain are obtained for the tunneling transistor with a 30 Å n-InP tunneling emitter layer. On the other hand, some of holes injecting from base to emitter will be blocked at n-InP/n-InGaAs heterojunction due to the relatively small hole transmission coefficient in superlattice device, which will result in a considerable base recombination current in the n-InGaAs layer. Therefore, the collector current and current gain of the superlattice device are the smallest values among of the devices.     

Small two-dimensional arrays of mid-wavelength infrared HgCdTe diodes fabricated by reactive ion etching-induced p-to-n-type conversion

The reactive ion etching (RIE) technique has been shown to produce high-performance n-on-p junctions by localized-type conversion of p-type mid-wavelength infrared (MWIR) HgCdTe material. This paper presents variable area analysis of n-on-p HgCdTe test diodes and data on two-dimensional (2-D) arrays fabricated by RIE. All devices were fabricated on x = 0.30 to 0.31 liquid-phase epitaxy (LPE) grown p-type (p = ∼1 × 10¹⁶ cm⁻³) HgCdTe wafers obtained from Fermionics Corp. The diameter of the circular test diodes varied from 50 μm to 600 μm. The 8 × 8 arrays comprised of 50 μm × 50 μm devices on a 100-μm pitch, and all devices were passivated with 5000 ? of thermally deposited CdTe. At temperatures >145 K, all devices are diffusion limited; at lower temperatures, generation-recombination (G-R) current dominates. At the lowest measurement temperature (77 K), the onset of tunneling can be observed. At 77 K, the value of 1/R₀A for large devices shows quadratic dependence on the junction perimeter/area ratio (P/A), indicating the effect of surface leakage current at the junction perimeter, and gives an extracted bulk value for R₀A of 2.8 × 10⁷ Ω cm². The 1/R₀A versus P/A at 195 K exhibits the well-known linear dependence that extrapolates to a bulk value for R₀A of 17.5 Ω cm². Measurements at 77 K on the small 8 × 8 test arrays were found to demonstrate very good uniformity with an average R₀A = 1.9 × 10⁶ Ω cm² with 0° field of view and D* = 2.7 × 10¹¹cm Hz^1/2/W with 60° field of view looking at 300 K background.     

Effects of Laser Excitation and Temperature on Ag/GaSe0.5S0.5/C Microwave Filters

The effects of temperature, illumination, and microwave signals on Ag/GaS_0.5S_0.5/C Schottky-type microwave filters have been investigated. The devices, which were produced from thin layers of GaSe_0.5S_0.5 single crystal, had room temperature barrier height and ideality factor of 0.65 eV and 3.28, respectively. Barrier height increased uniformly with increasing temperature, at 2.12 × 10^?2 eV/K, and the ideality factor approached ideality. The devices can even function at 95°C. A current switching phenomenon from low to high injection (“On/Off”) was also observed; this current switching appears at a particular voltage, V _s, that shifts toward lower values as the temperature is increased. When the devices were reverse-biased and illuminated with a laser beam of wavelength 406 nm, a readily distinguishable V _s was observed that shifted with increasing laser power. When the devices were run in passive mode and excited with an ac signal of power 0.0–20.0 dBm and frequency 0.05–3.0 GHz they behaved as band filters that reject signals at 1.69 GHz. Device resistance was more sensitive to signal amplitude at low frequencies (50 MHz) than at high frequencies. The features of these Ag/GaS_0.5S_0.5/C Schottky devices imply that they may be used as optical switches, as self standing, low band-pass, band reject filters, and as high band-pass microwave filters.     

Improving the peak current density of resonant tunneling diode based on InP substrate

Resonant tunneling diodes (RTD) have the potential for compact and coherent terahertz (THz) sources operating at room temperature, but their low output power severely restricts their application in THz frequency range. In this paper, two methods are adopted to increase the peak current of RTD for enhancing its output power. First, different metal contact systems (including Pt/Ti/Pt/Au and AuGe/Ni/Au) for RTD contact are introduced, and a higher current of RTD with Pt/Ti/Pt/Au contact demonstrates the superior contact characteristic of Pt/Ti/Pt/Au contact system. Second, the double barrier structure (DBS) of RTD is well designed to further improve the characteristic of RTD, and a high peak current of 154 kA/cm² is achieved at room temperature. The improved peak current is very beneficial for increasing the output power of RTD oscillator.     

Reliability and performance limitations in SiC power devices

Despite silicon carbide’s (SiC’s) high breakdown electric field, high thermal conductivity and wide bandgap, it faces certain reliability challenges when used to make conventional power device structures like power MOS-based devices, bipolar-mode diodes and thyristors, and Schottky contact-based devices operating at high temperatures. The performance and reliability issues unique to SiC discussed here include: (a) MOS channel conductance/gate dielectric reliability trade-off due to lower channel mobility as well as SiC–SiO₂ barrier lowering due to interface traps; (b) reduction in breakdown field and increased leakage current due to material defects; and (c) increased leakage current in SiC Schottky devices at high temperatures.Although a natural oxide is considered a significant advantage for realizing power MOSFETs and IGBTs in SiC, devices to date have suffered from poor inversion channel mobility. Furthermore, the high interface state density presently found in the SiC–SiO₂ system causes the barrier height between SiC and SiO₂ to be reduced, resulting in increased carrier injection in the oxide. A survey of alternative dielectrics shows that most suffer from an even smaller conduction band offset at the SiC–dielectric interface than the corresponding Silicon–dielectric interface and have a lower breakdown field strength than SiO₂. Thus, an attractive solution to reduce tunneling such as stacked dielectrics is required.In Schottky-based power devices, the reverse leakage currents are dominated by the Schottky barrier height, which is in the 0.7–1.2 eV range. Because the Schottky leakage current increases with temperature, the SiC Schottky devices have a reduction in performance at high temperature similar to that of Silcon PN junction-based devices, and they do not have the high temperature performance benefit associated with the wider bandgap of SiC.Defects in contemporary SiC wafers and epitaxial layers have also been shown to reduce critical breakdown electric field, result in higher leakage currents, and degrade the on-state performance of devices. These defects include micropipes, dislocations, grain boundaries and epitaxial defects. Optical observation of PN diodes undergoing on-state degradation shows a simultaneous formation of mobile and propagating crystal stacking faults. These faults nucleate at grain boundaries and permeate throughout the active area of the device, thus degrading device performance after extended operation.     

Graphite/<Emphasis Type="Italic">p</Emphasis>-SiC Schottky Diodes Prepared by Transferring Drawn Graphite Films onto SiC

Graphite/p-SiC Schottky diodes are fabricated using the recently suggested technique of transferring drawn graphite films onto p-SiC single-crystal substrates. The current–voltage and capacitance–voltage characteristics are measured at different temperatures and at different frequencies of a small-signal AC signal, respectively. The temperature dependences of the potential-barrier height and of the series resistance of the graphite/p-SiC junctions are measured and analyzed. The dominant mechanisms of the charge–carrier transport through the diodes are determined. It is shown that the dominant mechanisms of the transport of charge carriers through the graphite/p-Si Schottky diodes at a forward bias are multi-step tunneling recombination and tunneling described by the Newman formula (at high bias voltages). At reverse biases, the dominant mechanisms of charge transport are the Frenkel–Poole emission and tunneling. It is shown that the graphite/p-SiC Schottky diodes can be used as detectors of ultraviolet radiation since they have the open-circuit voltage V_oc = 1.84 V and the short-circuit current density I_sc = 2.9 mA/cm² under illumination from a DRL 250-3 mercury–quartz lamp located 3 cm from the sample.     

High-performance 0.10-μm CMOS devices operating at roomtemperature

The authors have fabricated 0.10-μm gate-length CMOS devices that operate with high speed at room temperature. Electron-beam lithography was used to define 0.10-μm polysilicon gate patterns. Surface-channel type p- and n-channel MOSFETs were fabricated using an LDD structure combined with a self-aligned TiSi₂ process. Channel doping was optimized so as to suppress punchthrough as well as to realize high transconductance and low drain junction capacitance. The fabricated 0.10-μm CMOS devices have exhibited high transconductance as well as a well-suppressed band-to-band tunneling current, although the short-channel effect occurred somewhat. The operation of a 0.10-μm gate-length CMOS ring oscillator has been demonstrated. The operation speed was 27.7 ps/gate for 2.5 V at room temperature, which is the fastest CMOS switching ever reported     

Electromigration study of SNS ramp edge Josephson junctions

We report on the effects of electromigration of basal plane oxygen vacancies on SNS ramp edge Josephson junctions where the N-layer is YBa₂Cu_2.79Co_0.21O_7−δ, a doped version of the YBCO electrodes. Through the application of a 4–10 mA (∼2–5 MA/cm²) current bias at room temperature, the basal plane oxygen order and content in the N and S layers were improved. This is demonstrated by an increase in I_cR_n from <5 μV, to as much as 205 μV. The implications of these results on SNS junction fabrication, and the nature of tunneling in such devices are discussed.     

Light-emitting tunneling nanostructures based on quantum dots in a Si and GaAs matrix

InGaAs/GaAs and Ge/Si light-emitting heterostructures with active regions consisting of a system of different-size nanoobjects, i.e., quantum dot layers, quantum wells, and a tunneling barrier are studied. The exchange of carriers preceding their radiative recombination is considered in the context of the tunneling interaction of nanoobjects. For the quantum well-InGaAs quantum dot layer system, an exciton tunneling mechanism is established. In such structures with a barrier thinner than 6 nm, anomalously fast carrier (exciton) transfer from the quantum well is observed. The role of the above-barrier resonance of states, which provides “instantaneous” injection into quantum dots, is considered. In Ge/Si structures, Ge quantum dots with heights comparable to the Ge/Si interface broadening are fabricated. The strong luminescence at a wavelength of 1.55 μm in such structures is explained not only by the high island-array density. The model is based on (i) an increase in the exciton oscillator strength due to the tunnel penetration of electrons into the quantum dot core at low temperatures (T < 60 K) and (ii) a redistribution of electronic states in the Δ₂-Δ₄ subbands as the temperature is increased to room temperature. Light-emitting diodes are fabricated based on both types of studied structures. Configuration versions of the active region are tested. It is shown that selective pumping of the injector and the tunnel transfer of “cold” carriers (excitons) are more efficient than their direct trapping by the nanoemitter.     

Transport Properties of Se/As2Se3 Nanolayer Superlattice Fabricated Using Rotational Evaporation

Since their proposal by Esaki, superlattices have been observed to have fascinating features such as quantum size effects, negative differential resistance, and sequential resonant tunneling. However, the technology threshold for fabricating superlattices is high, requiring methods like molecular beam epitaxy (MBE) and atomic layer deposition (ALD), among others, even for amorphous materials. Thus, the desirable features from superlattices have not been extensively utilized. It is shown that superlattices of Se and As₂Se₃ (superlattice‐Se), fabricated using rotational evaporation, exhibit sequential tunneling, a typical superlattice feature. From current–voltage measurements of the superlattice deposited on n‐type Si, oscillations in the characteristics are observed. Using models of reverse‐biased Schottky barriers, the observations are explained as tunneling in sequence from superlattice minibands. The superlattice‐Se also shows carrier blocking, with a resistivity of the order of 10¹² Ω cm in dark conditions at room temperature, despite the low resistivity (≈10 Ω cm) of the n‐type Si substrate. When the Si is illuminated, the device shows higher detectivity for weaker signals compared to higher illumination. The ease of fabrication, and the blocking and amplifying capabilities make superlattice‐Se an interesting “add‐on” structure to improve conventional photodetector materials such as Si or Ge, which have issues with dark currents at room temperature.     

A study on the improved programming characteristics of flash memory with Si3N4/SiO2 stacked tunneling dielectric

The programming characteristics of memories with different tunneling-layer structures (Si₃N₄, SiO₂ and Si₃N₄/SiO₂ stack) dielectrics are investigated using 2-D device simulator of MEDICI. It is theoretically confirmed that the memory with the SiO₂/Si₃N₄ stacked tunneling layer exhibits better programming characteristics than ones with single tunneling layer of SiO₂ or Si₃N₄ for programming by channel hot electron (CHE) injection. A 10-μs programming time with a threshold-voltage shift of 5 V can be obtained for the memory with SiO₂/Si₃N₄ stacked tunneling layer at V_cg = 10 V and V_ds = 3.3 V. This is attributed to the fact that the floating-gate voltage is close to drain voltage for the stacked tunneling dielectric (TD), and thus the CHE injection current is the largest. Furthermore, optimal substrate concentration is determined to be 5 × 10¹⁶–2 × 10¹⁷ cm⁻³, by considering a trade-off between the programming characteristics and power dissipation/lifetime of the devices. Lastly, the effects of interface states on the programming characteristics are investigated. Low interface-state density gives short programming time and small post-programming control-gate current.