Effects of shadow‐mask voltage on the discharge in shadow‐mask PDPs

Abstract— A new type of ACPDP with a shadow mask (shadow‐mask PDP, SMPDP) has been developed, featuring an effective structure and lower cost. The distinct difference between an SMPDP and a conventional ACPDP is that the dielectric barrier ribs are replaced by a single metal shadow mask. A three‐dimensional self‐consistent fluid model was used to analyze the effects of the shadow‐mask voltage on the discharge for a simplified driving scheme. The simulation results indicate that by selecting the appropriate shadow‐mask voltage, the addressing speed can be improved due to the local strong electric field. The steady discharge in the sustaining period will not be affected by changes in the shadow‐mask voltages in the addressing period. While in the sustaining period, the shadow‐mask‐voltage variation can directly affect the sustaining discharge. The floating shadow mask in the sustaining period is beneficial in achieving a stable sustaining discharge.     

Investigation of the discharge process in a shadow‐mask PDP cell using fluid models

Abstract— Two fluid models, LFA (local field approximation) and EME (electron mean energy), were applied to simulate the discharge process of a novel PDP with a shadow mask. In order to consider the variation of the secondary electron emission coefficient under different electric‐field and gas content, the secondary electron emission coefficient was calculated as a function of the energy of incident ions. The variation of the mean density of different particles as a function of time, electron temperature, and their space distributions in the discharge cell will be presented. And the simulation results of these two models are also compared in this paper. Then the EME model was used to investigate the relation between the discharge efficiency and the structure of the shadow mask, the xenon concentration, and the pressure.     

Petri nets based FPGA controller of PDP sustainer with half‐voltage energy recovery circuit

This paper proposes a FPGA controller design of a driver circuit based Petri nets for the Plasma Display Panel (PDP). In such a driver circuit, complicated control logic is required in the PDP sustainer circuit to implement the sustaining voltage waveform. The control logic has the zero‐switching behaviour for the driver circuit to provide better efficiency for the driving circuit. Conventionally, the VHDL programmer does not have a systematic way to program the control logic. Time delay problem of logic components in logic controller may occur under high frequency operation. With the help of the proposed Petri nets approach, the VHDL programming for the PDP driver circuit can be easier in a systematic way. Also, this paper illustrates three types of sustainers with Petri nets based FPGA controller. The basic full‐bridge and full‐voltage sustainers are used to compare the performance with the proposed half‐voltage sustainer. Details of the circuit operation are described. From the experimental results, the performance such as efficiency, luminance, and gamma curve are assessed to show the effectiveness of the proposed half‐voltage sustainer. It is believed that the proposed Petri nets based control circuit is very powerful for the practical application of the PDP sustainer circuit. Copyright © 2010 John Wiley and Sons Asia Pte Ltd and Chinese Automatic Control Society     

Discharge characteristics and low‐voltage driving of high‐Xe‐content PDPs

Abstract— High‐Xe‐content PDPs attain improved luminous efficiency, but with sacrifices of higher sustain and address voltages and slower discharge build‐up. By examining PDPs with 3.5–100% Xe contents, it was revealed that space‐charge priming as well as wall‐charge accumulation are effective in obtaining low‐voltage and high‐speed operation. In addition, it was found that the effectiveness is emphasized for higher‐Xe‐pressure PDPs. In this respect, erase addressing is more favorable than write addressing, especially for high‐Xe‐pressure PDPs. The formative time lag of the discharge and diffusion/drift of the space charges are shorter for high Xe contents. In this respect, high‐Xe‐content PDPs have a potential for high‐speed addressing, if driven adequately. The use of space‐charge priming, however, is limited by the duration between the priming and scan pulses. Accumulation of wall charges is limited by ignition of a self‐erase discharge with which all the wall charges are dissipated. Although the highest efficiency and luminance are attained with a 100%‐Xe panel, the optimum Xe gas content, considering the sustain pulse voltage and drive voltage margin, would be 70% Xe + Ne.     

Improvement of PDP discharge efficiency based on macro‐cell studies

Abstract— In this paper we explain how macro‐cells (real PDP cells scaled‐up a hundred times) with external and removable electrodes have been validated by comparison with real panels and modeling and used to optimize the luminous efficacy of real PDPs. We illustrate the application of the macroscopic PDP tool to optimize the electrode configuration of short‐gap discharges towards higher luminous efficacy, as well as its use in conjunction with 2D and 3D modeling to lower the operating voltages of high‐efficacy long‐gap discharges triggered by auxiliary electrodes.     

PDP picture‐quality enhancement based on human‐visual‐system relevant features

The success of a new display technology such as plasma is strongly related to the final picture quality assessed by the customer's eyes. The human visual system (HVS) characteristics enable the definition of new cost‐efficient methods to significantly reduce the visibility of all plasma‐specific artifacts. Simple optimized encoding methods based on the luminance perception will be presented as well as more‐complicated algorithms based on motion perception.     

New metacode coding concept for improving PDP gray‐scale quality

Abstract— Today, methods for power management of plasma display panels (PDP) have been developed in order to provide a maximum peak white for a given picture content with stable power consumption. However, the quality of the gray‐scale portrayal with such concepts is far from the actual CRT standards. We have developed a new PDP encoding concept called Metacode to improve gray‐scale quality during all power and contrast adjustment towards CRT level.     

Influence of barrier‐rib morphologies on PDP efficacy

Abstract— In this study, the effects of barrier‐rib morphology on the luminance efficacy of PDPs were examined. Barrier ribs such as stripe, waffle, rectangular, honeycomb, SDR, and inverse SDR types were prepared using the capillary molding process. By using rear plates with such barrier ribs, the luminance and its efficacy were measured. The results demonstrated the feasibility of a capillary molding process in fabricating high‐efficacy PDP discharge cells.     

High‐efficacy drive of spatial positive‐column‐discharge PDP with delayed D pulses

Abstract— A thick‐film ceramic‐sheet PDP provides a long sustain discharge gap of 0.45 mm, enabling the use of positive column discharges. The discharges are established in the middle of the discharge space and are completely free from touching the surface of substrates. This allows for the reduction in diffusion losses of the charged particles. To further improve the efficacy, delayed D pulses are applied to the address electrodes during the sustain period. Although the pulses only draw a little current, they perturb the electric field, reducing the peak discharge current and hence resulting in higher efficacy and luminance. The efficacy and luminance increase by 35% and 38%, respectively, with the delayed D pulses. These pulses are incorporated into the contiguous‐subfield erase‐addressing drive scheme for TV application. A short gap of 70 μm between the sustain and data electrodes generates a fast‐rising discharge and allows a high‐speed addressing of 0.25 μsec. This provides 18 contiguous subfields for the full‐HD single‐scan mode, with 70% light emission duty. A luminous efficacy of 6.0 lm/W can been attained using Ne + 30% Xe 47 kPa, a sustain voltage of 320 V, and a sustain frequency of 3.3 kHz, when the luminance is 157 cd/m². Alternatively, the panel can achieve 4.2 lm/W and 1260 cd/m² by increasing the sustain frequency to 33 kHz.     

Discharge analysis of high‐efficacy PDP with a luminous efficacy of 5 lm/W

Abstract— The discharge mechanism concerning the width of the display electrodes in high‐Xe‐content gas mixtures to improve the luminous efficacy of PDPs has been researched. It was found that a luminous efficacy of 5 lm/W was realized for a high‐Xe‐content gas mixture and narrower display electrodes. For a high‐Xe‐content gas mixture, the luminous efficacy increases as the display electrode becomes narrower. This phenomenon was analyzed by observing the emission from a discharge cell. The observation data indicate that a high electron heating efficiency contributes to increased luminous efficacy along with narrow electrodes for a high‐Xe‐content gas mixture as well as high excitation efficiency.     

Space and time evolution of the plasma in a PDP cell: Comparisons between simulations and experiments

We have used a macroscopic discharge cell to study the space and time evolution of the plasma in geometry similar to real matrix and coplanar PDP cells with a scaling factor of around 100 (dimensions 100 times larger, pressure 100 times smaller, i.e., 1‐cm gap length, 5‐torr pressure). Discharges in pure neon and in a xenon‐neon mixture with 10% xenon have been investigated. The measurements have been compared with results from a two‐dimensional fluid model of the discharge.     

Threshold‐voltage recovery of a‐Si:H digital circuits

Abstract— A‐Si:H thin‐film transistors demonstrate threshold voltage recovery of several volts after room‐temperature rest with no applied voltage. The extent to which this phenomenon can be used to extend the operational lifetime of a‐Si:H digital circuits is examined and is shown to be strictly limited.     

Data‐pulse‐voltage reduction of AC‐PDPs by using metastable‐particle priming

Abstract— It is shown that space charges dominate the build‐up of an address discharge when it is preceded by a priming discharge in less than 32 μsec. When the separation of these discharges (cease period) exceeds 32 μsec, the space charges diffuse away and the metastable particles start playing the role of priming. The priming effect of the metastable particles is not too strong, which is desirable for adopting a data‐pulse‐voltage reduction technique for PDPs. By choosing the length of the cease period to be between 32 and 80 μsec in the Address‐While‐Display drive scheme, the data pulse voltage was reduced to 20 V. This leads to a considerable cost reduction of data driver ICs.     

Characteristics of a high‐Xe‐concentration 4‐in. PDP

The performance of two 4‐in. color PDP test panels with a default and a high‐Xe‐concentration gas mixture will be discussed. The default panel with a gas mixture of 3.5% Xe in Ne and a filling pressure of 665 hPa was compared with a panel containing a gas mixture of 13.5% Xe in Ne and a filling pressure of 800 hPa. The panels contain a green phosphor, YBO₃:Tb, which showed less saturation at high UV load compared with a Willemite phosphor. The panel performance was compared in addressed conditions. For the default panel, a white luminance of 710 cd/m² and an efficacy of 1.6 lm/W was found, while for the high‐Xe‐partial‐pressure panel, a white luminance of 2010 cd/m² and an efficacy of 3.8 lm/W was realized. The increase of the driving voltages, about 20–30 V, is moderate. Finally, color saturation is improved at high Xe partial pressure.     

New driving scheme for intelligent power‐efficient high‐voltage display drivers

Abstract— A new bistable‐display driver is presented. The innovation in the developed driver is the addition of a new logical block that calculates the most energy‐efficient driving waveforms. In this paper, the algorithms being applied to the row and column waveforms in order to reduce the power consumption are discussed. Some theoretical as well as experimental results are shown, proving a reduction in the power consumption by about 50%. The proposed algorithms are especially important for battery‐powered applications.     

Use of self‐erase discharges for high‐speed and low‐voltage addressing of PDPs

Abstract— A technique called “self‐erase‐discharge addressing” has been incorporated with a address‐while‐display driving scheme, contiguous subfield, and erase addressing to obtain high‐speed and low‐voltage addressing of PDPs. The technique uses a relatively high X‐sustain pulse voltage VXsus, which produces a weak self‐erase discharge at its trailing edge. An application of a data pulse Vdata synchronous to a weak self‐erase discharge results in full erase discharge and eliminates all the wall charges. The technique assures a wider operating‐voltage margin since it provides identical amounts of priming charges as well as wall charges to all the horizontal scan lines just prior to addressing. The priming charges are generated by the weak self‐erase discharges, resulting in low Vdata of 30 V and a high addressing speed of 0.66 μsec for a Ne + 10% Xe PDP. V_Xsus = 245 V, and the voltage margins of Vdata and VXsus were 35 and 16 V, respectively. For a 30% Xe PDP, Vdata and VXsus were 30 and 335 V, respectively, with an addressing speed of 1.0 μsec. In order to obtain high dark‐room contrast, it is essential to use ramp reset pulses, with which erase addressing cannot be achieved. By adopting the write addressing only to the first subfield and the self‐erase‐discharge addressing to the subsequent subfields, a peak and background luminance in green of 3100 and 0.22 cd/m², respectively, were obtained with a dark‐room contrast of 14,000:1. The number of subfields was 28, and the light emission duty was 83%. The number of ramp reset pulse drivers could be reduced to 12 by adopting the common reset pulse technique.     

Discharge striations on a coplanar AC‐PDP

Abstract— Observations suggest that the discharge striations in a coplanar AC‐PDP are related to the ion wall‐charge waves generated by the self‐sustained perturbations during the force‐balancing between the ion and the electron wall charge accumulated on the dielectric layer over the electrodes.     

Effect of intensified discharge in the vicinity of ribs on PDP performance

It was determined that the discharge in the vicinity of ribs should be intensified to obtain low‐voltage, high‐luminous efficacy, and high module efficiency. One possible way is to increase the space between ribs and the discharge surface. Even if the amount of space increases by only 2 or 3 µm, it still results in low discharge voltage, large discharge current, and high luminous efficacy. For that reason it might be important to control the micron‐sized particles included in the MgO crystal dispersed layers. Another preferable way is to use ribs with a low electric permittivity (ε) that are represented by porous ribs. Moreover, low‐ε ribs diffuses the high‐energy spots in plasma, resulting in a high luminous efficacy. They feature a significantly lower sustain voltage and a smaller parasitic capacitance as well to facilitate a help high module efficiency. Also, highly porous ribs are expected to increase their practical use in aspects of mechanical strength and impurity gas exhaustion.     

A highly integrated AMLCD with low‐voltage operation

A highly integrated low‐temperature polysilicon AMLCD has been designed that operates from a 3‐V power supply and has a low‐voltage digital interface. This has been achieved by reducing the threshold voltage of the TFTs and integrating digital column drive circuits and charge‐pump circuits onto the display substrate. In standby mode, the display is capable of retaining an image without the need for external signals through the integration of dynamic‐memory circuits within the pixels of the display.     

On the Subsymbolic Nature of a PDP Architecture that Uses a Nonmonotonic Activation Function

PDP networks that use nonmonotonic activation functions often produce hidden unit regularities that permit the internal structure of these networks to be interpreted (Berkeley et al., 1995; McCaughan, 1997; Dawson, 1998). In particular, when the responses of hidden units to a set of patterns are graphed using jittered density plots, these plots organize themselves into a set of discrete stripes or bands. In some cases, each band is associated with a local interpretation. On the basis of these observations, Berkeley (2000) has suggested that these bands are both subsymbolic and symbolic in nature, and has used the analysis of one network to support the claim that there are fewer differences between symbols and subsymbols than one might expect. We suggest below that this conclusion is premature. First, in many cases the local interpretation of each band is difficult to relate to the interpretation of a network's response; a more appropriate relationship only emerges when a band associated with one hidden unit is considered in the context of other bands associated with other hidden units (i.e., interpretations of distributed representations are more useful than interpretations of local representations). Second, the content that a band designates to an external observer (i.e., the interpretation assigned to a band by the researcher) can be quite different from the content that a band designates to the output units of the network itself.. We use two different network simulations – including the one described by Berkeley (2000) – to illustrate these points. We conclude that current evidence involving interpretations of nonmonotonic PDP networks actually illustrates the differences between symbolic and subsymbolic processing.