Reliability and RF performance of BGA solder joints with plastic-core solder balls in LTCC/PWB assemblies

In this paper board-level reliability of low-temperature co-fired ceramic (LTCC) modules with thermo-mechanically enhanced ball-grid-array (BGA) solder joint structure mounted on a printed wiring board (PWB) was experimentally investigated by thermal cycling tests in the 0–100 °C and −40 to 125 °C temperature ranges. The enhanced joint structure comprised solder mask defined (SMD) AgPt pad metallization, eutectic solder and plastic-core solder balls (PCSB). Similar daisy-chained LTCC modules with non-collapsible 90Pb10Sn solder spheres were used for a reference test set. The reliability of the joint structures was analyzed by resistance measurements, X-ray microscopy, scanning acoustic microscopy (SAM) and SEM/EDS investigation. In addition, a full-wave electromagnetic analysis was performed to study effects of the plastic-core material on the RF performance of the LTCC/BGA package transition up to millimeter-wave frequencies. Thermal cycling results of the modules with PCSBs demonstrated excellent fatigue performance over that of the reference. In the harsher cycling test, Weibull’s shape factor β values of 7.9 and 4.8, and characteristic lifetime θ values of 1378 and 783 were attained for the modules with PCSBs and 90Pb10Sn solder spheres, respectively. The primary failure mode in all test assemblies was fatigue cracking in eutectic solder on the ceramic side.     

Degradation behavior of 600 V–200 A IGBT modules under power cycling and high temperature environment conditions

One challenge for automotive hybrid traction application is the use of high power IGBT modules that can withstand high ambient temperatures, from 90 °C to 120 °C, for reliability purpose. The paper presents ageing tests of 600 V–200 A IGBT modules subjected to power cycling with 60 °C junction temperature swings at 90 °C ambient temperature. Failure modes are described and obtained results on the module characteristics are detailed. Especially, physical degradations are described not only at the package level, like solder attach delaminations, but also at the chip level, with a shift on electrical characteristics such as threshold voltage. Finally, numerical investigations are performed in order to assess the thermal and thermo-mechanical constraints on silicon dies during power cycling and also to estimate the effect of ambient temperature on the mechanical stresses.     

Effect of solder creep on the reliability of large area die attachment

High temperature solders have been widely used for power device die attachment. One typical solder is Pb92.5In5Ag2.5, which is a ternary eutectic alloy with a eutectic temperature of 310°C. Such a Pb-based solder has a low Young's modulus, a low yield strength, and a high strain prior to failure. So it can be used to attach large size silicon die to mismatched substrates. In this paper, stresses and strains have been studied on a large size power MOSFET attachment using the Pb92.5In5Ag2.5 solders. A commercial finite element analysis software is employed as the simulation tool. Three types of substrates, pure copper, copper–tungsten composite, and pure molybdenum are used in the study, where molybdenum has the closest coefficient of thermal expansion to silicon. In addition to the plastic deformation simulation of the solder, a creep model of the solder was incorporated due to the low melting temperature of the solder alloy. Firstly, stresses and strains are calculated during the cooling cycle after attachment. It is found that the creep strain is the dominant plastic strain at low cooling rate (10°C/min). Also, the maximum Von Mises stress in the Si chip is decreased from 174 to 62.7 MPa after adding creep strain. As expected, the maximum creep strain happens to the die-to-copper substrate attach. Simulation on temperature cycling is done from −55°C to +150°C. The peak Von Mises stress occurs at the low temperature extreme and holds steadily during the soaking period, indicating insignificant contribution from creep. The Von Mises stress at the high temperature extreme is much lower and decreases with holding time. Significant plastic deformation of the solder layer is observed in cooling cycles. For silicon to copper substrate attach, its plastic deformation increases with each cycle. For all three substrates used, considerable solder creep is observed at heating cycles. The creep strain is much larger than the rate-independent plastic strain in the solder alloy for all three types of substrates. It is concluded that solder creep is the dominant factor affecting long term reliability of power semiconductor die attachment.     

Rapid power cycling of flip-chip and CSP components on ceramic substrates

Power cycling has been done for flip-chip and CSP components solder joined onto ceramic substrates. Cycle periods as short as 1 min were applied in the experiments where the chip temperature varied between about 30°C in the power off-state and 100–150°C in the power on-state. Disconnections of the joints were found after 4000–17 000 power cycles. The flip-chip components joined onto low temperature cofired ceramic substrate showed slightly better reliability than the components joined onto alumina substrate. Most of the samples showed clear effects of deterioration of the joints seen as increasing chip temperature for power on-state. The experimental results are compared with calculations based on modified Coffin–Manson equation as well as with one-dimensional simulations.     

Pb-free high temperature solders for power device packaging

Reliabilities of joints for power semiconductor devices using a Bi-based high temperature solder has been studied. The Bi-based solder whose melting point is 270 °C were prepared by mixing of the CuAlMn particles and molten Bi to overcome the brittleness of Bi. Then, joined samples using the solder were fabricated and thermal cycling tests were examined. After almost 2000 test cycles of −40/200 °C test, neither intermetallic compounds nor cracks were observed for CTE (Coefficient of Thermal Expansion) matched sample with Cu interface. On the other hand, certain amount of intermetallic compound such as Bi₃Ni was found for a sample with Ni interface. In addition, higher reliability of this solder than Sn-Cu solder was obtained after −40/250 °C test. Furthermore, an example power module structure using double high temperature solder layers was proposed.     

Isothermal aging effects on the microstructure and solder bump shear strength of eutectic Sn37Pb and Sn3.5Ag solders

The reliability of the eutectic Sn37Pb (63%Sn37%Pb) and Sn3.5Ag (96.5%Sn3.5%Ag) solder bumps with an under bump metallization (UBM) consisting of an electroless Ni(P) plus a thin layer of Au was evaluated following isothermal aging at 150 °C. All the solder bumps remained intact after 1500 h aging at 150 °C. Solder bump microstructure evolution and interface structure change during isothermal aging were observed and correlated with the solder bump shear strength and failure modes. Cohesive solder failure was the only failure mode for the eutectic Sn37Pb solder bump, while partial cohesive solder failure and partial Ni(P) UBM/Al metallization interfacial delamination was the main failure mode for eutectic Sn3.5Ag solder bump.     

Long time reliability study of soldered flip chips on flexible substrates

Due to the requirements of new light, mobile, small and multifunctional electronic products the density of electronic packages continues to increase. Especially in medical electronics like pace makers the minimisation of the whole product size is an important factor. So flip chip technology becomes more and more attractive to reduce the height of an electronic package. At the same time the use of flexible and foldable substrates offers the possibility to create complex electronic devices with a very high density. In terms of human health the reliability of electronic products in medical applications has top priority.In this work flip chip interconnections to a flexible substrate are studied with regard to long time reliability. Test chips and substrates have been designed to give the possibility for electrical measurements. Solder was applied using conventional stencil printing method. The flip chip contacts on flexible substrates were created in a reflow process and underfilled subsequently.The assemblies have been tested according to JEDEC level 3. The focus in this paper is the long time reliability up to 10,000 h in thermal ageing at 125 °C and temperature/humidity testing at 85 °C/85% relative humidity as well as thermal cycling (0 °C/+100 °C) up to 5000 cycles. Daisy chain and four point Kelvin resistances have been measured to characterise the interconnections and monitor degradation effects.The failures have been analysed in terms of metallurgical investigations of formation and growing of intermetallic phases between underbump metallisation, solder bumps and conductor lines. CSAM was used to detect delaminations at the interfaces underfiller/chip and underfiller/substrate respectively.     

Impact of board and component metallizations on microstructure and reliability of lead-free solder joints

Aging and accelerated thermal cycling (ATC) have been performed on 2512 chip resistors assembled with Sn3.8Ag0.7Cu (wt.%) solder. The boards were finished with immersion Ag (IAg), electroless nickel/immersion gold (ENIG), and hot air solder leveling Sn–Pb eutectic solder (HASL), and the components’ terminations were finished with 100% Sn and Sn8.0Pb (wt.%). The boards were reflowed with an average cooling rate of 1.6 °C/s. It was found that the microstructure and reliability of the solder joints depended on the board surface finish. The boards containing small amounts of Pb (from board/component terminations) were the most reliable. Solder joints to copper showed a significantly higher number of cycles to first failure than the joints on nickel. Better reliability of the Sn3.8Ag0.7Cu/Cu joints was attributed to an increased copper content in the bulk due to substrate dissolution.     

Experimental study on the thermo-mechanical effects of underfill and low-CTE substrate in a flip-chip device

Moiré interferometry was used to analyze the thermal deformation of four flip-chip devices mounted on FR-4 substrate and a new multi-layer substrate, with and without underfill. Thermal loading was applied by cooling the devices from 100 °C to room temperature (25 °C). The effects of underfill and the low-CTE (coefficient of thermal expansion) substrate on thermal deformation were investigated. The experimental results showed that the underfill curved in a manner similar to the silicon chip. For the flip-chip devices mounted on the multi-layer substrate, the CTE mismatch between the silicon chip and substrate was reduced, and bending deformation decreased. Of the four flip-chip devices studied, the underfilled flip-chip device mounted on the multi-layer substrate had the least deformed solder balls.     

Effects of TMF heating rates on damage accumulation and resultant mechanical behavior of Sn–Ag based solder joints

Solder joint reliability depends on several service parameters such as temperature extremes encountered, dwell times at these temperatures, and the ramp-rates representing the rate at which the temperature changes are imposed. TMF of Sn–Ag based solder alloy joints of realistic dimensions were carried out with dwell of 115 min and 20 min at 150 °C and −15 °C, respectively. Different heating rates were obtained by controlling the power input during heating part of TMF cycles. Surface damage and residual mechanical strength of these solder joints were characterized after 0, 250, 500, and 1000 TMF cycles to evaluate the role of TMF heating rate on the solder joint integrity.     

Effects of metallization thickness of ceramic substrates on the reliability of power assemblies under high temperature cycling

This study focuses on the influence of metallization thickness of ceramic substrates on reliability and lifetime of electronic power assemblies under high temperature cycling. The paper presents experimental and numerical results on different test vehicles with a number of DCB substrates with AlN ceramic and different copper thicknesses. It will be shown the influence of the DCB metallization on failure modes such as ceramic fracture and solder delamination under high temperature cycles. Finally, these samples will be compared with DCB substrates equipped with dimples and DAB substrates. Furthermore, the main factors that could increase the lifetime expectancy of power modules in such harsh environments will be identified.     

Reliability study of the electroless Ni–P layer against solder alloy

Copper (Cu) has been widely used in the under bump metallurgy of chip and substrate metallization for chip packaging. However, due to the rapid formation of Cu–Sn intermetallic compound (IMC) at the tin-based solder/Cu interface during solder reaction, the reliability of this type of solder joint is a serious concern. In this work, electroless nickel–phosphorous (Ni–P) layer was deposited on the Cu pad of the flexible substrate as a diffusion barrier between Cu and the solder materials. The deposition was carried out in a commercial acidic sodium hypophosphite bath at 85 °C for different pH values. It was found that for the same deposition time period, higher pH bath composition (mild acidic) yields thicker Ni–P layer with lower phosphorous content. Solder balls having composition 62%Sn–36%Pb–2%Ag were reflowed at 240 °C for 1 to 180 min on three types of electroless Ni–P layers deposited at the pH value of 4, 4.8 and 6, respectively. Thermal stability of the electroless Ni–P barrier layer against the Sn–36%Pb–2%Ag solder reflowed for different time periods was examined by scanning electron microscopy equipped with energy dispersed X-ray. Solder ball shear test was performed in order to find out the relationship between the mechanical strength of solder joints and the characteristics of the electroless Ni–P layer deposited.The layer deposited in the pH 4 acidic bath showed the weak barrier against reflow soldering whereas layer deposited in pH 6 acidic bath showed better barrier against reflow soldering. Mechanical strength of the joints were deteriorated quickly in the layer deposited at pH 4 acidic bath, which was found to be thin and has a high phosphorous content. From the cross-sectional studies and fracture surface analyses, it was found that the appearance of the dark crystalline phosphorous-rich Ni layer weakened the interface and hence lower solder ball shear strength. Ni–Sn IMC formed at the interfaces was found to be more stable at the low phosphorous content (14 at.%) layer. Electroless Ni–P deposited at mild acidic bath resulting phosphorous content of around 14 at.% is suggested as the best barrier layer for Sn–36%Pb–2%Ag solder.     

Long term reliability testing of HV-IGBT modules in worst case traction operation

High reliability level is required for IGBT modules used in power converters in railway traction application which however are subject to high stress because of the typical cycling operation which causes thermomechanical fatigue. The paper reports about Ansaldo Trasporti activity in IGBT's reliability testing. Facility simulating worst case traction operation is described and the result after operation is presented: due to such stressing action, a solder delamination at the baseplate seems to be the first failure mechanism to be excited.     

A two-layer high density printed circuit board and its reliability

The fabrication and reliability of a two-layer high density PCB test vehicle are reported in this paper. The test board consisted of two copper layers that were sequentially built up on one side of a FR4 substrate and interconnected through a photovia dielectric layer. Various test structures were fabricated for reliability testing. Thermal cycling, 85°C/85%RH ageing, and multiple reflow excursions were performed to test the reliability of electrical continuity and insulation. Peel strength was measured after fabrication as well as after 150°C annealing and reflow excursions. Initial results have revealed that photovias may be more reliable than conventional through vias.     

Enhanced power cycling performance of IGBT modules with a reinforced emitter contact

A typical emitter contact of an IGBT consists of a front metallization and bond wires. In this study, the power cycling performance of a special emitter contact design is experimentally verified. The emitter contact includes a metal plate, which is Ag-sintered to the metallization and wire bonded on the top surface. Either Cu or Al bond wires were implemented. Power cycling tests were performed to investigate the performance of such IGBT modules. The results were very promising and a cycling lifetime was achieved, which is about 20 times higher than the lifetime of typical IGBT modules. For a better understanding of the experimental results, the electrical and thermal response of the IGBT modules were simulated by FEM. The results of this study, provide a key for high-reliability designs of the emitter contact of IGBT modules with superior power cycling capability.     

Evaluation of reliability and metallurgical integrity of wire bonds and lead free solder joints on flexible printed circuit board sample modules

This paper presents a study of the optimization of the gold plating thickness for the use of both wire bonding and soldered interconnects on a flexible printed circuit board sample module. Wire bondability is typically better, when the gold plating thickness is greater than 30 μin.; however, the risk of problems with solder joint embrittlement becomes a concern with thick gold plating. In order to better understand the effect of the gold plating thickness on wire bondability and solder joint embrittlement, an evaluation was performed on samples with three ranges of gold plating thicknesses (10–20 μin., 20–30 μin., and 30–45 μin.), on flexible printed circuit board (PCB), substrates. Mechanical shear testing and metallurgical analyses were conducted on chip component solder joints in this three thickness gold study. Thermal shock and drop testing were conducted to evaluate the reliability of the sample modules. Drop testing is especially critical for determining the reliability of the sample modules, which are used in portable consumer electronics products. Reliability testing and metallurgical analyses have been performed to characterize the effect of gold embrittlement on the mechanical integrity of the solder joints with a gold content ranging from 1 to 4 wt.%.     

Thermal stability of cobalt and nickel silicides

Thermal stability of cobalt and nickel silicides on crystalline Si (c-Si) and amorphous Si (a-Si) has been investigated. We have found that CoSi₂ is thermally stable on a-Si and c-Si substrates up to 950°C for 30 min. NiSi is stable and shows low resistivity on c-Si at around 700°C for 30 min, but is unstable on a-Si substrate even after annealing at 400°C.     

Reliability study of new SnZnAl lead-free solders used in CSP packages

We have implemented a company-wide effort to progressively reduce the use of Pb(lead) and eventually eliminate this environmental pollutant from its products. As part of this effort, it has developed a new lead-free solder that consisting of Sn(tin), Zn(zinc), and Al(aluminum) and yet offers superior productivity and joint reliability. The new lead-free solder has a melting point equivalent to that of a SnPb eutectic solder, and enables devices to be packaged at a lower temperature than with the increasingly popular Sn(tin), Ag(silver), Cu(copper) solder. Thus, the new lead-free solder accelerates the elimination of Pb from products. we have already used printed circuit boards containing the new lead-free solder in some products, and plans to extend its use to other products.We further mounted SnZnAl solder balls onto Cu/Ni(nickel)/Au(gold) plated polyimide substrate at a joining temperature of 215 °C for CSP applications. It was confirmed that the joint interface between soldered ball and substrate at the initial stage was made of 2-layered compounds, i.e., AuZnSn on soldered side and ZnSnNi on substrate side. After 1000 h aging at 150 °C, the two layers compounds become one layer of ZnSnNiAu compound. No strength deterioration of Cu/Ni/Au/SnZnAl after the 1300 h shelf test was detected in the ball shear strength compared with the initial value. This paper describes the characteristics of the new lead-free solder and the results of a study on its solder ball CSP package.     

Effects of process conditions on reliability, microstructure evolution and failure modes of SnAgCu solder joints

In this study, microstructure evolution at intermetallic interfaces in SnAgCu solder joints of an area array component was investigated at various stages of a thermal cycling test. Failure modes of solder joints were analyzed to determine the effects of process conditions on crack propagation. Lead-free printed-circuit-board (PCB) assemblies were carried out using different foot print designs on PCBs, solder paste deposition volume and reflow profiles. Lead-free SnAgCu plastic-ball-grid-array (PBGA) components were assembled onto PCBs using SnAgCu solder paste. The assembled boards were subjected to the thermal cycling test (−40 °C/+125 °C), and crack initiation and crack propagation during the test were studied. Microstructure analysis and measurements of interface intermetallic growth were conducted using samples after 0, 1000, 2000 and 3000 thermal cycles. Failures were not found before 5700 thermal cycles and the characteristic lives of all solder joints produced using different process and design parameters were more than 7200 thermal cycles, indicating robust solder joints produced with a wide process window. In addition, the intermetallic interfaces were found to have Sn–Ni–Cu. The solder joints consisted of two Ag–Sn compounds exhibiting unique structures of Sn-rich and Ag-rich compounds. A crystalline star-shaped structure of Sn–Ni–Cu–P was also observed in a solder joint. The intermetallic thicknesses were less than 3 μm. The intermetallics growth was about 10% after 3000 thermal cycles. However, these compounds did not affect the reliability of the solder joints. Furthermore, findings in this study were compared with those in previous studies, and the comparison proved the validity of this study.     

High-temperature reliability of Flip Chip assemblies

Flip Chip technology has been widely accepted within microelectronics as a technology for maximum miniaturization. Typical applications today are mobile products such as cellular phones or GPS devices. For both widening Flip Chip technology’s application range and for addressing the automotive electronics’ volume market, developing assemblies capable of withstanding high temperatures is crucial. A typical scenario for integrating electronics into a car is a control unit within the engine compartment, where ambient temperatures are around 150 °C, package junction temperatures may range from 175 °C to 200 °C and peak temperatures may exceed these values.If Flip Chip technology is used under harsh environment conditions, it is clear that especially the polymeric materials, i.e., underfiller, solder mask or the organic substrate base material, are challenged. Generally, the developmental goal for encapsulants compatible with high-temperature applications are materials with high T_g and low degradation even at temperatures >200 °C.According to these demands, a test group of advanced underfill encapsulants has been used for assembling Flip Chip devices. These test vehicles were built using lead-free and lead-containing solders such as SnAgCu and eutectic PbSn and standard FR4 substrates, for evaluating the reliability potential of state-of-the-art underfillers. Material analysis is performed for studying both material degradation as well as temperature-dependent thermo-mechanical and adhesive properties. For assessing reliability, temperature cycling is performed with different maximum test temperatures ranging from 150 °C to 175 °C. The device status is intermediately analyzed by using electrical measurement for detecting bond integrity and acoustomicroscopy for determining the occurrence and growth of delaminations. Extensive failure analysis is added to investigate device failure mechanisms, especially related to the respective test temperature.In summary, an empirical status of the high-temperature potential of state-of-the-art underfillers and material combinations is attained and an outlook on future demands and developments is provided.