A Wideband RF Frontend Architecture for Software Defined Radio

This paper presents an RF front-end architecture for wideband software defined radio to function in 400 MHz to 3.5 GHz frequency range. The frequency range covers almost all the existing standards (like GSM, UMYS, CDMA, WiFi etc.) as well as future standards (like WiMax which is still to be deployed). Although the 400 MHz–3.5 GHz band is taken, the architecture allows designers to design the front-end for any range of frequencies. In wideband front-ends, devices with high linearity are used to lower the level of intermodulation products. There are different front-end architectures available for catering to wideband operation. However, some of these, particularly the wideband ones suffer with intermodulation problem. This paper presents a partitioning mechanism that uses multiple medium bands to limit the intermodulation problem. The proposed frequency-partitioning scheme makes it possible to suppress intermodulation products further for front-end using devices of given linearity. Thus this helps in achieving better performance along with relaxing the linearity requirement of devices.     

基于拼接采样技术的宽带数字接收机

宽带数字接收机是当前的一个研究热点。介绍一个基于拼接采样技术的双通道宽带数字接收机设计及实现,描述了接收机的硬件架构、固件设计要点、拼接采样误差校正方法和指标测试结果。接收机采用商用货架器件和标准的FPGA夹层卡架构,结合拼接采样和宽带数字下变频技术进行设计,具有接收瞬时信号带宽大,预处理运算能力强,数据传输带宽大、硬件兼容性及扩展性好等特点,能广泛应用于宽带通信、雷达及电子战系统中。     

一种新型战术电台的关键技术分析与设计

软件无线电是无线通信领域中重要技术,它为新一代无线通信技术指明了方向,并提供了有力的技术保障。新型战术电台采用软件无线电技术为设计基础,新型战术电台具备宽频段覆盖、多模式多任务支持能力,是美军联合战术无线电系统的主要目标,论文对下一代战术电台的功能目标和主要技术体制进行了研究和分析,并提出了基于高集成度射频前端、组网波形、软件无线电等技术的新型战术电台设计方案。     

数字电视前端CAS软件通信架构的研究

为了解决CAS软件通信过程中的稳定性问题,介绍了前端CAS的软件通信架构,旨在设计出一种具有高可靠性且7×24 h不间断运行的CAS软件。在已经完成相关通信接口和信息交换的基础上,从软件工程和操作系统的角度,进一步深入并着重探讨前端CAS软件的通信架构,优化TCP建立连接的方式,实现了两种模式的软件。通过比较分析,得出CPU功耗更低更稳定的软件设计方案。     

毫米波宽带综合化信道技术研究进展与展望

根据现代毫米波频段军民用电子信息系统并行多功能、全频带、集成化发展趋势,提出了毫米波综合化信道技术发展需求。综述了国内外宽带综合化信道架构和关键技术研究进展,提出了基于可配置宽带毫米波前端的信道架构、全信道单片集成、超导技术、宽带线性固态功放等毫米波综合化信道技术发展方向,给出了开展毫米波宽带综合化信道技术研究的建议。     

红外光通信在ETC中的应用

介绍了一种新型的电子收费系统,利用红外光通信技术代替微波通信,在高速公路上实现全自动收费。采用红外光作为通信载体与采用无线电频率相比,具有宽带、高速、安全性高的优点。系统包括有车载单元和路侧单元两部分,分别给出了系统的硬件设计和固件程序设计。实验结果表明该方法达到了设计要求,并具有良好的通用性和灵活性。     

A 60-GHz Wideband Slot Antenna Based on Substrate Integrated Waveguide Cavity

This paper proposes a new wideband W-band substrate integrated waveguide (SIW) cavity-backed slot (CBS) antenna. The SIW cavity suppresses the backward radiation and ensures this antenna have a very low profile (only about 4% of the operating wavelength). Several techniques, such as slot resonator with semicircular end, quarter-wavelength microstrip resonator, are introduced to improve impedance matching. The studied results demonstrate that this antenna has wide operating bandwidth in 54.3–67 GHz (about 20.9% of the fractional bandwidth), unidirectional radiation pattern and good linear polarization characteristic. These properties are very suitable for RF front-end system-on-package (SoP) design in millimeter wave wireless communication systems.     

Implementing OSI systems

The correct and efficient implementation of complete open systems interconnection systems comprising the specified multiple layers of complex protocols is discussed. Also examined are the specification, design, and implementation issues and approaches at two levels: the realization of the individual protocols; and the construction of complete multilayer communication systems. The design of a multilayer communication subsystem which can run on the same processor as the applications or be confined to a front-end processor is discussed     

超宽带射频接收机的研制

超宽带(UWB)短距离无线通信技术是当前国内外研究的热点,直接序列超宽带(DS-UWB)方案和多带－正交频分复用(MB-OFDM UWB)方案是两个主要候选方案,其中多带-正交频分复用方案是较受重视的方案.本文针对MB-OFDM UWB系统,提出了一种双载波-正交频分复用(DC-OFDM UWB)的射频解决方案.该方案采用了两个相邻的子载波实现宽带通信,两个子载波是在中频部分采用合路/分路的方式,以降低硬件实现难度和系统的复杂度.设计了UWB射频接收机中的低噪声放大器(LNA)、频率合成器和解调器等关键部件,并建立了DC-OFDM UWB接收机实验演示平台.测试结果表明,研制的射频接收机满足FCC规定的射频指标要求,该方案也适用于其它的宽带通信系统中.     

A pyramid-based front-end processor for dynamic vision applications

Real-time vision tasks such as autonomous driving require prodigious computing power yet practical vision systems need to be compact and low cost. I suggest that such systems can be partitioned into two computing stages, for "front-end processing" and "high-level interpretation," respectively, and that each of these stages can be implemented as a single integrated circuit or a small number of such circuits. The two stages differ in data representation and computing architecture: The front-end stage operates on sampled image data and its computations are performed on a processor optimized for signal level processing. The high-level stage operates on abstract and symbolic image data and its computations ate performed on a general-purpose microprocessor. In this paper I describe a "segmented pipeline" architecture for front-end processing and a chip level processor implementation. This vision front-end processor is designed to support early vision functions, such as feature enhancement and motion and stereo analysis, for a broad range of dynamic vision applications. The approach makes systematic use of a multiresolution pyramid framework to achieve high computational efficiency, robustness, and precision.     

Group Communication Using Modular Protocol Stacks

Today's distributed systems consist of many different components, making the efficient management of such systems an extremely difficult task. Group communication should provide a potential solution to make the management process more flexible. It is possible to build a group communication system based on traditional distributed technology such as CORBA (Common Object Request Broker Architecture), but efficiency is poor due to lack of support for multicast and the overhead of building groups in current commercially available products. Multicast is a key part of a future group communication architecture and although reliability is not yet supported there are workarounds which provide a solution. This paper discusses the design and implementation of reliable IP multicast protocols for group communication. One important aspect of this work is the modularisation of the protocol blocks, and the design of a modular protocol, which can be used in conjunction with other similar protocol blocks to build a communication stack for group communications, is described in detail.     

A 1.1 V 6.2 mW,wideband RF front-end for 0 dBm blocker tolerant receivers in 90 nm CMOS

This paper presents the design and implementation of a low power, highly linear, wideband RF front-end in 90 nm CMOS. The architecture consists of an inverter-like common gate low noise amplifier followed by a passive ring mixer. The proposed architecture achieves a high linearity in a wide band (0.5–6 GHz) at very low power. Therefore, it is a suitable choice for software defined radio (SDR) receivers. The chip measurement results indicate that the inverter-like common gate input stage has a broadband input match achieving S11 below −8.8 dB up to 6 GHz. The measured single sideband noise figure at an LO frequency of 3 GHz and an IF of 10 MHz is 6.25 dB. The front-end achieves a voltage conversion gain of 4.5 dB at 1 GHz with 3 dB bandwidth of more than 6 GHz. The measured input referred 1 dB compression point is +1.5 dBm while the IIP3 is +11.73 dBm and the IIP2 is +26.23 dBm respectively at an LO frequency of 2 GHz. The RF front-end consumes 6.2 mW from a 1.1 V supply with an active chip area of 0.0856 mm².     

基于ADS的无线接收机数模混合系统级仿真

采用自顶向下的方法，设计了工作于L波段的宽带无线接收机。该接收机采用数模混合的weaver结构。构造了接收机模拟前端和数字基带的各个功能模块，并用ADS(Advanced Design System)软件完成了接收链路的系统级混合信号仿真。     

A Compact Rectangular Dual Patch Antenna for Multiple Satellite Communication Applications

At present, with the advances in satellite communication systems and their increasing importance, wideband antennas are in great demand for both military and commercial applications. Most of the communication systems need a wideband antenna that operates on multi-octave frequencies. In patch antenna, diverse techniques played a vital role in enhancing the antenna parameters such as gain or bandwidth. A new design concept of a compact rectangular dual patch antenna has been developed for both high gain and wider bandwidth. In this work, a compact rectangular dual patch antenna is proposed as a wideband antenna for multiple satellite communication applications such as Global Positioning System, Global Navigation Satellite System, Indian Regional Navigation Satellite System, and S-Band Satellite Communication. The designed rectangular dual patch antenna is simulated and fabricated. Based on the performance, the fabricated antenna is compared with the simulated results in terms of VSWR, gain, axial ratio, and 3 dB beam width. Increased gain and wider bandwidth have been achieved with the developed rectangular patches and their energy distributed on the surface of the dual patches simultaneously. Finally, the proposed rectangular dual patch antenna shows improved performance for the multiple satellite communication applications.

     

基于高速交换网络的软件化宽带数字阵列处理架构

针对宽带数字阵列雷达系统的特点,提出了一种以高速路由交换网络与高速点对点数据传输网络为基础的标准化、模块化、可扩展和可重构的软件化通用宽带数字阵列处理架构,并结合某宽带数字阵列雷达系统的实际需要,详细论述了系统的组成、控制信息和海量数据传输的方式、相关功能实现方案和实测验证结果。该系统实现方案可以有效地提高宽带数字阵列雷达系统软硬件协同开发效率,便于新技术快速应用以及雷达系统功能性能的灵活扩展和提升。     

Wideband and multiband CMOS LNAs: State-of-the-art and future prospects

The realization of Software Defined Radio (SDR) requires flexible RF front-end to accommodate multiple standards in different frequency bands. In this review paper, we survey the literature over the period 1995–2011 and discuss the state-of-the-art multiband and wideband LNAs in context of different receiver architectures suitable for SDR. Wideband and multiband LNA designs reported in open literature are categorized on the basis of their circuit architecture. Measured results of the sample LNA designs from each category are tabulated and discussed with emphasis on power consumption, NF, gain, linearity, and impedance matching tradeoffs. We have also discussed our own three wideband inductorless LNA design prototypes which are manufactured in 0.13 µm and 90 nm CMOS. This review infers that future LNAs suitable for SDR must be highly linear and scalable with future technology nodes.     

Ka-band direct digital receiver

A new direct-conversion wideband (26-28.5 GHz) six-port receiver is proposed for mass-market wireless communications. This six-port receiver is designed to operate without the need for precise power reading and the use of a digital signal processor that is usually required in other receivers. The proposed receiver architecture is chosen to satisfy requirements of hardware receivers used in high-speed QPSK communications. The receiver contains a receiver front-end, QPSK demodulator, and carrier recovery module. A reverse modulation loop was used to provide a rapid carrier recovery. The maximum bit rate is determined solely by the limiting speed of the baseband module. This new hardware receiver is proposed as a robust, rugged, low-cost receiver for use in wide Ka-band wireless mass-market QPSK communications such as local multipoint distribution system services, which is a prime example of communication equipment requiring such receivers. Bit-error-rate results are presented versus the noise and reference signal phase shift.     

基于解线性调频处理的步进调频信号合成方法

目前广泛应用的宽带信号实现与处理方法主要包含宽带信号解线性调频和步进调频信号合成2种。对这2种方法的优缺点进行了分析,提出了一种基于解线性调频处理的步进频宽带信号合成方法,该方法可以实现高分辨率系统中射频前端与信号处理设计难度的相互转化,根据系统资源进行指标的最优化分配。利用仿真数据对该方法进行了验证,表明了方法的有效性和优越性。     

Reconfigurable receiver approach for future wireless terminals

An overview on RF-front-end architectures and technologies for future reconfigurable mobile communication is given. A favourable solution for fourth mobile generation is an extension of traditional cellular parameters by OFDM-based systems like WLAN. Therefore, an approach for widely reconfigurable receivers considering a variety of different standards, with the example of combining WCDMA and WLAN front-end into one architecture, is presented in this paper. RF-front-end key components like low noise amplifiers, mixers, and frequency synthesizers, as well as baseband variable gain amplifiers and filters are treated, particularly with regard to reconfigurable systems.     

行星表面有人探索高速无线网络体系架构及关键技术

针对行星表面有人探索任务对高速无线通信的需求，提出了一种基于异构组网思想的网络体系架构，并对关键技术进行了分析和设计。该架构采用“三网两体制”的设计思路，将整个网络分为高速传输网、多媒体接入网、覆盖扩展网三个组成部分，三层网络分别完成高速骨干传输、多节点多业务接入、覆盖范围灵活改变的功能。根据三个网络不同的节点处理能力和传输需要，设计了高速传输体制、灵活接入体制两种传输体制，及基于无线多跳的覆盖扩展技术、多子网通信切换技术、多体制融合技术等关键技术。该网络架构具有裁剪灵活、协议开销小、支持业务类型多等特点。