Noise in buried channel charge-coupled devices

In this paper we discuss the noise measured at the output of a buried channel charge-coupled device (BCCD) linear shift register. The measured noise arises from four sources; the electrical insertion of signal charge, the output amplifier, dark current, and bulk state trapping. In making these measurements the concept of correlated double sampling was used in an output circuit which had a noise level which was equivalent to less than 3O noise electrons. A critical component in this output was a low noise MOSFET which was achieved by use of the buried channel technology. A low noise input structure for electrical insertion of signal charge was used which introduced a signal which had a noise level which ranged from less than 10 e^-to as high as 60 e^-depending on the size of the signal charge. The dark current noise was found to be well characterized as a shot noise and levels on the order of 20 e^-were measured. The above low noise levels made possible direct measurement of the noise due to bulk state trapping, and depending on the signal size and clock rate noise levels were measured which ranged from less than 10 to over 100 noise electrons. One of the most important bulk traps was found to be due to gold impurities which had a density of ∼ 2 × 10¹¹cm^-3.     

Imaging devices using the charge-coupled concept

A unified treatment of the basic electrostatic and dynamic design of charge-coupled devices (CCD's) based on approximate analytical analysis is presented. Clocking methods and tradeoffs are discussed. Driver power dissipation and on-chip power dissipation are analyzed. Properties of noise sources due to charge input and transfer are summarized. Low-noise methods of signal extraction are discussed in detail. The state of the art for linear and area arrays is presented. Tradeoffs in area-array performance from a systems point of view and performance predictions are presented in detail. Time delay and integration (TDI) and the charge-injection device (CID) are discussed. Finally, the uses of the charge-coupled concept in infrared imaging are discussed.     

Characterization of surface channel CCD image arrays at low light levels

The characterization of surface channel charge-coupled device line imagers with front-surface imaging, interline transfer, and 2-phase stepped oxide, silicon-gate CCD registers is presented. The analysis, design, and evaluation of 1/spl times/64 CCD line arrays are described in terms of their performance at low light levels. The authors describe the responsivity, resolution, spectral, and noise measurements on silicon-gate CCD sensors and CCD interline shift-registers. The influence of transfer inefficiency and electrical fat-zero insertion on resolution and noise is described at low light levels.     

Hybrid infrared focal-plane arrays

In this paper, new results are presented in the development of hybrid infrared focal-plane arrays. Attention is focused on hybrid focal-plane arrays using backside-illuminated InAsSb and HgCdTe photovoltaic detectors which are source-coupled into a charge-coupled device (CCD) multiplexer. Background suppression capabilities of the input circuit, charge skimming and partitioning, are experimentally demonstrated. Data on the uniformity and temperature dependence of the input MOSFET threshold voltage are presented. The temperature dependence of the threshold voltage agrees well with theoretically calculated values. Several aspects of the noise problems associated with the hybrid infrared focal-plane arrays are discussed. Noise of a source-coupled input circuit with a feedback amplifier is analyzed and it is shown that although two new noise sources are added, the circuit can operate with less noise than the simple source-coupled input circuit. To further understand focal-plane operation, a noise performance model has been constructed which gives excellent agreement with experimental data. Finally, the performance of hybrid focal-plane arrays is discussed.     

A physically based small-signal circuit model for heterostructureacoustic charge transport devices

A physically based small-signal circuit model for GaAs-AlGaAs Schottky gate heterostructure acoustic charge transport (HACT) devices is presented. Analytical expressions for the instantaneous and average channel current as a function of gate voltage are obtained from physical device parameters. The charge injection model is based on subthreshold current models for GaAs MESFETs. It is shown that the shape of the sampling aperture of the charge injection operation is approximately Gaussian. Good agreement is obtained between the measured DC channel current versus gate voltage and that predicted by the model. Equivalent circuits for the transfer and output sensing operations and expressions for noise sources due to the physical processes that occur within the device are developed. Thermal, shot, and transfer noise are treated. The form of the analytic expressions for frequency response and noise figure allows easy implementation on commercially available CAE software. Simulations of both gain and noise figure performed on Libra show good agreement with measured data     

Surface potential equilibration method of setting charge in charge-coupled devices

A method of setting charge in a charge-coupled device (CCD) is described whereby the input diode is suitably pulsed and an amount of charge is retained in a potential well under the first transfer electrode. It is shown that, within limits defined by the operating potentials of the device, the sizes of the generated charge packets are linearly dependent on the voltage difference between the first transfer electrode and the input gate. They are also independent of threshold voltage. The method has important applications in all CCD's where it is necessary to obtain a linear low noise charge input that is uniform from one device to another. The linearity has been demonstrated with a 64-element CCD which with a sinusoidal input shows second and third harmonics to be 40 dB down from the fundamental. Measured rms input noise was above the minimum theoretically achievable value but was still 80 dB down from the peak signal level. The electrode area was 2000 μm². For a comprehensive review on CCD's and input circuits, see [10].     

Criteria for setting the width of CCD front end transistor to reachminimum pixel noise

The paper gives the criteria to calculate the width of the front end transistor integrated next to the charge sensing electrode of CCDs or, in general, of semiconductor detectors, in order to reach the minimum noise in the readout of the signal charge. It accounts for white, series and parallel, and 1/f noise contributions. In addition, it points out two different design criteria depending whether a JFET or a MOSFET is used. The attention given to the JFET is due to a lower 1/f noise component, which makes these transistors more appealing as input devices in very high resolution detectors. The paper shows that there is a characteristic width of the FET gate that practically does not depend on the noise sources but depends only on the capacitance seen by the charge sensing electrode of the detector, making possible the optimum design of the transistor prior to knowledge of the real values of the spectral density of the noise sources, which are usually precisely known only at the end of the fabrication process. The paper shows that the pixel noise raises sharply as the transistor gate width departs from its optimum value     

Bistable noise in operational amplifiers

Bistable noise in operational amplifiers has been investigated. Equivalent circuits are used. It is shown that by changing the source resistance of an operational amplifier the locations of bistable noise sources can be determinated. Both burst noise and microplasma noise observed from an operational amplifier. The input transistors of an operational amplifier are the most important bistable noise sources. Burst noise due to elements other than the input transistors is shown to be important. Surface effects on burst noise have been discussed. Because of the surface effect, n-p-n transistors are expected to show more burst noise than p-n-p transistors. Microplasma noise in an operational amplifier is attributed to a local surface breakdown.     

模拟相关器的噪声分析

给出了分析模拟相关器的噪声模型.将相关器分成不同的几个子模块后,对各模块分别计算等效噪声源.然后用理想脉冲源代替噪声源计算电路的时变传输函数,接着用傅里叶变换计算输入输出的频域关系.利用电路的对称结构合并对称的子模块可以进一步简化模型.该模型可以用来估计相关器的噪声性能.     

Noise Analysis of Analog Correlator

A noise model for the analog correlator used in the ultra wideband receivers is proposed due to lack of simulation capability on noise performance of the correlator in current EDA tools.The analog correlator circuit is divided into several parts to calculate the equivalent noise sources respectively.The ideal impulse generators,instead of the noise sources,are then applied to obtain the time varying transfer functions.Fourier transforms are carried out to explore the relationship between the noise input and output in frequency domain for each part.Then the symmetrical noise sources are grouped together and the periodicity of the circuit is utilized to further simplify the model.This model can be used to evaluate noise performance of the correlator.     

Proposal of low-noise amplifier utilizing resonant tunnelingtransistors

A low-noise amplifier utilizing the negative input resistance of resonant tunneling transistors (RTT's) is proposed. Expected features of the RTT amplifiers are: 1) negligible effect of noise sources at the output, owing to their large power gain; 2) flat variation of noise figure (NF) versus frequency, due to white spectra of noise sources at the input; and 3) a high maximum oscillation frequency (f_max) (over several 100 GHz), Based on simulated DC characteristics, over 500 GHz f_max and 0.3 dB NF at 100 GHz are predicted for optimized AlGaAs/GaAs/AlGaAs resonant tunneling diodes (RTD's). In an RTT formed by coupling an FET to an optimized RTD, 0.55 dB minimum noise figure and 26 dB associated gain are predicted at 100 GHz. Also, a 1/w² spectrum of the input noise resistance is predicted at low frequencies     

Computer model and charge transport studies in short gate charge-coupled devices

A computer model has been developed that simulates charge transport of carriers in a surface channel charge-coupled device. This model is based on the charge continuity and current transport equations with a time dependent surface field. The device structure of the model includes a source diffusion an input gate and transfer gate. The present model is the first real simulation of the input scheme of the surface-channel CCDs. The scooping and spilling techniques associated with the charge injection process are simulated by the input diffusion which is included in the model.As an application to a CCD practical problem the present model has been used to study the linearity of the electrical charge injection into surface channel charge-coupled devices. The generated harmonic components of a sinusoidal input are calculated using the transfer characteristics of the input stage obtained from the computer simulation.Using this model the spatial variations of the self-induced fringing field and total currents under the storage and transfer gates were computed. The charge transfer mechanisms for short-gate (L ≤ 8 μm) CCDs was investigated. It was found that for short gates the charge transfer efficiency is governed mainly by the fringing field and self-induced current mechanisms. The results of this study help to clarify the mechanism by which the signal-charge level and gate length affect the charge transfer efficiency.     

Readout circuit in active pixel sensors in amorphous silicontechnology

The most widely used architecture in large area amorphous silicon (a-Si) flat panel imagers is a passive pixel sensor (PPS), which consists of a detector and a readout switch. While the PPS has the advantage of being compact and amenable toward high-resolution imaging, reading small PPS output signals requires external circuitry such as column charge amplifiers that produce additional noise and reduce the minimum readable sensor input signal. This work presents a current mode amorphous silicon active pixel that performs on-pixel amplification of noise-vulnerable sensor input signals to minimize the effect of external readout noise sources associated with “off-chip” charge amplifiers. Preliminary results indicate excellent small signal linearity along with a high and programmable charge gain     

Elimination of phase noise of pulsed laser diodes in electroopticsampling systems

The multimode operation of pulsed laser diode sources is converted into excess noise in electrooptic probing systems for electrical waveforms and prevents measurements with shot-noise-limited sensitivity. The transfer function of the sampling system is determined and analyzed in terms of the wavelength and electric field dependence. It is shown that by proper orientation of the polarizing components within the optical beam path, points of operation can by found which have both a vanishing wavelength dependence of the transfer function and maximum sensitivity to the electric fields to be measured. Excess noise sources due to wavelength fluctuations of the laser are thus eliminated, and shot-noise-limited voltage resolution is obtained. The system has been optimized to yield a voltage sensitivity of 2.3 mV/√Hz for a longitudinal LiNbO₃ probe crystal     

Design and noise analysis of a fully-differential charge pump for phase-locked loops

A fully-differential charge pump (FDCP) with perfect current matching and low output current noise is realized for phase-locked loops (PLLs). An easily stable common-mode feedback (CMFB) circuit which can handle high input voltage swing is proposed. Current mismatch and current noise contribution from the CMFB circuit is minimized. In order to optimize PLL phase noise, the output current noise of the FDCP is analyzed in detail and calculated with the sampling principle. The calculation result agrees well with the simulation. Based on the noise analysis, many methods to lower output current noise of the FDCP are discussed. The fully-differential charge pump is integrated into a 1-2 GHz frequency synthesizer and fabricated in an SMIC CMOS 0.18 μm process. The measured output reference spur is -64 dBc to -69 dBc. The in-band and out-band phase noise is -95 dBc/Hz at 3 kHz frequency offset and -123 dBc/Hz at 1 MHz frequency offset respectively.     

压阻式压力传感器信号噪声比改进研究

通过介绍压阻式压力传感器工作原理,分析噪声的主要起源,提出了针对不同噪声源(电噪声和外界电荷引起的非本征噪声)的解决措施,为将来针对高SNR的压力传感器设计提供参考依据。     

Theory of lightwave synthetic noise generation

Lightwave synthetic noise generators are instruments for microwave-photonic measurements. They facilitate the measurement of noise and bandwidth in lightwave receivers and electrical amplifiers. When synthetic noise is generated at the input of a lightwave receiver, the equivalent input noise of the receiver can easily be determined by comparing its unknown level with the known level of the synthetic noise. This report demonstrates that elementary properties of synthetic noise can be derived from a simple theoretical model. These properties include: 1) the difference between natural noise and synthetic noise, 2) requirements for reliable operation, and 3) spectral aspects. The lightwave synthetic noise generator discussed here is basically an FM modulated laser, cascaded by an interferometer with unequal arms. Illumination of a p-i-n photodiode results in an (in)coherent mix of lightwave frequencies     

The effects of bulk traps on the performance of bulk channel charge-coupled devices

The effects of bulk traps on the transfer effciency and transfer noise in bulk channel charge-coupled devices (BCCD's) are calculated for different charge packet sizes and operating frequencies. These predictions are compared with experimental results and the distribution and density of bulk states in actual devices are thereby measured. The measured low transfer inefficiency of 10^-4per transfer with no intentionally introduced background charge and low transfer noise are shown to be due to a low bulk state density of 2 × 10¹¹/cm³. A detailed comparison of estimated noise in both surface and bulk channel versions of an image sensor and an analog delay line show that BCCD's are very attractive for low-light level imaging but not as attractive for analog signal processing.     

锁相环在相位噪声测试中的工作机理和影响

分析了相位检波技术测试相位噪声的工作原理和锁相环在电路中的工作机理,给出了锁相环对相位噪声测试影响的转移函数,通过对环路修正前和修正后的实际测试曲线的比较,很容易看出环路噪声压缩的影响。明确了在实际测试中,必须对锁相环带宽内的相位噪声曲线进行修正。通过分析可以看出,用相位检波器方法使相位噪声测试由测信号相位起伏变成测电压起伏,用锁相技术使压控参考源与被测源同频,并可有效地对锁相带宽内噪声抑制进行修正,改进了相位噪声测试的方法。     

Active Matching with Common-Gate MESFET's

The electrical performance of the common-gate MESFET input stage across multi-octave frequency bands has been analyzed. Based on the device's common-source parameters, formulas for the circuit's admittance and noise parameters have been derived that allow one to calculate its gain, reflection coefficients, and noise figure. The influence of the circuit elements on the input stage's performance, especially on the noise figure, are studied. Finally, the electrical behavior of a two-stage unit consisting of a common-gate input stage followed by a common-source amplifier stage is discussed.