Characteristics of a new BBOS with an AlGaAs-/spl delta/(n/sup +/)-GaAs-InAlGaP collector structure

Two-terminal switching performances are observed in a new AlGaAs-GaAs-InAlGaP npn bulk-barrier optoelectronic switch (BBOS) with an AlGaAs-/spl delta/(n/sup +/)-GaAs-InAlGaP collector structure. The device shows that the switching action takes place from a low-current state to a high-current state through a region of negative differential resistance (NDR). The transition from either state to the other may be induced by an appropriate optical or electrical input. It is seen that the effect of illumination increases the switching voltage V/sub s/, holding voltage V/sub H/, and holding current I/sub H/, and decreases the switching current I/sub S/, which is quite different from other results reported. In addition, it possesses obvious NDR even up to 160/spl deg/C. This high-temperature performance provides the studied device with potential high-temperature applications.     

Novel SiC/Si heterostructure negative-differential-resistance diodefor use as switch with high on/off current ratio and low powerdissipation

A novel p-SiC/n-Si heterostructure negative-differential-resistance (NDR) diode with special current-voltage (I-V) characteristics is reported. Under reverse biases, the I-V curve of this device possesses an N-shaped NDR with a high peak-to-valley current ratio (PVCR) and a broad high-impedance valley region. For use as a switch, it can easily achieve a very low off-state current and a high on/off current ratio, as compared to the conventional N-shaped NDR devices. Hence, performance with a more effective switching action and lower power dissipation can be expected. Furthermore, obvious NDR's can even be obtained at a temperature up to 300°C, indicating this device is also potential for high-temperature applications     

Gate-controlled negative differential resistance in drain currentcharacteristics of AlGaAs/InGaAs/GaAs pseudomorphic MODFETs

The observation of negative differential resistance (NDR) and negative transconductance at high drain and gate fields in depletion-mode AlGaAs/InGaAs/GaAs MODFETs with gate lengths L _g ~0.25 μm is discussed. It is shown that under high bias voltage conditions, V_ds>2.5 V and V_gs>0 V, the device drain current characteristic switches from a high current state to a low current state, resulting in reflection gain in the drain circuit of the MODFET. The decrease in the drain current of the device corresponds to a sudden increase in the gate current. It is shown that the device can be operated in two regions: (1) standard MODFET operation for V_gs<0 V resulting in f_max values of >120 GHz, and (2) a NDR region which yields operation as a reflection gain amplifier for V_gs >0 V and V_ds>2.5 V, resulting in 2 dB of reflection gain at 26.5 GHz. The NDR is attributed to the redistribution of charge and voltage in the channel caused by electrons crossing the heterobarrier under high-field conditions. The NDR gain regime, which is controllable by gate and drain voltages, is a new operating mode for MODFETs under high bias conditions     

Improvement of surface carrier mobility of HfO/sub 2/ MOSFETs by high-temperature forming gas annealing

The surface electron mobility of HfO/sub 2/ NMOSFETs with a polysilicon gate electrode was studied in terms of the effects of high-temperature forming gas (FG) annealing. The high-temperature FG annealing significantly improved the drive current or the surface electron mobility of the NMOSFETs. Improvements were also observed in the subthreshold swings and the C-V characteristics, indicating a reduction in interfacial state density (D/sub it/). The D/sub it/ reduction was quantitatively confirmed by charge pumping current measurements. The mobility enhancement was achieved without degrading the equivalent oxide thickness (EOT) or gate leakage current. Different surface preparations, such as NH/sub 3/ or NO annealing, were explored to examine their effects on the NMOSFET performance. Mobility enhancement due to high-temperature FG annealing was also observed on these samples. Whereas NH/sub 3/ surface nitridation was effective in scaling EOT, the NO-annealed sample exhibited the highest mobility. Similar improvements were also observed on HfO/sub 2/ PMOSFETs, in terms of subthreshold swings, drive current, and surface hole mobility.     

AlGaAs/GaAs double-heterostructure-emitter bipolar transistor(DHEBT)

An AlGaAs/GaAs double-heterostructure-emitter bipolar transistor (DHEBT) fabricated by molecular beam epitaxy (MBE) is presented. The use of a structure symmetrical with respect to the base layer results in bidirectional transistor and switching behavior. Due to a significant area difference between emitter-base and base-collector junction, an asymmetrical property is observed. With an emitter edge-thinning design, the transistor performance may be further improved. A common-emitter current gain of up to 140 with a negligible collector-emitter offset voltage (~40 mV) is achieved. A bidirectional S-shaped negative-differential-resistance (NDA) phenomenon occurs at high V _CE bias voltage. The temperature dependence of the NDR is investigated. A three-terminal-controlled switching device is found to perform well when the control current is introduced into the base electrode     

A new optoelectronic integrated device for light-amplifying opticalswitch (LAOS)

A new optoelectronic integrated device is proposed for a light-amplifying optical switch (LAOS). The device is composed of an optical field-effect transistor (OPFET) in series with a light source which may be either a double heterostructure light-emitting diode (LED) or laser diode (LD). A quantitative circuit model for the proposed LAOS is presented and theoretical investigation is carried out for developing a current-voltage (I-V) relation for the device. It is shown analytically that switching action takes place from a low current state to a high current state through a region of negative differential resistance (NDR) when a voltage greater than the breakover voltage is applied     

Multiple-route current-voltage (I-V) characteristics of GaAs-InGaAsmetal-insulator-semiconductor-like (MIS) structure for multiple-valuedlogic applications

A new GaAs-In_xGa_1-xAs metal-insulator-semiconductor-like (MIS) device with the interesting dual-route and multiple-negative-differential-resistance (MNDR) current-voltage (I-V) characteristics has been fabricated and demonstrated. These performances are caused by the successive barrier lowering and potential redistribution effect. A novel multiple-route I-V characteristic is obtained in the studied device at low temperature (-130°C). This performance is different from the previously reported NDR switching device and has not yet been found in other devices. The interesting property of the studied structure provides a promising candidate for switching device applications     

Resistance-switching Characteristics of polycrystalline Nb/sub 2/O/sub 5/ for nonvolatile memory application

The resistance switching characteristics of polycrystalline Nb/sub 2/O/sub 5/ film prepared by pulsed-laser deposition (PLD) were investigated for nonvolatile memory application. Reversible resistance-switching behavior from a high resistance state to a lower state was observed by voltage stress with current compliance. The reproducible resistance-switching cycles were observed and the resistance ratio was as high as 50-100 times. The resistance switching was observed under voltage pulse as short as 10 ns. The estimated retention lifetime at 85/spl deg/C was sufficiently longer than ten years. Considering its excellent electrical and reliability characteristics, Nb/sub 2/O/sub 5/ shows strong promise for future nonvolatile memory applications.     

The thermal stability of one-transistor ferroelectric memory with Pt-Pb/sub 5/Ge/sub 3/O/sub 11/-Ir-poly-SiO/sub 2/-Si gate stack

The thermal stability of one-transistor ferroelectric nonvolatile memory devices with a gate stack of Pt-Pb/sub 5/Ge/sub 3/O/sub 11/-Ir-Poly-SiO/sub 2/-Si was characterized in the temperature range of -10/spl deg/C to 150/spl deg/C. The memory windows decrease when the temperatures are higher than 60/spl deg/C. The drain currents (I/sub D/) after programming to on state decrease with increasing temperature. The drain currents (I/sub D/) after programming to off state increase with increasing temperature. The ratio of drain current (I/sub D/) at on state to that at off state drops from 7.5 orders of magnitude to 3.5 orders of magnitude when the temperature increases from room temperature to 150/spl deg/C. On the other hand, the memory window and the ratio of I/sub D/(on)/I/sub D/(off) of the one-transistor memory device displays practically no change when the temperature is reduced from room temperature to -10/spl deg/C. One-transistor (1T) memory devices also show excellent thermal imprint properties. Retention properties of 1T memory devices degrade with increasing temperature over 60/spl deg/C.     

Multiple-route and multiple-state current-voltage characteristicsof an InP/AlInGaAs switch for multiple-valued logic applications

A novel multiple-state switching device based on an InP/AlInGaAs heterojunction bipolar transistor (HBT) structure has been successfully fabricated and demonstrated. The common-emitter current gain up to 25 is obtained under the forward operation mode. However, the anomalous multiple-negative-differential-resistance (MNDR) phenomena controlled either by electrical or optical input signals are observed under the inverted operation mode. The studied device exhibits a single-route S-shaped NDR behavior in the dark and a distinct significant S-shaped MNDR phenomena by introducing an incident light source at room temperature. Moreover, the anomalous multiple-route and multiple-step current-voltage (I-V) characteristics are also observed at 77 K. The switching behaviors are attributed to the avalanche multiplication, barrier lowering effect and potential redistribution process. Experimental results show that the studied device provides a good potentiality for multiple-valued logic and optoelectronic switching system applications     

一种新型结构的InGaP/GaAs负阻异质结晶体管

利用硅双基区晶体管（DUBAT）产生负阻的原理,针对HBT器件结构和MBE材料结构的特点,设计并研制出一种基区刻断结构的负阻型HBT (NDRHBT) . 经过特性和参数测试,证明此种NDRHBT具有显著的微分负阻效应,并发现负电流区负阻效应和光照可改变其I-V特性,器件模拟结果和测试结果基本一致.     

Theory of switching phenomena in metal/semi-insulator/n-p silicon devices

The theory of switching is presented for a structure consisting of a p⁺-n junction and a metal electrode separated from the N-section of the p⁺-n junction by a semi-insulating (leaky) layer.

When a negative bias is applied to the electrode, the section of the n-layer under the electrode goes into deep depletion. In this mode, the current through the device is limited by generation in the deeply depleted region. This is the high-impedance or OFF state of the device.

At a sufficiently high voltage, the switching voltage, V_s, the p⁺-n junction is turned on by either avalanching in the n-layer or by the deep-depletion region extending through to the p⁺-n region (punch-through). When the junction turns on, the n-section goes from deep-depletion towards inversion. Thus, the voltage across the device decreaseswith a concomitant increase in the current through the device. This is the switching mode. The switching voltage may be tailored by varying the doping and/or width of the n-section.

Following switching, the device comes into the steady-state when the current through the insulating layer is equal to the current flowing across the p⁺-n junction. The I-V characteristic of this highly conducting (ON state) mode is determined principally by the I-V characteristic of the semi-insulating film. By suitable choice of material this portion of the characteristic can approach zero dynamic impedance, i.e. a near-vertical characteristic, characterized by a low holding voltage. Capacitance and switching characteristics of the device are also discussed.     

Effect of the surface and barrier defects on the AlGaN/GaN HEMT low-frequency noise performance

We report on the effect of Si/sub 3/N/sub 4/ passivation of the surface of AlGaN/GaN transistors on low-frequency noise performance. Low-frequency noise measurements were performed on the device before and after the passivation by a Si/sub 3/N/sub 4/ film. A lower level of the low-frequency noise was observed from the device after the passivation. The passivation layer improved high-frequency, large-signal device performance, but introduced parasitic leakage current from the gate. A lower level of flicker noise is explained by the fact that noise is mostly originated from the fluctuation of sheet charge and mobility in the ungated region of the device due to the defects on the surface and in the barrier of the unpassivated device. Passivation eliminates part of the defects and higher leakage current increases the number of electrons on the surface and in the vicinity of the barrier defects, lowering the contribution to the low-frequency noise according to Hooge's law.     

AlGaAs/GaAs超薄基区负阻HBT的研制与模拟

利用化学湿法选择技术和监控电极技术设计并研制了一种新型台面结构超薄基区AlGaAs/GaAs负阻异质结双极晶体管,该器件具有独特且显著的电压控制型负阻特性,其峰谷比可高于120.通过器件模拟分析,解释了该器件产生负阻的原因,即不断增加的集电极电压致使超薄基区穿通,器件由双极管工作状态向体势垒管工作状态转化造成的.另外,模拟结果表明器件可能具有较高频率特性(fT约为60～80GHz).     

Fabrication and Simulation of an AlGaAs/GaAs Ultra-Thin Base NDR HBT

A novel mesa ultra-thin base AlGaAs/GaAs HBT is designed and fabricated with wet chemical selective etch technique and monitor electrode technique.It has a particular and obvious voltage-controlled NDR whose PVCR is larger than 120.By use of device simulation,the cause of NDR is that increasing collector voltage makes the ultra-thin base reach through and the device transforms from a bipolar state to a bulk barrier state.In addition,the simulated cutoff frequency is about 60～80GHz.     

RF performance and modeling of Si/SiGe resonant interband tunneling diodes

The RF performance of two different Si-based resonant interband tunneling diodes (RITD) grown by low-temperature molecular beam epitaxy (LT-MBE) were studied. An RITD with an active region of B /spl delta/-doping plane/2 nm i-Si/sub 0.5/Ge/sub 0.5//1 nm i-Si/P /spl delta/-doping plane yielded a peak-to-valley current ratio (PVCR) of 1.14, resistive cutoff frequency (f/sub r0/) of 5.6 GHz, and a speed index of 23.3 mV/ps after rapid thermal annealing at 650/spl deg/C for 1 min. To the authors' knowledge, these are the highest reported values for any epitaxially grown Si-based tunnel diode. Another RITD design with an active region of 1 nm p+ Si/sub 0.6/Ge/sub 0.4//B /spl delta/-doping plane/4-nm iSi/sub 0.6/Ge/sub 0.4//2 nm i-Si/P /spl delta/-doping plane and annealed at 825/spl deg/C for 1 min had a PVCR of 2.9, an f/sub r0/ of 0.4 GHz, and a speed index of 0.2 mV/ps. A small signal model was established to fit the measured S/sub 11/ data for both device designs. Approaches to increase f/sub r0/ are suggested based on the comparison between these two diodes. The two devices exhibit substantially different junction capacitance/bias relationships, which may suggest the confined states in the /spl delta/-doped quantum well are preserved after annealing at lower temperatures but are reduced at higher temperature annealing. A comprehensive dc/RF semi-physical model was developed and implemented in Agilent advanced design system (ADS) software. Instabilities in the negative differential resistance (NDR) region during dc measurements were then simulated.     

An 8-GHz f/sub t/ carbon nanotube field-effect transistor for gigahertz range applications

In this letter, the authors report on the high-frequency (HF) performance of self-assembled carbon nanotube field-effect transistors. HF device structures including a large number of single-wall carbon nanotubes have been designed and optimized in order to establish a new state of the art. The device exhibits a current gain (|H/sub 21/|/sup 2/) cutoff frequency (f/sub t/) of 8 GHz and a maximum stable gain value of 10 dB at 1 GHz, after de-embedding the access pads. Considering such results, nanotube-based circuits with gigahertz performance are now conceivable.     

High-temperature thermal stability performance in /spl delta/-doped In/sub 0.425/Al/sub 0.575/As--In/sub 0.65/Ga/sub 0.35/As metamorphic HEMT

We report, to our knowledge, the best high-temperature characteristics and thermal stability of a novel /spl delta/-doped In/sub 0.425/Al/sub 0.575/As--In/sub 0.65/Ga/sub 0.35/As--GaAs metamorphic high-electron mobility transistor. High-temperature device characteristics, including extrinsic transconductance (g/sub m/), drain saturation current density (I/sub DSS/), on/off-state breakdown voltages (BV/sub on//BV/sub GD/), turn-on voltage (V/sub on/), and the gate-voltage swing have been extensively investigated for the gate dimensions of 0.65/spl times/200 /spl mu/m/sup 2/. The cutoff frequency (f/sub T/) and maximum oscillation frequency (f/sub max/), at 300 K, are 55.4 and 77.5 GHz at V/sub DS/=2 V, respectively. Moreover, the distinguished positive thermal threshold coefficient (/spl part/V/sub th///spl part/T) is superiorly as low as to 0.45 mV/K.     

Analysis and simulation of a mid-infrared P/sup +/-InAs/sub 0.55/Sb/sub 0.15/P/sub 0.30//n/sup 0/-InAs/sub 0.89/Sb/sub 0.11//N/sup +/-InAs/sub 0.55/Sb/sub 0.15/P/sub 0.30/ double heterojunction photodetector grown by LPE

A photovoltaic detector based on an N/sup +/-InAs/sub 0.55/Sb/sub 0.15/P/sub 0.30//n/sup 0/-InAs/sub 0.89/Sb/sub 0./$ d1/sub 1//P/sup +/-InAs/sub 0.55/Sb/sub 0.15/P/sub 0.30/ double heterostructure (DH) suitable for operation in the mid-infrared (MIR) spectral region (2 to 5 /spl mu/m) at room temperature has been studied. A physics based closed form model of the device has been developed to investigate the relative importance of the different mechanisms which determine dark current and photoresponse. The results obtained on the basis of the model have been compared and contrasted with those obtained from experimental measurements on DH detectors fabricated previously in our laboratory using liquid phase epitaxy (LPE). The model helps to explain the various physical mechanisms that shape the characteristics of the device under room temperature operation. It can also be used to optimize the performance of the photodetector in respect of dark current, responsivity and detectivity. A comparison of theoretical predictions and experimental results revealed that Shockley-Read-Hall (SRH) recombination is more important than Auger recombination in determining the room temperature detector performance when the concentration of nonradiative recombination centers in our material exceeds 10/sup 17/ cm/sup -3/. Furthermore, compositional grading in the cladding regions of the double heterostructure has been found to be responsible for the reduction of the detectivity of the device in the shorter wavelength region.     

Negative Differential Resistance Circuit Design and Memory Applications

Based on a circuit point of view, a high-performance negative differential resistance (NDR) element is designed and a possible compact device implementation is presented. The NDR structure exhibits ultrahigh peak-to-valley current ratio and also high switching speed. The corresponding process and design are completely compatible with contemporary Si CMOS technology, as they rely on coupled transistor structures. A single-NDR element static-random-access-memory cell prototype with a compact size and high speed is proposed as an interesting application suitable for embedded memory.