A Novel Calibration Method for Phase-Locked Loops

A novel method to calibrate the frequency response of a Phase-Locked Loop is presented. The method requires just an additional digital counter to measure the natural frequency of the PLL; moreover it is capable of estimating the static phase offset. The measured value can be used to tune the PLL response to the desired value. The method is demonstrated mathematically on a typical PLL topology and it is extended to fractional-N PLLs. A set of simulations performed with two different simulators is used to verify the applicability of the method.This work was carried out as a part of an internship at the QCT department of Qualcomm CDMA Technologies.Marco Cassia was born in Bergamo, Italy, 1974. He received the M.Sc. degree in engineering from the Technical University of Denmark, Lyngby, Denmark, in May 2000 and the M.Sc. degree in electrical engineering from Politecnico di Milano, Italy, in July 2000.From July 2001 to July 2002 he was with the QCT department of Qualcomm CDMA Technologies, San Diego, working in the field of direct modulation synthesizers. He is currently working toward the Ph.D.degree at the Technical University of Denmark.His main research interests are in the areas of low-power low-voltage RF systems.Peter Shah was born in Copenhagen Denmark in 1966. He completed his MScEE and Ph.D at The Technical University of Denmark in 1990 and 1993 respectively. From 1993 to 1995 he was a post doctoral research assistant at Imperial College in London, England, working on switched-current circuits. In 1996 he joined PCSI in San Diego (subsequently acquired by Conexant) as an RFIC design engineer, working on transceiver chips for the PHS cellular phone system. In 1998 he joined Qualcomm, also in San Diego, where he worked on RFICs for CDMA mobile phones and for GPS. In December 2002 he joined RFMagic where he is currently working on RFICs for consumer electronics. His research interests lie mainly in RFIC architecture and design, including sigma-delta PLLs and A/D and D/A converters, LNAs, mixers, and continuous-time filters.Erik Bruun received the M.Sc. and Ph.D. degrees in electrical engineering in 1974 and 1980, respectively, from the Technical University of Denmark. In 1980 he received the B.Com. degree from Copenhagen Business School. In 2000 he also received the dr. techn. degree from the Technical University of Denmark.From January 1974 to September 1974 he was with Christian Rovsing A/S, working on the development of space electronics and test equipment for space electronics. From 1974 to 1980 he was with the Laboratory for Semiconductor Technology at the Technical University of Denmark, working in the fields of MNOS memory devices, I²L devices, bipolar analog circuits, and custom integrated circuits. From 1980 to 1984 he was with Christian Rovsing A/S. From 1984 to 1989 he was the managing director of Danmos Microsystems ApS. Since 1989 he has been a Professor of analog electronics at the Technical University of Denmark where he has served as head of the Sector of Information Technology, Electronics, and Mathematics from 1995 to 2001. Since 2001 he has been head of ØrstedDTU.His current research interests are in the areas of RF integrated circuit design and integrated circuits for mobile phones.     

Reduced Impact of Induced Gate Noise on Inductively Degenerated LNAs in Deep Submicron CMOS Technologies

Designers of radio-frequency inductively-degenerated CMOS low-noise-amplifiers have usually not followed the guidelines for achieving minimum noise figure. Nonetheless, state-of-the-art implementations display noise figure values very close to the theoretical minimum. In this paper, we point out that this is due to the effect of the parasitic overlap capacitances in the MOS device. In particular, we show that overlap capacitances lead to a significant induced-gate-noise reduction, especially when deep sub-micron CMOS processes are used.Paolo Rossi was born in Milan, Italy, in 1975. He received the Laurea degree (summa cum laude) in electrical engineering from the University of Pavia, Pavia, Italy, in 2000, where he is currently working toward the Ph.D. degree. His research interests are in the field of analog integrated circuits for wireless transceivers in CMOS and BiCMOS technology, with particular focus on the analysis and design of LNA and mixer for multi-standard applications.Francesco Svelto received the Laurea and Ph.D. degrees in electrical engineering from the University of Pavia, Pavia, Italy, in 1991 and 1995, respectively. From 1996 to 1997, he held a grant from STMicroelectronics to design CMOS RF circuits. In 1997, he was appointed Assistant Professor at the University of Bergamo, Italy, and in 2000, he joined the University of Pavia, where he is an Associate Professor. His current research interests are in the field of RF design and high-frequency integrated circuits for telecommunications. Dr. Svelto has been a member of the technical program committee of the IEEE Custom Integrated Circuits Conference since 2000 and the Bipolar/BiCMOS Circuits and Technology Meeting (BCTM) since 2003, and the European Solid State Circuits Conference in 2002. He served as Guest Editor of the March 2003 special issue of the IEEE Journal of Solid-State Circuits, of which he is currently an Associate Editor.Andrea Mazzanti was born in Modena (Italy) in 1976. He received the Laurea degree (summa cum Laude) in Electrical Engineering from the University of Modena and Reggio Emilia, Modena, Italy in 2001. Since 2001 he is pursuing his PhD in Electrical Engineering at University of Modena and Reggio Emilia, Italy. His major research interest are modelling of microwave semiconductor devices and design of CMOS RF integrated circuits, with particular focus on low noise oscillators and analog frequency dividers. During the summer of 2003 he was with Agere Systems, Allentown, PA as an internship student, working on the design of an highly integrated CMOS FM transmitter.Pietro Andreani received the M.S.E.E. from the University of Pisa, Italy, in 1988. He joined the Dept. of Applied Electronics, Lund University, Sweden, in 1990, where he contributed to the development of software tools for digital ASIC design. After working at the Dept. of Applied Electronics, University of Pisa, as a CMOS IC designer during 1994, he rejoined the Dept. of Applied Electronics in Lund as an Associate Professor, where he was responsible for the analog IC course package between 1995 and 2001, and where he received the Ph.D. degree in 1999. He is currently a Professor at the Center for Physical Electronics, ØrstedDTU, Technical University of Denmark, Kgs. Lyngby, Denmark, with analog/RF CMOS IC design as main research field.     

A CMOS Low-Noise Instrumentation Amplifier Using Chopper Modulation

This paper describes a low-power, low-noise chopper stabilized CMOS instrumentation amplifier for biomedical applications. Low thermal noise is achieved by employing MOSTs biased in the weak/moderate inversion region, whereas chopper stabilization is utilized to shift 1/f-noise out of the signal band hereby ensuring overall low noise performance. The resulting equivalent input referred noise is approximately 7 nV/ for a chopping frequency of 20 kHz. The amplifier operates from a modest supply voltage of 1.8 V, drawing 136 A of current thus consuming 245 W of power. The gain is 72.5 dB over a 4 kHz bandwidth. The inband PSRR is above 90 and the CMRR exceeds 105 dB.Jannik Hammel Nielsen was born in Nuuk, Greenland, in 1972. He received the M.Sc. and Ph.D. degrees in electrical engineering in 1999 and 2004 respectively, from the Technical University of Denmark. He is presently employed as a postdoctoral researcher at ØrstedDTU.His main research interests are in low-voltage, low-power analog systems, medical electronics and data converters.Erik Bruun received the M.Sc. and Ph.D. degrees in electrical engineering in 1974 and 1980, respectively, from the Technical University of Denmark. In 1980 he received the B.Com. degree from the Copenhagen Business School. In 2000 he also received the dr. techn. degree from the Technical University of Denmark.From January 1974 to September 1974 he was with Christian Rovsing A/S, working on the development of space electronics and test equipment for space electronics. From 1974 to 1980 he was with the Laboratory for Semiconductor Technology at the Technical University of Denmark, working in the fields of MNOS memory devices, I²L devices, bipolar analog circuits, and custom integrated circuits. From 1980 to 1984 he was with Christian Rovsing A/S. From 1984 to 1989 he was the managing director of Danmos Microsystems ApS. Since 1989 he has been a Professor of analog electronics at the Technical University of Denmark where he has served as head of the Sector of Information Technology, Electronics, and Mathematics from 1995 to 2001. Since 2001 he has been head of ØrstedDTU.His current research interests are in the areas of RF integrated circuit design and integrated circuits for mobile phones.     

A Broadband Quadrature-Modulator with Integrated Baluns

A broadband direct-conversion quadrature-modulator has been implemented in 0.8 m SiGe with integrated baluns in its RF-signal paths. Measured performance includes IRR-values at better than –40 dBc in 0.75–3.6 GHz with output power levels in excess of –20 dBm. For this performance circuit draws 46 mA from a single 2.5 V supply.Esa Tiiliharju was born in Rovaniemi, Finland, in 1966. He received the M.Sc. degree in Information Technology in 1995, and the Lic.Tech degree in electrical engineering in 1998, both from Helsinki University of Technology, Finland.From 1996 to July 1997 he was employed as assistant at Helsinki University of Technology. He has been holding a position of a research assistant from 1997, and he is currently working towards the Ph.D. degree in the Electronic Circuit Design Laboratory at Helsinki University of Technology.His research interests include the design of integrated low-power circuits for portable telecommunication applications. He has designed and measured several integrated circuits for this application area. He is author or co-author for several international refereed conference and journal publications on analog integrated circuits.Kari A.I. Halonen was born in Helsinki, Finland, on May 23, 1958. He received the M.Sc. degree in electrical engineering from the Helsinki University of Technology (HUT) in 1982 and the Ph.D. degree in electrical engineering from the Katholieke Universiteit Leuven, Heverlee, Belgium, in 1987.From 1982 to 1984, he was with HUT as an Assistant and with the Technical Research Center of Finland as a Research Assistant. From 1984 to 1987, he was a Research Assistant with the E.S.A.T. Laboratory, Katholieke Universiteit Leuven, with a temporary grant from the Academy of Finland. Since 1988, he has been with the Electronic Circuit Design Laboratory, HUT, as a Senior Assistant from 1988 to 1990, and as the Director of the Integrated Circuit Design Unit of the Microelectronics Center from 1990 to 1993. He was on leave of absence during the academic year 1992–1993, acting as Research and Development Manager with Fincitec Inc., Finland. From 1993 to 1996, he was an Associate Professor, and since 1997, he has been a full Professor with the Faculty of Electrical Engineering and Telecommunications, HUT. He became the Head of Electronic Circuit Design Laboratory year 1998. He was the Technical Program Committee Chairman for the European Solid-State Circuits Conference in 2000. He is the author or coauthor of over 150 international and national conference and journal publications on analog integrated circuits, and holds several patents on analog integrated circuits. His research interests are in CMOS and BiCMOS analog integrated circuits, particularly for telecommunication applications.Dr. Halonen was an Associate Editor of the IEEE Transactions on Circuits and Systems–Part I: Fundamental Theory and Applications from 1997 to 1999. He has been a Guest Editor for the IEEE Journal of Solid-State Circuits. He received the BeatriceWinner Award from the IEEE International Solid-State Circuits Conference in 2002.     

An RF CMOS Q-Enhanced LC Resonator

This paper investigates a Q-enhanced LC resonator implemented with a Q-enhancement circuit based on both active and reactive components. An analytical expression is presented for the Q-enhancement circuit and simulations are compared with measurements on a differential Q-enhanced LC tank operating at 1779–1870 MHz. Sensitive circuits and inaccurate models leads to inaccurate simulations. To improve the accuracy of simulations, S-parameter measurements of components and sub-circuits are included in the simulations whereby an accuracy of 3 MHz in the estimate of the resonator center frequency results. Per Madsenreceived his M.Sc.E.E degree in 1997 from Aalborg University, Denmark. In 2005 he received his Industrial PhD degree, also from Aalborg University. He is currently working with development of reference designs for GSM and UMTS at Texas Instruments Denmark A/S. Jan Hvolgaard Mikkelsenreceived his M.Sc.E.E. degree in 1995 from Aalborg University, Denmark. In 2005 he received his PhD degree, also from Aalborg University. He is currently employed as an Assistant Professor at Aalborg University where he is working as an IC design manager for the large scale RF IC design efforts at Aalborg University. His research interests include both RF and LF CMOS design as well as transceiver architectures. Jens Christian Lindofreceived his M.Sc.E.E. degree in electrical engineering in 1991 from Aalborg University, Denmark, in 1991. He is currently R&D Director at Texas Instruments Denmark A/S, where he is responsible for all HW and SW developed for Texas Instrument's cellular reference designs for GSM, GPRS, EDGE and UMTS. Torben Larsenreceived his M.Sc.E.E. degree in electrical engineering from Aalborg University, Denmark, in 1988, and the Dr. Techn. degree from Aalborg University in 1998. He has been employed as full Professor at Aalborg University since 2001. Dr. Larsen serves as reviewer for IEE, IEEE and Wiley. Areas of specialized research interests include noise theory, nonlinear analysis techniques, RF techniques, RF CMOS technology, and digital modulation techniques.     

Up-conversion mixers in a complementary 0.4 μm SiGe process

In this paper a 0.4 μm complementary SiGe process is used to fabricate up-conversion mixers for base-station applications. A current feedback mixer, and a mixer with a folded input, were designed in order to test benefits obtainable from the use of equally fast PNP- and NPN-transistors. The target was to improve linearity and to increase output compression point ( ) of the mixers. A +5 dBm output compression point @2 GHz was measured while drawing 43 mA from 5 V voltage supply. Harri Pellikka was born in Espoo, Finland, in 1980. He received the M.Sc. degree in electronics and electrical engineering from Helsinki University of Technology in 2005. He has been with Helsinki University of Technology Electronic Circuit Design Laboratory since 2003, where he works as research engineer. His research interests include the design of integrated circuits for telecommunication applications. Esa Tiiliharju was born in Rovaniemi, Finland, in 1966. He received the M.Sc. degree in information technology in 1995, and the Lic.Tech degree in electrical engineering in 1998, both from Helsinki University of Technology, Finland. He has joined the Microelectronics Laboratory in University of Turku in 2006. His research interests include the design of integrated circuits for telecommunication applications. Kari A. I. Halonen was born in Helsinki, Finland, on May 23, 1958. He received the M.Sc. degree in electrical engineering from Helsinki University of Technology, Finland, in 1982, and the Ph.D. degree in electrical engineering from the Katholieke Universiteit Leuven, in Heverlee, Belgium, in 1987. Since 1988 he has been with the Electronic Circuit Design Laboratory, Helsinki University of Technology. From 1993 he has been an associate professor, and since 1997 a full professor at the Faculty of Electrical Engineering and Telecommunications. He became the Head of Electronic Circuit Design Laboratory year 1998. From 1997 to 1999 he was an associate editor of IEEE Transactions on Circuits and Systems I. He has been a guest editor for IEEE Journal of Solid-State Circuits and the Technical Program Committee Chairman for European Solid-State Circuits Conference year 2000. He has been awarded the Beatrice Winner Award in ISSCC’02 Conference year 2002. He specializes in CMOS and BiCMOS analog integrated circuits, particularly for telecommunication applications. He is author or co-author over a hundred and fifty international and national conference and journal publications on analog integrated circuits. He has several patents on analog integrated circuits.     

An On-Chip Spectrum Analyzer for Analog Built-In Testing

This paper presents an analog built-in testing (BIT) architecture and its implementation. It enables the frequency response and harmonic distortion characterizations of an integrated device-under-test (DUT) through a digital off-chip interface. External analog instrumentation is avoided, reducing test time and cost. The proposed on-chip testing scheme uses a digital frequency synthesizer and a simple signal generator synchronized with a switched capacitor bandpass filter. A general methodology for the use of this structure in the functional verification of a DUT is also provided. The circuit-level design and experimental results of an integrated prototype in standard CMOS 0.5 m technology are presented to demonstrate the feasibility of the proposed BIT technique.Marcia G. Mendez-Rivera was born in Irapuato, Mexico in 1972. She received the Communications and Electronics Engineering Degree from the Universidad de Guanajuato, Guanajuato, Mexico. in 1996, the M.Sc. degree from the Instituto Nacional de Astrofisica, Optica y Electronica (INAOE), Puebla, Mexico in 1998 and the M.Sc. from Texas A&M University, College Station in 2002. Her research interest is in the design and fabrication of analog and mixed-signal circuits.Alberto Valdes-Garcia born in 1978, grew up in San Mateo Atenco, Mexico. He received the B.S. in Electronic Systems Engineering degree from the Monterrey Institute of Technology (ITESM), Campus Toluca, Mexico in 1999 (with honors as the best score from all majors). Since the fall of 2000 he has been working towards the Ph.D. degree at Analog and Mixed-Signal Center (AMSC), Texas A&M University. During the spring and summer of 2000 he was a Design Engineer with Motorola Broadband Communications Sector. In the summer of 2002 he was with the Read Channel Design Group at Agere Systems where he investigated wide tuning range GHz LC VCOs for mass storage applications. During the summer of 2004 he was with the Mixed-Signal Communications IC Design Group at the IBM T. J. Watson Research Center, where worked on design and analysis of SiGe power amplifiers for millimeter wave radios. Since the fall of 2001 he has been a Semiconductor Research Corporation (SRC) research assistant at the AMSC working on the development of analog built-in testing techniques. Since the fall of 2000, Alberto has been the recipient of a scholarship from the Mexican National Council for Science and Technology (CONACYT). He represented Mexico in the 1994 Odyssey of the Mind World Creativity Contest and in the 1997 International Exposition for Young Scientists. His present research interests include built-in testing implementations for analog and RF circuits, system level design for wireless receivers and RF circuit design for UltraWideBand (UWB) communications.Jose Silva-Martinez was born in Tecamachalco, Puebla, México. He received the B.S. degree in electronics from the Universidad Autónoma de Puebla, México, in 1979, the M.Sc. degree from the Instituto Nacional de Astrofísica Optica y Electrónica (INAOE), Puebla, México, in 1981, and the Ph.D. degree from the Katholieke Univesiteit Leuven, Leuven Belgium in 1992. From 1981 to 1983, he was with the Electrical Engineering Department, INAOE, where he was involved with switched-capacitor circuit design. In 1983, he joined the Department of Electrical Engineering, Universidad Autonoma de Puebla, where he remained until 1993; He was a co-founder of the graduate program on Opto-Electronics in 1992. From 1985 to 1986, he was a Visiting Scholar in the Electrical Engineering Department, Texas A&M University. In 1993, he re-joined the Electronics Department, INAOE, and from May 1995 to December 1998, was the Head of the Electronics Department; He was a co-founder of the Ph.D. program on Electronics in 1993. He is currently with the Department of Electrical Engineering (Analog and Mixed Signal Center) Texas A&M University, at College Station, where He holds the position of Associate Professor. His current field of research is in the design and fabrication of integrated circuits for communication and biomedical application. Dr. Silva-Martinez has served as IEEE CASS Vice President Region-9 (1997–1998), and as Associate Editor for IEEE Transactions on Circuits and Systems part-II from 1997–1998 and May 2002–December 2003. Since January 2004 is serving as Associate Editor of IEEE TCAS Part-I. He was the main organizer of the 1998 and 1999 International IEEE-CAS Tour in region 9, and Chairman of the International Workshop on Mixed-Mode IC Design and Applications (1997–1999). He is the inaugural holder of the TI Professorship-I in Analog Engineering, Texas A&M University. He was a co-recipient of the 1990 European Solid-State Circuits Conference Best Paper Award.Edgar Sánchez-Sinencio was born in Mexico City, Mexico. He received the degree in communications and electronic engineering (Professional degree) from the National Polytechnic Institute of Mexico, Mexico City, the M.S.E.E. degree from Stanford University, CA, and the Ph.D. degree from the University of Illinois at Urbana-Champaign, in 1966, 1970, and 1973, respectively. In 1974 he held an industrial Post-Doctoral position with the Central Research Laboratories, Nippon Electric Company, Ltd., Kawasaki, Japan. From 1976 to 1983 he was the Head of the Department of Electronics at the Instituto Nacional de Astrofísica, Optica y Electrónica (INAOE), Puebla, Mexico. He was a Visiting Professor in the Department of Electrical Engineering at Texas A&M University, College Station, during the academic years of 1979–1980 and 1983-1984. He is currently the TI J Kilby Chair Professor and Director of the Analog and Mixed-Signal Center at Texas A&M University. He was the General Chairman of the 1983 26th Midwest Symposium on Circuits and Systems. He was an Associate Editor for IEEE Trans. on Circuits and Systems, (1985–1987), and an Associate Editor for the IEEE Trans. on Neural Networks. He is the former Editor-in-Chief of the Transactions on Circuits and Systems II. He is co-author of the book Switched Capacitor Circuits (Van Nostrand-Reinhold 1984), and co-editor of the book Low Voltage/Low-Power Integrated Circuits and Systems (IEEE Press 1999). In November 1995 he was awarded an Honoris Causa Doctorate by the National Institute for Astrophysics, Optics and Electronics, Mexico. The first honorary degree awarded for Microelectronic Circuit Design contributions. He is co-recipient of the 1995 Guillemin-Cauer for his work on Cellular Networks. He is a former IEEE CAS Vice President-Publications. He was also the co-recipient of the 1997 Darlington Award for his work on high-frequency filters He received the Circuits and Systems Society Golden Jubilee Medal in 1999. He was the IEEE Circuits and Systems Society, Representative to the Solid-State Circuits Society (2000–2002). He is presently a member of the IEEE Solid-State Circuits Fellow Award Committee. His present interests are in the area of RF-Communication circuits and analog and mixed-mode circuit design. He is an IEEE Fellow Member since 1992.     

An Integrated Power Recovery Module Dedicated to Implantable Electronic Devices

This paper concerns the design and implementation of an inductively coupled RF telemetry for both power and data transferring to implantable microelectronic devices. The major shortcomings of available inductive powering designs are their low power-transfer efficiency and large size of the implantable unit. Therefore, there is a need to fully integrate interfacing module of the implantable unit. The presented power recovery module is dedicated to the biotelemetry application of cortical/nerve stimulation. The proposed strategy allows providing dual regulated output voltages 3.3 V/1.8 V to the electrodes driver and other implantable circuitry, respectively. Its low dropout voltage makes high power efficiency attainable. Fabricated integrated prototype in a CMOS 0.18 m technology has demonstrated its feasibility, providing a load current driving ability of 5 mA for each one of the two supply voltages.Yamu Hu received the B.S. degree in electrical engineering from Huazhong University of Science & Technology (HUST), Wuhan, P. R. China, in 1993, and the M.S. degree in electronics engineering from Ecole Polytechnique of Montreal, Canada, in 2000. He is currently working toward the Ph.D degree in electronics engineering at the same university. His research interest includes low-noise, low-power Analog/Mixed-Signal ICs for biomedical applications, RF front-end for wireless communications.Mohamad Sawan received the B.Sc. degree in electrical engineering from Université Laval, Canada in 1984, the M.Sc. and Ph.D. degrees, both in electrical engineering, from Université de Sherbrooke, Canada, in 1986 and 1990 respectively, and postdoctorate training from McGill University, Canada in 1991. He joined Ecole Polytechnique de Montréal in 1991 where he is currently a Professor in Microelectronics.His scientific interests are the design and test of mixed-signal (analog, digital and RF) circuits and systems, the digital and analog signal processing, the modeling, design, integration, assembly and validation of advanced wirelessly powered and controlled monitoring and measurement techniques. These topics are oriented toward the biomedical implantable devices and telecommunications applications. Dr. Sawan is a holder of a Canadian Research Chair in Smart Medical Devices. He is leading the ReSMiQ (Microelectronics Strategic Alliance of Quebec) research center. He is founder of the Eastern Canadian IEEE-Solid State Circuits Society Chapter and the IEEE-Northeastern workshop on Circuits and Systems (NewCAS). Also, he is cofounder of the International Functional Electrical Stimulation Society, and founder of PolySTIM neurotechnology laboratory at the Ecole Polytechnique de Montreal.He published more than 250 papers in peer reviewed journals and conference proceedings and was awarded 6 patents. He is editor of the Springer Mixed-signal Letters, Distinguished Lecturer for the IEEE CAS Society. He received the Barbara Turnbull 2003 award for spinal cord research. He is Fellow of the Canadian Academy of Engineering, and Fellow of the IEEE.Mourad El-Gamal received the B.Sc. degree with Honours from Ain-Shams University, Cairo, Egypt, in 1987, the M.Sc. degree from Vanderbilt University, Nashville, TN, in 1993, and the Ph.D. degree from McGill University, Montré al, Canada, in 1998, all in electrical engineering.He is currently an Associate Professor and William Dawson Scholar at McGill University. His research interests include integrated circuits and MEMS for communications applications, on which he has published many papers, and most recently contributed to a chapter on low voltage 5-GHz RFIC front-ends, published by the IEE in 2003. He has received several teaching awards and recognitions, and holds one patent. He was on leave of absence from McGill in 2002 to assume the role of Director of Engineering, then Vice President, of the Wireless Business Unit of MEMSCAP, headquartered in France—a 165 employee, publicly trading company specializing in MEMS. He oversaw all the business and technical aspects in different sites around the world related to RF-MEMS devices, RFICs, and millimeter-wave passive circuits. Earlier, he worked for the French telecommunications company ALCATEL and was a Member of the Technical Staff at IBM. He regularly serves as a consultant for leading microelectronics companies in North America and in Europe.Dr. El-Gamal is a member of the Analog Signal Processing Technical Committee of the IEEE Circuits and Systems (CAS) Society, and is a member of the Technical Committee of the Bipolar/BiCMOS Circuits and Technology Meeting (BCTM). He was a Guest Editor for the October 2004 issue of the Journal of Solid-State Circuits. He is the co-recipient of several research awards, the most recent being the 2003 Myril B. Reed Best Paper Award of the IEEE International Midwest Symposium on Circuits and Systems for work on frequency synthesizer covering the lower and upper bands of 5 GHz WLANs.     

A low-power, second-order Δ/Σ modulator using a single class-AB op-amp for voice-band applications

The design of a power-efficient second-order Δ/Σ modulator for voice-band is presented. At system level, a new single-loop, single-stage modulator is proposed. The modulator employs only one class-AB op-amp to realize a second-order noise shaping for voice-band applications. The modulator is designed in a 0.25μm standard CMOS process, and exhibits 86 dB dynamic range (DR) for a 4 kHz voice-bandwidth. The proposed modulator consumes 125μW from a 2.5 V supply. Aminghasem Safarian received the B.S. and M.S. degrees in electrical engineering from the Sharif University of Technology, in 2000, 2002, respectively. Since 2003 he is a research assistant at University of California, Irvine, working toward his Ph.D. degree in electrical engineering emphasizing on RF IC design for wireless communication systems. During the summer of 2005, he was with Broadcom Corporation, Irvine, CA, where he developed integrated receivers for RFID and WCDMA applications. Farzad Sahandiesfanjani was born in Tabriz, Iran in 1976. He received the B.S. and M.S. degrees in electronics from Sharif University of Technology, Tehran, Iran, in 1998 and 2000, respectively. The subject of his thesis was the design of 4th order cascade delta-sigma modulator for ADSL Analog Front End. From 1998 to 2003, he was with Emad Semicon Co., Tehran, Iran, where he designed circuits for voice application such as CODEC and SLIC chip. He also designed a 3rd order single loop class-D delta-sigma modulator for audio application. He joined Tripath Technology Inc., San Jose, CA, in 2003 and has been working on the design of analog and mixed-signal circuits for class-T audio power amplifier. He is also author of one patent for inductor-less switching audio power amplifier and also co-author of 3 more pending patents and 4 papers. Payam Heydari (S'98–M'00) received the B.S. and M.S. degrees (with honors) in electrical engineering from the Sharif University of Technology, in 1992, 1995, respectively. He received the Ph.D. degree in electrical engineering from the University of Southern California, in 2001. During the summer of 1997, he was with Bell-Labs, Lucent Technologies, Murray Hill, NJ, where he worked on noise analysis in deep submicron very large-scale integrated (VLSI) circuits. During the summer of 1998, he was with IBM T. J. Watson Research Center, Yorktown Heights, NY, where he worked on gradient-based optimization and sensitivity analysis of custom-integrated circuits. Since August 2001, he has been an Assistant Professor of Electrical Engineering at the University of California, Irvine, where his research interest is the design of high-speed analog, radio-frequency (RF), and mixed-signal integrated circuits. Dr. Heydari has received the 2005 National Science Foundation (NSF) CAREER Award, the 2005 IEEE Circuits and Systems Society Darlington Award, the 2005 Henry Samueli School of Engineering Teaching Excellence Award, the Best Paper Award at the 2000 IEEE International Conference on Computer Design (ICCD), the 2000 Honorable Award from the Department of EE-Systems at the University of Southern California, and the 2001 Technical Excellence Award in the area of Electrical Engineering from the Association of Professors and Scholars of Iranian Heritage (APSIH). He was recognized as the 2004 Outstanding Faculty at the EECS Department of the University of California, Irvine. His name was included in the 2006 Who's Who in America. Dr. Heydari is an Associate Editor of the IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—part I. He currently serves on the Technical Program Committees of Custom Integrated Circuits Conference (CICC), International Symposium on Low-Power Electronics and Design (ISLPED), International Symposium on Quality Electronic Design (ISQED), and the Local Arrangement Chair of the ISLPED conference. He was the Student Design Contest Judge for the DAC/ISSCC Design Contest Award in 2003, the Technical Program Committee member of the IEEE Design and Test in Europe (DATE) from 2003 to 2004, and International Symposium on Physical Design (ISPD) in 2003. Mojtaba Atarodi received his Ph.D degree from USC (the University of Southern California, Los Angeles), in electrical engineering Electro-physics in 1993, his M.S from University of California at Irvine, and his B.SEE from the Tehran Polytechnic University with first Grade honor. Following his Ph.D completion, he was with Linear Technology Corporation from 1993 to 1996 as an analog design engineer. He has been with Sharif University of Technology as an Assistant and Visiting Professor since 1997. The Author of more than 50 technical journal and conference papers an a book on Analog CMOS IC Design, Dr Atarodi’s main research interests are analog and RF IC system, circuit, and signal processing design as well as analog synthesis tools. Having held several management and consulting positions during the last 15 years in the US industry, he holds one US patent in analog highly linear tunable Operational Transconductance Amplifiers and has applied for 5 more US patents as well.     

A Broadband Double-Conversion RF Tuner

A prototype design of upconverter and downconverter units for a double-conversion cable-modem RF tuner are presented. The upconverter upconverts a channel from 47–862 MHz input band to around 1575 MHz intermediate frequency. The image-reject downconverter shifts the channel to 36.125 MHz (EU) or to 43.75 MHz (US). The upconverter includes a variable-gain low-noise amplifier, a double-balanced mixer, a three-stage VCO bank for LO generation and a divide-by-two circuit for driving an external PLL. The downconverter includes a LNA, image-reject mixers in Hartley configuration, a 3-stage polyphase filter, an IF-amplifier and a SAW driver. For the second LO generation the circuit includes a 6-GHz on-chip VCO, a divide-by-four circuit for quadrature LO and a divide-by-16 for feeding an external PLL. Signal reversal switching in the LO buffer can be used for the selection of LSB/USB injection. All building blocks are presented in this paper and experimental results are given from the upconverter, downconverter, and RF tuner demonstrator including SAW filters with center frequencies at 1575 and 44 MHz. The circuits are fabricated in a 0.9- m SiGe bipolar process.Kari Stadius received the M.Sc. degree in electrical engineering in 1994 and the Licentiate of Technology degree in 1997, both from Helsinki University of Technology, where he is currently working as a research scientist. His research interests include the design and analysis of RF transceiver blocks with special emphasis on RF oscillators and modelling of passive components.Arto Malinen was born in Savonlinna, Finland, in 1978. He received the M.Sc. degree in electrical engineering from the Helsinki University of Technology (HUT), Finland, in 2003, where he is currently working towards the Ph.D. degree. He is a research engineer with the Electronic Circuit Design Laboratory, HUT. His main research interests are in RF IC design, including low-noise amplifiers and mixers.Petri S. Järviö was born in Kitee on December 10, 1975. He received the M.Sc (EE) degree in 2001 from the Helsinki University of Technology. From 1999 to 2001 he worked as a research assistant at the Electronic Circuit Design Laboratory in Helsinki University of Technology. Nowadays he works at Finnish Defence Forces Technical Research Centre, Electronics and Information Technology Division where his research area is Radio frequency sensors.Kari A.I. Halonen was born in Helsinki, Finland, in 1958. He received the M.Sc. degree in electrical engineering from Helsinki University of Technology, Finland, in 1982, and the Ph.D. degree in electrical engineering from the Katholieke Universiteit Leuven, in Heverlee, Belgium, in 1987. From 1982 to 1984 he was employed as assistant at Helsinki University of Technology and as research assistant at the Technical Research Centre of Finland. From 1984 to 1987 he was research assistant at the E.S.A.T. Laboratory of the Katholieke Universiteit Leuven, enjoying also a temporary grant of the Academy of Finland. Since 1988 he has been with the Electronic Circuit Design Laboratory, Helsinki University of Technology, as senior assistant (1988–1990), and the director of the Integrated Circuit Design Unit of the Microelectronics Centre (1990–1993). He was on leave of absence the academic year 1992/93, acting as R{&}D manager in Fincitec Inc., Finland. From 1993 to 1996 he has been an associate professor, and since 1997 a full professor at the Faculty of the Electrical Engineering and Telecommunications, Helsinki University of Technology. He specializes in CMOS and BiCMOS analog integrated circuits, particularly for telecommunication applications. He is author or co-author of a hundred international and national conference and journal publications on analog integrated circuits.     

Analysis and VLSI Realization of a Blind Beamforming Algorithm

We present the fixed-point analysis and VLSI realization of a maximum-power blind beamforming algorithm. This algorithm consists of the computation of a correlation matrix and its dominant eigenvector, and we propose that the latter be accomplished by the power method. After analyzing the numerical stability of the power method, we derive a division-free form of the algorithm. Based on a block-Toeplitz assumption, we design an FIR filter based system to realize both the correlation computation and the power method. Our ring processor, which is optimized to implement digital filters, is used as the core of the architecture. A special technique for dynamically switching filter inputs is shown to double the system throughput. VLSI design is discussed in detail and chip fabrication results are presented.Fan Xu received the B.S. and M.S. degrees in electronics engineering from Tsinghua University, Beijing, China, in 1993 and 1996, respectively, and the Ph.D. degree in electrical engineering from the University of California, Los Angeles, in 2001. His Ph.D. research focused on algorithm design and analysis for digital signal processors and eigenvector estimation architectures.In 1997, he held an internship at Bell Labs, Lucent Technologies, Holmdel, NJ, where he worked on equalization algorithms for cellular systems. He joined Broadcom Co., Irvine, CA, in 2001. His research interests include VLSI signal processing, customized digital signal processor, efficient hardware architectures for adaptive signal processing and high-performance VLSI design.Guichang Zhong received the B.S. degree from Xi an Jiaotong University, China, in 1996 and the M.S. degree from the Institute of Microelectronics of Chinese Academy of Sciences, Beijing, China, in 2000, both in electrical engineering. He is currently working toward the Ph.D. degree in integrated circuits and systems at the University of California, Los Angeles.His present research interests are in high-performance VLSI digital signal processors design, with an emphasis on reconfigurable and energy-efficient architecture.Alan N. Willson, Jr. received the B.E.E. degree from the Georgia Institute of Technology, Atlanta, in 1961, and the M.S. and Ph.D. degrees from Syracuse University, Syracuse, NY, in 1965 and 1967 respectively.From 1961 to 1964 he was with IBM, Poughkeepsie, NY. He was an Instructor in electrical engineering at Syracuse University from 1965 to 1967. From 1967 to 1973 he was a Member of the Technical Staff at Bell Laboratories, Murray Hill, NJ. Since 1973, he has been on the faculty of the University of California, Los Angeles (UCLA), where he is Professor of Engineering and Applied Science in the Electrical Engineering Department. In addition, he served the UCLA School of Engineering and Applied Science as Assistant Dean for Graduate Studies from 1977 through 1981 and as Associate Dean of Engineering from 1987 through 2001. He has been engaged in research concerning computer-aided circuit analysis and design, the stability of distributed circuits, properties of nonlinear networks, theory of active circuits, digital signal processing, analog circuit fault diagnosis, and integrated circuits for signal processing. He is editor of Nonlinear Networks: Theory and Analysis (New York: IEEE Press, 1974). In 1991 he founded Pentomics, Inc.Dr. Willson is a member of Eta Kappa Nu, Sigma Xi, Tau Beta Pi, the Society for Industrial and Applied Mathematics, and the American Society for Engineering Education. From 1977 to 1979, he served as Editor of the IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. In 1980, he was General Chairman of the 14th Asilomar Conference on Circuits, Systems, and Computers. During 1984, he served as President of the IEEE Circuits and Systems Society. He was the recipient of the 1978 and 1994 Guillemin-Cauer Awards of the IEEE Circuits and Systems Society, the 1982 GeorgeWestinghouse Award of the American Society for Engineering Education, the 1982 Distinguished Faculty Award of the UCLA Engineering Alumni Association, the 1984 Myril B. Reed Best Paper Award of the Midwest Symposium on Circuits and Systems, the 1985 and 1994 W.R.G. Baker Awards of the IEEE, the 2000 Technical Achievement Award and the 2003 Mac Van Valkenburg Award of the IEEE Circuits and Systems Society.     

Baseband Digital Predistorter with Quadrature Error Correction

In this article simulation and measurement results of a FPGA implementation of a baseband digital complex gain predistorter with a quadrature modulator and demodulation error correction circuits are presented. Four different methods for finding the quadrature error correction values are compared and the effect of quadrature errors to predistortion is discussed. A 50 dB three stage power amplifier chain with an analog quadrature modulator and demodulator was used in the measurements as the device to be predistorted. The signal used in the measurements and simulations was a 30 dBm 18 kHz 16-QAM signal at 400 MHz carrier frequency. In the measurements 15 dB reduction in 3rd order nonlinearity was achieved. The usage of quadrature error correction reduced the adjacent channel power by 9 dB. Ilari Teikari was born in Tampere, Finland, in 1978. He received the M.Sc. (tech.) degree from Helsinki University of Technology (HUT), Helsinki, Finland, in 2002. He is currently working toward D.Sc. (tech) degree in the electronic circuit design laboratory, HUT. His current research intrests are in the area of power amplifier linearization methods and digital circuit design. Jouko Vankka was born in Helsinki, Finland, in 1965. He received the M.S. and Ph.D. degrees in electrical engineering from Helsinki University of Technology (HUT) in 1991 and 2000, respectively. Since 1995, he has been with the Electronic Circuit Design Laboratory, HUT. His research interests include VLSI architectures and mixed-signal integrated circuits for communication applications. Kari A. I. Halonen was born in Helsinki, Finland, on May 23, 1958. He received the M.Sc. degree in electrical engineering from Helsinki University of Technology, Finland, in 1982, and the Ph.D. degree in electrical engineering from the Katholieke Universiteit Leuven, in Heverlee, Belgium, in 1987. From 1982 to 1984 he was employed as assistant at Helsinki University of Technology and as research assistant at the Technical Research Center of Finland. From 1984 to 1987 he was a research assistant at the E.S.A.T. Laboratory of the Katholieke Universiteit Leuven, enjoying also a temporary grant of the Academy of Finland. Since 1988 he has been with the Electronic Circuit Design Laboratory, Helsinki University of Technology, as senior assistant (1988–1990), and the director of the Integrated Circuit Design Unit of the Microelectronics Center (1990–1993). He was on leave of absence the academic year 1992–1993, acting as R&D manager in Fincitec Inc., Finland. From 1993 to 1996 he has been an associate professor, and since 1997 a full professor at the Faculty of Electrical Engineering and Telecommunications, Helsinki University of Technology. He became the Head of Electronic Circuit Design Laboratory year 1998. From 1997 to 1999 he was an associate editor of IEEE Transactions on Circuits and Systems I. He has been a guest editor for IEEE Journal of Solid-State Circuits and the Technical Program Committee Chairman for European Solid-State Circuits Conference year 2000. He has been awarded the Beatrice Winner Award in ISSCC'02 Conference year 2002. He specializes in CMOS and BiCMOS analog integrated circuits, particularly for telecommunication applications. He is author or co-author over a hundred and fifty international and national conference and journal publications on analog integrated circuits. He has several patents on analog integrated circuits.     

An analysis of high-frequency noise in RF active CMOS mixers

An analysis of high-frequency noise in RF active CMOS mixers including single-balanced and double-balanced architectures is presented. The analysis investigates the contribution of non-white gate-induced noise to the output noise power as well as the spot noise figure (NF) of the RF CMOS mixer. It accounts for the non-zero correlation between the gate-induced noise and the channel’s thermal noise. The noise contribution of the RF transconductor and the switching pair to the output noise power is studied. Experimental results verify the accuracy of the analytical model. Payam Heydari (S’98–M’00) received the B.S. and M.S. degrees in electrical engineering from the Sharif University of Technology, in 1992, 1995, respectively. He received the Ph.D. degree in electrical engineering from the University of Southern California, in 2001. During the summer of 1997, he was with Bell-Labs, Lucent Technologies, where he worked on noise analysis in deep submicrometer very large-scale integrated (VLSI) circuits. During the summer of 1998, he was with IBM T. J. Watson Research Center, Yorktown Heights, NY, where he worked on gradient-based optimization and sensitivity analysis of custom-integrated circuits. Since August 2001, he has been an Assistant Professor of Electrical Engineering at the University of California, Irvine, where his research interest is the design of high-speed analog, RF, and mixed-signal integrated circuits. Dr. Heydari has received the 2005 National Science Foundation (NSF) CAREER Award, the 2005 IEEE Circuits and Systems Society Darlington Award, the 2005 Henry Samueli School of Engineering Teaching Excellence Award, the Best Paper Award at the 2000 IEEE International Conference on Computer Design (ICCD), the 2000 Honorable Mention Award from the Department of EE-Systems at the University of Southern California, and the 2001 Technical Excellence Award in the area of Electrical Engineering from the Association of Professors and Scholars of Iranian Heritage (APSIH). He was recognized as the 2004 Outstanding Faculty at the EECS Department of the University of California, Irvine. His name was included in the 2006 Who’s Who in America. Dr. Heydari Professor Heydari has been the Associate Editor of IEEE TRANS. ON CIRCUITS AND SYSTEMS, I, since 2006. He currently serves on the Technical Program Committees of International Symposium on Low-Power Electronics and Design (ISLPED), International Symposium on Quality Electronic Design (ISQED), and the Local Arrangement Chair of the ISLPED conference. He was the Student Design Contest Judge for the DAC/ISSCC Design Contest Award in 2003, the Technical Program Committee member of the IEEE Design and Test in Europe (DATE) from 2003 to 2004, and International Symposium on Physical Design (ISPD) in 2003.     

A Low Voltage 14-Bit Self-Calibrated CMOS DAC with Enhanced Dynamic Linearity

A 1-V CMOS current steering digital to analog converter with enhanced static and dynamic linearity is presented. The 14-bit static linearity is achieved by a background analog self calibration technique which is suitable for low voltage applications and does not require error measurement and correction circuits. To improve dynamic linearity at high frequencies, a track/attenuate output stage is used at the DAC output. Integral and differential nonlinearities of the proposed DAC corresponding to 14-bit specification are less than 0.35 and 0.25 LSB, respectively. The DAC is functional up to 400MS/s with SFDR better than 71 dB in the Nyquist band. The circuit has been designed and simulated in a standard 0.18 u CMOS technology. Saeed Saeedi was born in Tehran, Iran, in 1979. He received the B.Sc. and M.Sc. degrees in electrical engineering from Sharif University of Technology, Tehran, Iran in 2001 and 2003, respectively. Since 2002, he has been working with Iran Microelectronics Research Center, IMRC. He is currently working toward the Ph.D. degree. His research interests include analog and digital integrated circuits for communication systems and high performance data converters. Saeid Mehrmanesh was born in Arak, Iran in 1976. He received the B.Sc. and M.Sc. degrees in electrical engineering from Sharif University of Technology, Tehran, Iran, in 1999 and 2002. From 2000, he has been working with Iran Microelectronics Research Center as an analog and mixed-mode and RF-IC design engineer. Since 2004, he has been a Ph.D. student at the University of Tehran. His research interests include analog to digital and digital to analog data converters, low voltage and low power CMOS circuits, telecommunication circuits, high speed serial links and RF circuits. Mojtaba Atarodi received the B.S.E.E. from Amir Kabir University of Technology (Tehran Polytechnic) in 1985, and M.Sc. degree in electrical engineering from the University of California, Irvine, in 1987. He received the Ph.D. degree from the University of Southern California (USC) on the subject of analog IC design in 1993.From 1993 to 1996 he worked with Linear Technology Corporation as a senior analog design engineer. Since then, he has been consulting with different IC companies. He is currently a visiting professor at Sharif University of Technology. He has published more than 30 technical papers in the area of analog and mixed-signal integrated circuit design as well as analog CAD tools.This revised version was published online in May 2005 with corrections to the authors affiliations.     

DC offsets in direct conversion multistandard wireless receivers: Modeling and cancellation

To realize a high performance direct conversion receiver for multistandard wireless communications, the limiting factors in the direct conversion receiver should be identified and removed. In this paper, among many problems in direct conversion receivers, the DC offset problem is studied. The origins of the DC offset are summarized, and three self-mixing mechanisms generating the DC offset are modeled to better understand how the static (or time-invariant) and dynamic (or time-varying) DC offsets are produced from the mechanisms. A DC offset cancellation scheme consisting of a static DC offset canceller and a dynamic DC offset canceller is proposed and verified through simulations. Seok-Bae Park received the B.S. and M.S. degrees in Electrical Engineering from Seoul National University, Seoul, Korea, and the M.S. and Ph.D. degrees in Electrical and Computer Engineering from Ohio State University, Columbus, Ohio. He is currently with Firstpass Technologies, Inc., Dublin, Ohio as a Senior RF and Mixed-Signal Design Engineer. His current interests include low voltage/low power CMOS RF/analog/mixed-signal integrated circuits and systems for wireless communications. Mohammed Ismail has over 20 years experience of R&D in the fields of analog, RF and mixed signal integrated circuits. He has held several positions in both industry and academia and has served as a corporate consultant to nearly 30 companies in the US, Europe and the far east. He is Professor and The Founding Director of the Analog VLSI Lab, The Ohio State University. He advised the work of 40 PhD students and of 85 MS students. His current interest lies in research involving digitally programmable/configurable fully integrated radios with focus on low voltage/low power first-pass solutions for 3G and 4G wireless handhelds. He publishes intensively in this area and has been awarded 11 patents. He has coedited and coauthored several books including a text on Analog VLSI Signal and Information Processing, McGraw Hill. His last book (2004) is entitled CMOS PLLs and VCOs for 4G Wireless, Springer. He co-founded ANACAD-Egypt (now part of Mentor Graphics, Inc.) and Firstpass Technologies Inc., a developer of CMOS radio and mixed signal IPs for handheld wireless applications. Dr. Ismail has been the recipient of several awards including the US National Science Foundation Presidential Young Investigator Award, the US Semiconductor Research Corp Inventor Recognition Awards in 1992 and 1993, and a Fulbright/Nokia fellowship Award in 1995. He is the founder of the International Journal of Analog Integrated Circuits and Signal Processing, Springer and serves as the Journal’s Editor-In-Chief. He has served as Associate Editor for many IEEE Transactions, was on the Board of Governors of the IEEE Circuits and Systems Society and is the Founding Editor of “The Chip” a Column in The IEEE Circuits and Devices Magazine. He obtained his BS and MS degrees in Electronics and Communications from Cairo University, Egypt and the PhD degree in Electrical Engineering from the University of Manitoba, Canada. He is a Fellow of IEEE.     

A Broadband Quadrature-Modulator in Standard 0.13 μm CMOS

A polyphase filtering topology is proposed which uses parallel switchable RC-networks for accurate broadband 90^∘ phasing. A 0.13μm CMOS prototype using the quadrature-generation network in a direct-conversion quadrature-modulator achieves a measured image-rejection ratio of −39 dBc or better in 0.6–2.5 GHz while consuming only 66 mW from a 2.2 V single supply. Esa Tiiliharjuwas born in Rovaniemi, Finland, in 1966. He received the M.Sc. degree in Information Technology in 1995, and the Lic.Tech degree in electrical engineering in 1998, both from Helsinki University of Technology, Finland. From 1996 to July 1997 he was employed as an assistant at Helsinki University of Technology. He has held a position as a research assistant since 1997, and he is currently working towards his Ph.D. degree in the Electronic Circuit Design Laboratory at Helsinki University of Technology. His research interests include the design of integrated low-power circuits for portable telecommunication applications. He has designed and measured several integrated circuits for this application area. He is the author or co-author of several internationally-refereed conference and journal publications on analog integrated circuits. Kari A.I. Halonenwas born in Helsinki, Finland, on May 23, 1958. He received the M.Sc. degree in electrical engineering from the Helsinki University of Technology (HUT) in 1982 and the Ph.D. degree in electrical engineering from the Katholieke Universiteit Leuven, Heverlee, Belgium, in 1987. From 1982 to 1984, he was with HUT as an Assistant and with the Technical Research Center of Finland as a Research Assistant. From 1984 to 1987, he was a Research Assistant with the E.S.A.T. Laboratory, Katholieke Universiteit Leuven, with a temporary grant from the Academy of Finland. Since 1988, he has been with the Electronic Circuit Design Laboratory, HUT, as a Senior Assistant from 1988 to 1990, and as the Director of the Integrated Circuit Design Unit of the Microelectronics Center from 1990 to 1993. He was on leave of absence during the academic year 1992–1993, acting as Research and Development Manager with Fincitec Inc., Finland. From 1993 to 1996, he was an Associate Professor, and since 1997, he has been a full Professor with the Faculty of Electrical Engineering and Telecommunications, HUT. He became the Head of Electronic Circuit Design Laboratory year 1998. He was the Technical Program Committee Chairman for the European Solid-State Circuits Conference in 2000. He is the author or coauthor of over 150 international and national conference and journal publications on analog integrated circuits, and holds several patents on analog integrated circuits. His research interests are in CMOS and BiCMOS analog integrated circuits, particularly for telecommunication applications. Dr. Halonen was an Associate Editor of the IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS–PART I: FUNDAMENTAL THEORY AND APPLICATIONS from 1997 to 1999. He has been a Guest Editor for the IEEE JOURNAL OF SOLID-STATE CIRCUITS. He received the BeatriceWinner Award from the IEEE International Solid-State Circuits Conference in 2002.[c-halonen.eps]     

A Triple-Mode Sigma-Delta Modulator for Multi-Standard Wireless Radio Receivers

A 1.8 V sigma-delta modulator with a 4 bit quantizer has been designed for GSM/WCDMA/WLAN receivers in a 0.18 um CMOS process. The modulator makes use of low-distortion sigma-delta modulator architecture and Pseudo-Data-Weighted-Averaging technique to attain high linearity over a wide bandwidth. Power dissipation is minimized by optimizing the architecture and by a careful design of analog circuitry. In GSM mode, the modulator achieves 96/104 dB peak SNR/SFDR over 100 kHz bandwidth and dissipates 18 mW at a sampling frequency of 32 MHz. The modulator achieves 92/68 dB peak SFDR and 77/54 dB peak SNR over a 2 MHz/10 MHz bandwidth and dissipates 23/39 mW at a sampling frequency of 64 MHz/160 MHz in WCDMA/WLAN. Ana Rusu received degrees of diploma engineer in electronics and telecommunications engineering from Technical University of Iasi, Romania, in 1983 and Ph.D. in electronics engineering from Technical University of Cluj-Napoca, Romania, in 1998. During 1983–1986 she was with Research Institute for Electronics Iasi, as researcher engineer. From 1986 to 1988 she was with Territorial Computer Centre, Piatra-Neamt, Romania, as a programmer in software engineering. Since 1988 she has been with the Technical University of Cluj-Napoca, Electronics and Telecommunications Faculty. In 1999 she was appointed as an associate professor. She has been in visiting researcher positions in University of Bradford, England, and Institute National Politechnique of Grenoble, France, in 1997 and 2001, respectively. Since September 2001, she has been with the Royal Institute of Technology (KTH), Stockholm, Sweden, where she is a senior researcher in radio and mixed-signal systems group. Her research interests include data conversion techniques for wireless communications and the design of low-voltage low-power analog and mixed-signal ICs. Ana Rusu has authored or coauthored five books (published in Romanian language) and more than 40 papers in international conference proceedings and journals. Alexey Borodenkov received his B.Sc. degree in computer science and engineering from St. Petersburg Electrotechnical University, Russia in 2002 and M.Sc. degree in electrical engineering from Royal Institute of Technology (KTH), Stockholm, Sweden in 2004. In October 2004 he joined Samsung Electronics Co. Ltd., Gyeunggi-Do, Korea, where he is involved in the design of multi-standard transceivers for wireless communications. His current research interests include integrated-circuit development of frequency synthesizers and data converters. Mohammed Ismail received the B.S. and M.S. degrees in electronics and telecommunications engineering from Cairo University, Egypt, in 1974 and 1978 and the Ph.D. in electrical engineering from the University of Manitoba, Canada, in 1983. He is a Professor with the Department of Electrical Engineering, The Ohio State University, Columbus. Since April 2003, he is also a Professor with the Department of Microelectronics and Information Technology, Royal Institute of Technology (KTH) Stockholm, Sweden. He has over 20 years experience of R&D in the fields of analog, RF and mixed signal integrated circuits. He has held several positions in both industry and academia and has served as a corporate consultant to nearly 30 companies in the US, Europe and the Far East. His current interest lies in research involving digitally programmable/configurable fully integrated radios with focus on low voltage/low power first-pass solutions for 3G and 4G wireless handhelds. He publishes intensively in this area and has been awarded 11 patents. He has co edited and coauthored several books. He co-founded ANACAD-Egypt (now part of Mentor Graphics, Inc.) and Spirea AB, Stockholm (now Firstpass Semiconductors AB), a developer of CMOS radio and mixed signal IPs for handheld wireless applications. Dr. Ismail has been the recipient of several awards including the US National Science Foundation Presidential Young Investigator Award, the US Semiconductor Research Corp Inventor Recognition Awards in 1992 and 1993, and a Fulbright/Nokia fellowship Award in 1995. He is the founder of the International Journal of Analog Integrated Circuits and Signal Processing, Springer and serves as the Journal's Editor-In-Chief. He has served as Associate Editor for many IEEE Transactions, was on the Board of Governors of the IEEE Circuits and Systems Society and is the Founding Editor of “The Chip” a Column in The IEEE Circuits and Devices Magazine. He is a Fellow of IEEE. Hannu Tenhunen received degrees of diploma engineer in electrical engineering and computer sciences from Helsinki University of Tehnology, Helsinki, Finland, in 1982 and Ph.D. in Microelectronics from Cornell University, Ithaca, NY, U.S.A., in 1986. During 1978–1982 he was with Electron Physics Laboratory, Helsinki University of Technology, and from 1983 to 1985 at Cornell University as a Fullbright scholar. From September 1985 he has been with Tampere University of Technology, Signal Processing Laboratory, Tampere, Finland, as an associate professor. He was also a coordinator of National Microelectronics Program of Finland during 1987–1991. Since January 1992, he has been with Royal Institute of Technology (KTH) Stockholm, Sweden, where he is a professor of electronic system design. His current research interests are VLSI circuits and systems for wireless and broadband communication, and related design methodologies and prototyping techniques. He has made over 400 presentations and publications on IC technologies and VLSI systems worldwide, and has over 16 patents pending or granted.     

A 1 V switchable CMOS LNA for 802.11A/B WLAN applications

A new dual-band, 2.4 and 5.2 GHz, combined LNA, which can operate at 1 V supply only, for WLAN application is presented. The switched transistor technique is used in the LNA. It could match the input port in two frequency bands and reduce one on-chip spiral inductor usage compared with [1, 2]. Theoretical analysis and transistor level simulation results using 0.18 μm CMOS process from Chartered Semiconductor are presented to demonstrate this idea. Wang-Chi Cheng received his B.Eng., M.Phil., and Ph.D. degrees in Electronic Engineering of the Chinese University of Hong Kong (CUHK) in 1999, 2001 and 2004. His research achievements during M.Phil. and Ph.D. studies were in the field of low voltage receiver front-end circuits design with CMOS technology. He joined the Electrical and Electronic Engineering department of Nanyang Technological University (NTU), Singapore, in May 2005 as a Research Fellow. Now, he is a Senior Engineer in charge of the UWB transceiver IC design in Hong Kong Applied Science and Technology Research Institute (ASTRI). His current research interests include 802.11 A/B WLAN and UWB transceiver design. He is also a paper reviewer of the IEEE Microwave and Wireless Components Letters. Jian-Guo Ma received his B.Sc. and M.Sc. in 1982 and 1988 respectively with honors from Lanzhou university of Chain, and Doctoral Degree in Engineering from Gerhard-Mercator University of Germany in 1996. From Jan. 1982 to March 1991, he has worked with Lanzhou university of China on RF & Microwave Engineering. Before he joined Nanyang Technological University in 1997, he was with Technical University of Nova Scotia, Canada. Now, he is a Professor of the University of Electronic Science and Technology of China. His research interests are: RFIC designs for wireless applications; RF characterization and modeling of semiconductor devices; RF interconnects and packaging; SoC and Applications; EMC/EMI in RFICs. He has published more than 150 technical papers and two books in above mentioned areas. He holds 6 patents in CMOS RFICs. He is now Associate Editor for IEEE Microwave and Wireless Components Letters. Kiat-Seng Yeo received his B.E. (Hons.) (Elect) in 1993, and Ph.D. (Elect. Eng.) in 1996 both from Nanyang Technological University, Singapore. He joined the School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore as a Lecturer in 1996, and became an Assistant Professor and an Associate Professor in 1999 and 2002, respectively. Professor Yeo provides consulting to statutory boards and multinational corporations in the areas of semiconductor devices and electronic circuit design. He has been extensively involved in the modeling and fabrication of small MOS/Bipolar integrated technologies for the last ten years. His research interests also include the design of new circuits and systems (based on scaled technologies) for low-voltage low-power applications; radio frequency integrated circuit (RF IC) design; integrated circuit design of BiCMOS/CMOS multiple-valued logic circuits, domino logic, and memories; and device characterization of deep submicrometer MOSFETs. Manh-Anh Do obtained his B.E. (Hons) (Elect.) in 1973, and Ph.D. (Elect. Eng.) in 1977 both from University of Canterbury, New Zealand. Between 1977 and 1989, he held various positions including: R & D engineer and production manager at Radio Engineering Ltd., research scientist at Fisheries Research Centre, New Zealand, and senior lecturer at National University of Singapore. He joined the School of Electrical and Electronic Engineering, Nanyang Technological University (NTU), Singapore as a senior lecturer in 1989, and obtained the Associate Professorship in 1996 and the Professorship in 2001. He has been a consultant for many projects in the Singapore electronic industry, and was the principal consultant for the design, testing and implementation of the $200 million Electronic Road Pricing (ERP) island-wide project in Singapore, from 1990 to 2001. His current research is on digital and mobile communications, RF IC design, mixed-signal circuits and intelligent transport systems. Before that, he specialsed in sonar designing, biomedical engineering and signal processing. Since 1995, he has been Head of Division of Circuits and Systems, School of EEE, NTU. He is a Fellow of IEE, UK, a Chartered Engineer (UK) and a Professional Engineer (Singapore).     

VLSI Architecture for Lifting-Based Shape-Adaptive Discrete Wavelet Transform with Odd-Symmetric Filters

In this paper, a VLSI architecture for lifting-based shape-adaptive discrete wavelet transform (SA-DWT) with odd-symmetric filters is proposed. The proposed architecture is comprised of a stage-based boundary extension strategy and the shape-adaptive boundary handling units. The former could reduce the complexity of multiplexers that are introduced to solve the shape-adaptive boundary extension. The latter consists of two multiplexers and can solve the shape-adaptive boundary extension locally without any additional register. Two case studies are presented, including the JPEG 2000 default (9, 7) filter and MPEG-4 default (9, 3) filter. According to comparison results with previous architectures, the efficiency of the proposed architectures is proven.Chao-Tsung Huang was born in Kaohsiung, Taiwan in 1979. He received the B.S. degree from the Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan in 2001. He is currently working toward the Ph.D. degree at the Graduate Institute of Electronics Engineering, National Taiwan University. His major research interests include VLSI design and implementation for 1-D, 2-D, and 3-D Discrete Wavelet Transform. cthuang@video.ee.ntu.edu.twPo-Chih Tseng was born in Tao-Yuan, Taiwan in 1977. He received the B.S. degree in Electrical and Control Engineering from National Chiao Tung University in 1999 and the M.S. degree in Electrical Engineering from National Taiwan University in 2001. He currently is pursuing the Ph.D. degree at the Graduate Institute of Electronics Engineering, Department of Electrical Engineering, National Taiwan University. His research interests include VLSI design and implementation for signal processing systems, energy-efficient reconfigurable computing for multimedia systems, and power-aware image and video coding systems. pctseng@video.ee.ntu.edu.twLiang-Gee Chen (S84–M86–SM94–F01) received the B.S., M.S., and Ph.D. degrees in electrical engineering from National Cheng Kung University, Tainan, Taiwan, R.O.C., in 1979, 1981, and 1986, respectively.In 1988, he joined the Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan, R.O.C. During 1993–1994, he was a Visiting Consultant in the DSP Research Department, AT&T Bell Labs, Murray Hill, NJ. In 1997, he was a Visiting Scholar of the Department of Electrical Engineering, University of Washington, Seattle. Currently, he is Professor at National Taiwan University, Taipei, Taiwan, R.O.C. His current research interests are DSP architecture design, video processor design, and video coding systems.Dr. Chen has served as an Associate Editor of IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY since 1996, as Associate Editor of the IEEE TRANSACTIONS ON VLSI SYSTEMS since 1999, and as Associate Editor of IEEE TRANSACTIONS CIRCUITS AND SYSTEMS II since 2000. He has been the Associate Editor of the Journal of Circuits, Systems, and Signal Processing since 1999, and a Guest Editor for the Journal of Video Signal Processing Systems. He is also the Associate Editor of the PROCEEDINGS OF THE IEEE. He was the General Chairman of the 7th VLSI Design/CAD Symposium in 1995 and of the 1999 IEEE Workshop on Signal Processing Systems: Design and Implementation. He is the Past-Chair of Taipei Chapter of IEEE Circuits and Systems (CAS) Society, and is a member of the IEEE CAS Technical Committee of VLSI Systems and Applications, the Technical Committee of Visual Signal Processing and Communications, and the IEEE Signal Processing Technical Committee of Design and Implementation of SP Systems. He is the Chair-Elect of the IEEE CAS Technical Committee on Multimedia Systems and Applications. During 2001–2002, he served as a Distinguished Lecturer of the IEEE CAS Society. He received the Best Paper Award from the R.O.C. Computer Society in 1990 and 1994. Annually from 1991 to 1999, he received Long-Term (Acer) Paper Awards. In 1992, he received the Best Paper Award of the 1992 Asia-Pacific Conference on circuits and systems in the VLSI design track. In 1993, he received the Annual Paper Award of the Chinese Engineer Society. In 1996 and 2000, he received the Outstanding Research Award from the National Science Council, and in 2000, the Dragon Excellence Award from Acer. He is a member of Phi Tan Phi. lgchen@video.ee.ntu.edu.tw     

A 200 MHz 4.8 mW 3 V Fully Differential CMOS Sample-and-Hold Circuit with Low Hold Pedestal

Wide frequency bandwidth has been internationally allocated for unlicensed operation around the oxygen absorption frequency at 60 GHz. A power amplifier and a low noise amplifier are presented as building blocks for a T/R-unit at this frequency. The fabrication technology was a commercially available 0.15 m gallium arsenide (GaAs) process featuring pseudomorphic high electron mobility transistors (PHEMT). Using on-wafer tests, we measured a gain of 13.4 dB and a +17 dBm output compression point for the power amplifier at 60 GHz centre frequency when the MMIC was biased to 3 volts V_dd. At the same frequency, the low noise amplifier exhibited 24 dB of gain with a 3.5 dB noise figure. The AM/AM and AM/PM characteristics of the power amplifier chip were obtained from the large-signal S-parameter measurement data. Furthermore, the power amplifier was assembled in a split block package, which had a WR-15 waveguide interface in input and output. The measured results show a 12.5 dB small-signal gain and better than 8 dB return losses in input and output for the packaged power amplifier.Mikko Kärkkäinen received the M.Sc. degree in electrical engineering from the Helsinki University of Technology, Espoo, Finland, in 2000, and is currently working toward the Ph.D. degree at the Electronic Circuit Design Laboratory, Helsinki University of Technology. He is interested in millimetre wave circuit design.Mikko Varonen received the M.Sc. degree in electrical engineering from the Helsinki University of Technology, Espoo, Finland, in 2002. He is currently working toward the Ph.D. degree in electrical engineering at the Electronic Circuit Design Laboratory, Helsinki University of Technology. His research interests involve millimetre-wave integrated circuits.Pekka Kangaslahti received the M.Sc. and Ph.D. degrees in electrical engineering from the Helsinki University of Technology, Finland, in 1992 and 1999, respectively. Since 1999 he has been a visiting scientist at the NASA Jet Propulsion Laboratory, Pasadena, USA. His research interests include nonlinear microwave and millimetre wave monolithic circuits, especially for signal generation in telecommunication and radar applications.Kari A. I. Halonen was born in Helsinki, Finland, on May 23, 1958. He received the M.Sc. degree in electrical engineering from Helsinki University of Technology, Finland, in 1982, and the Ph.D. degree in electrical engineering from the Katholieke Universiteit Leuven, in Heverlee, Belgium, in 1987.From 1982 to 1984 he was employed as assistant at Helsinki University of Technology and as research assistant at the Technical Research Center of Finland. From 1984 to 1987 he was a research assistant at the E.S.A.T. Laboratory of the Katholieke Universiteit Leuven, enjoying also a temporary grant of the Academy of Finland. Since 1988 he has been with the Electronic Circuit Design Laboratory, Helsinki University of Technology, as senior assistant (1988–1990), and the director of the Integrated Circuit Design Unit of the Microelectronics Center (1990–1993). He was on leave of absence the academic year 1992–93, acting as R&D manager in Fincitec Inc., Finland. From 1993 to 1996 he has been an associate professor, and since 1997 a full professor at the Faculty of Electrical Engineering and Telecommunications, Helsinki University of Technology. He became the Head of Electronic Circuit Design Laboratory year 1998. From 1997 to 1999 he was an associate editor of IEEE Transactions on Circuits and Systems I. He has been a guest editor for IEEE Journal of Solid-State Circuits and the Technical Program Committee Chairman for European Solid-State Circuits Conference year 2000. He has been awarded the Beatrice Winner Award in ISSCC02 Conference year 2002.