50/100GHz AWG型光学梳状滤波器的设计与制备

以Si基SiO2平面光波导为基础,设计并制备了50/100GHz AWG型光学梳状滤波器.制备得到的AWG型光学梳状滤波器可以覆盖1520～1585nm的波长范围,共有160个信道.功率输出不均匀度＜0.5dB,插入损耗＜8dB,相邻通道的串扰＞13dB,在距离中心频率最远的信道,输出频率偏离ITU标准15GHz.分析了影响器件串扰和信道频率偏移的原因,并提出了相应的解决办法.     

法布里-珀罗型光学梳状滤波器的设计

提出了一种新型光学梳状滤波器 ,它由双Gires Tournois谐振腔代替Michelson干涉仪的两个全反射镜构成。基于Michelson干涉原理 ,给出了零畸变、高信道隔离度、宽平坦带宽、高一致性、结构简单、性能稳定的光学梳状滤波器的设计原理。设计了信道间隔为 5 0GHz,畸变 <0 0 5dB ,1dB带宽大于 0 38nm ,相邻信道间隔离度大于 2 3dB的光学梳状滤波器     

法布里-珀罗腔游标式级联可调谐光滤波器在DWDM系统中的串扰分析

研究了法布里 -珀罗 (F -P)型级联可调谐光滤波器在密集波分复用系统中引入的信道间串扰对系统的影响 ,并分别讨论激光线宽、光波导损耗、信道间距对串扰的影响。对设计的器件 ,在信道间隔为 2 5GHz,激光线宽为 5GHz时 ,串扰可达 -17dB左右     

全光纤迈克尔逊-萨尼克干涉仪型梳状滤波器实验研究

提出用3dB耦合器和光纤环镜制作了一种全光纤迈克尔逊-萨尼克型光学梳状滤波器，其信道间隔为50GHz。实验研究了其电调谐特性及干涉臂的扭转对其输出特性的影响。对全光纤迈克尔逊-萨尼克型梳状滤波器与马赫-曾德尔干涉仪型梳状滤波器的性能优劣进行了分析比较，其结果可以为今后该器件的制作及关键技术的解决提供参考。     

基于SOI的16通道200GHz阵列波导光栅

设计并制作了基于绝缘体上硅(SOI)材料的1×16阵列波导光栅(AWG).该AWG器件的中心波长为1 550 nm,信道间隔为200 GHz,采用了脊型波导结构.首先确定了波导的结构尺寸以保证单模传输,并利用束传播法(BPM)模拟了波导间隔、弯曲半径和锥形波导长度等参数对器件性能的影响,对器件结构进行了优化,同时也利用BPM方法模拟了器件的传输谱.模拟结果显示:器件的最小信道损耗为4.64 dB,串扰小于-30 dB.根据优化的器件结构,通过光刻等半导体工艺制作了AWG,经测试得到AWG器件的损耗为4.52～8.1 dB,串扰为17～20 dB,能够实现良好的波分复用/解复用功能.     

一种降低列阵波导光栅相邻信道串扰的方法

阵列波导光栅 (AWG)作为波长滤波器在光通信领域具有很大的应用前景。串扰是影响阵列波导光栅应用的重要因素之一。为了降低阵列波导光栅相邻信道的串扰 ,本文提出并研究了一种降低阵列波导光栅的新方法。该方法利用阵列波导光栅的衍射特点性 ,通过调节阵列波导光栅的自由光谱范围 (FSR)、罗兰圆焦距和阵列波导数目 ,使得各信道信号的输出极小值处于其它信道输出波导中心 ,无次极大处于其它波导中 ,从而降低了阵列波导光栅的串扰 ,特别是相邻信道之间的串扰。通过光束传播方法 (BPM)的模拟了具有不同FSR的 1× 16阵列波导光栅 ,结果显示 ,该方法能将相邻信道之间的串扰降低约 5 .7dB。     

低损耗高集成度氮化硅阵列波导光栅波分(解)复用器

氮化硅平台阵列波导光栅(AWG)波分(解)复用器具有损耗低、集成度高、温度敏感性低等优势。基于联合微电子中心有限责任公司(CUMEC)的氮化硅集成光子工艺平台,从波导传输损耗、阵列波导与平板波导模式转换损耗、截断损耗、泄漏损耗等方面对氮化硅基AWG波光(解)复用器插入损耗进行了优化,并采用标准CMOS工艺完成低损耗C波段AWG密集波分(解)复用器制备。该氮化硅基AWG密集波分(解)复用器输出通道数为16,输出通道频率间隔200 GHz。测试结果表明,该AWG波分(解)复用器的平均插入损耗为2.34 dB,1 dB带宽为0.44 nm,3 dB带宽为0.76 nm,串扰约为-28 dB。芯片尺寸为850μm×1700μm,较平面光波导(PLC)基AWG大大减小。     

用于FBG解调的AWG芯片的设计、仿真与制备

设计、仿真并制备了一种用于光纤布拉格光栅(FBG)解调的阵列波导光栅(AWG)芯片。该芯片基于SOI衬底进行制备,并在AWG的输入/输出波导、阵列波导与平板波导之间采用双刻蚀结构进行优化。经仿真,该AWG的插入损耗为1.5dB,串扰小于 -20dB,3dB带宽为1.5nm。优化后的AWG芯片采用深紫外光刻技术、电感耦合等离子体等技术制备。经测试,该AWG的插入损耗为3dB,串扰小于 -20dB,3dB带宽为2.3nm。搭建了基于该AWG的解调系统,解调实验结果表明,该系统在0.8nm范围内的解调精度可达11.26pm,波长分辨率为6pm。     

基于硅纳米线波导的16通道200GHz阵列波导光栅

设计了基于硅纳米线波导的16通道,通道间隔为200GHz的阵列波导光栅(AWG)。传输函数法模拟了器件传输谱,结果表明器件的通道间隔为1.6nm,通道间串扰为31dB。器件利用SOI材料,由193nm深紫外光刻工艺制备。光谱测试结果分析表明,通道串扰为5-8dB,中心通道损耗2.2dB,自由光谱区长度24.7nm,平均信道间隔1.475nm。详细分析了器件谱线畸变的原因。     

基于Interleave和微谐振环的32信道波分复用器特性

对结合interleave滤波器的1×32信道垂直耦合双环谐振波分复用器件的传输特性进行了研究,得到了器件的光学传递函数公式,对器件的参数、光谱响应、分波光谱、插入损耗以及信道间的串扰进行了数值模拟和优化.分析结果表明,通过在微环谐振波分复用器件的前端增加interleave滤波器,使信道间的串扰降低了14 dB,并且改善了器件的输出光谱形状,提高了器件的信道复用密度;同时,由于采用了在同一基片上集成,保证了器件的低插入损耗.通过参数优化,得到了中心波长为1 550 nm、波长间隔为0.4 nm、3 dB带宽为0.21 nm、插入损耗低于1.1 dB和串扰低于-32 dB的32信道密集波分复用器(DWDM).     

Compact and low-loss integrated box-like passband multiplexer

A fully packaged 40-channel 100-GHz-spacing full-coupler-type synchronized-gratings multiplexer with a 1-dB bandwidth >57 GHz, total adjacent crosstalk /spl plusmn/35 GHz around the ITU grid <-18 dB, and loss <3.5 dB for all channels is presented.     

Miniature Four-Way and Two-Way 24 GHz Wilkinson Power Dividers in 0.13 μm CMOS

This letter presents 24 GHz four-way and two-way miniature Wilkinson power dividers (PDs) in a standard CMOS technology. The chip area is significantly reduced using a lumped-element design, and the effective areas of four-way and two-way Wilkinson dividers are 0.33 times 0.33 mm² and 0.12 times 0.29 mm², respectively. The four-way Wilkinson divider results in an insertion loss <2.4 dB, an input/output return loss better 15.5 dB, and a port-to-port isolation >24.7 dB from 22 to 26 GHz. The two-way Wilkinson divider results in an insertion loss <1.4 dB, an input/output return loss better 8.9 dB, and a port-to-port isolation >14.8 dB from 22 to 26 GHz. To the author's knowledge, this is the first demonstration of 24 GHz four-way Wilkinson PD in a standard CMOS technology.     

Improved and compact 0.7 GHz tune-all bandpass filter

A compact tune-all bandpass filter is presented. This electronically tuned filter is based on series-coupled slow-wave resonators. It allows wide simultaneous and continuous tunings of centre frequency (+/-15% around 0.7 GHz) and bandwidth (from 50 to 100 MHz) with insertion loss IL<5.4 dB and return loss RL>11 dB. This two-pole bandpass filter exhibits also a very small surface of only 7.3times10^-3 lambda₀ ² and a -20 dB stop-band that extends up to 10 GHz     

Fabrication of 64×64 arrayed-waveguide grating multiplexer onsilicon

A 64 channel arrayed-waveguide multiplexer with 0.4 nm (50 GHz) channel spacing at 1.55 μm has been fabricated using SiO₂-Si waveguides. The authors obtained a crosstalk of less than -27 dB to neighbouring and all other channels. The on-chip insertion loss ranges from 3.1 to 5.7 dB for central and peripheral output ports, respectively     

A high-performance integrated K-band diplexer

This paper describes the design and measurement of a planar diplexer integrated on a single silicon substrate. The diplexer channels are 5% and 6.5% relative bandwidth at 28 and 31 GHz, respectively. The diplexer is based on a micropackaged membrane supported capacitively coupled microstrip structure and is 1.5 cm×1.6 cm and only 1.4 mm thick. The measured insertion loss is 1.4 dB (5%) and 0.9 dB (6.5%) for the two channels with better than 35 dB isolation in the 28 GHz band and better than 50 dB isolation in the 31 GHz band. The measured results include all transition and packaging effects. The diplexer has coplanar-waveguide ports and can easily be integrated with other elements such as planar antennas, low-noise amplifier, and power amplifiers     

基于耦合带线超宽带耦合器的分析与设计

介绍了一种基于耦合带线超宽带耦合器的分析与设计。实际设计的超宽带3dB耦合器在1.2~4.2GHz相对带宽110%的频带内,插入损耗小于0.5dB,带内波纹大于-0.25dB小于 0.35dB,端口隔离大于17dB,端口驻波小于1.3。     

Realization of Multilayered Wide-Passband Bandpass Filter With Low-Temperature Co-Fired Ceramic Technology

This paper develops a new multilayered wide-passband bandpass filter with the assistance of low-temperature co-fired ceramic technology. The mutually inductive coupling between the input and output port of a low- and high-pass filter cascaded in the proposed filter is utilized as well. The results show that in the passband of 3.1–4.9 GHz, the measured insertion loss and return loss of this filter are less than 1.1 dB and greater than 18 dB, respectively. In addition, the insertion loss from dc to 2.76 GHz is greater than 20 dB, and the one from 5.8 to 12 GHz is greater than 30 dB.      

A Millimeter-Wave (40–45 GHz) 16-Element Phased-Array Transmitter in 0.18-$mu$ m SiGe BiCMOS Technology

This paper demonstrates a 16-element phased-array transmitter in a standard 0.18-mum SiGe BiCMOS technology for Q-band satellite applications. The transmitter array is based on the all-RF architecture with 4-bit RF phase shifters and a corporate-feed network. A 1:2 active divider and two 1:8 passive tee-junction dividers constitute the corporate-feed network, and three-dimensional shielded transmission-lines are used for the passive divider to minimize area. All signals are processed differentially inside the chip except for the input and output interfaces. The phased-array transmitter results in a 12.5 dB of average power gain per channel at 42.5 GHz with a 3-dB gain bandwidth of 39.9-45.6 GHz. The RMS gain variation is < 1.3 dB and the RMS phase variation is < for all 4-bit phase states at 35-50 GHz. The measured input and output return losses are < -10 dB at 36.6-50 GHz, and <-10 dB at 37.6-50 GHz, respectively. The measured peak-to-peak group delay variation is plusmn 20 ps at 40-45 GHz. The output P_-1dB is -5plusmn1.5 dBm and the maximum saturated output power is - 2.5plusmn1.5 dBm per channel at 42.5 GHz. The transmitter shows <1.8 dB of RMS gain mismatch and < 7deg of RMS phase mismatch between the 16 different channels over all phase states. A - 30 dB worst-case port-to-port coupling is measured between adjacent channels at 30-50 GHz, and the measured RMS gain and phase disturbances due to the inter-channel coupling are < 0.15 dB and < 1deg, respectively, at 35-50 GHz. All measurements are obtained without any on-chip calibration. The chip consumes 720 mA from a 5 V supply voltage and the chip size is 2.6times3.2 mm².     

Integrated metal magnetic film coupled line circulators for monolithic microwaveintegrated circuits

A new structure of integrated planar metal magnetic film coupled line (MMFCL) circulators is presented, in which a metal magnetic film is used instead of ferrite materials. Simulation was performed with HFSS based on coupled-mode theory. An insertion loss of 4 dB and isolation of -13.5 dB between S₂₁ and S₁₂ over a frequency band of 3 GHz (from 36.5 to 39.5 GHz) were realised for a three-port MMFCL circulator     

Topology Analysis and Design of Passive HEMT Millimeter-Wave Multiple-Port Switches

This paper discusses different topologies for millimeter-wave (MMW) multiple-port switches, and analyzes the insertion loss, isolation, and limitation of bandwidth. It is observed the performances of a MMW multiple-port switch are decided by both multiple-port topology and the structure of the constituted unit single-pole-single-throw switches, but dominated by its topology. To verify the analysis, two types of multiple-port switch are designed, one is a distributed switch and the other is based on a filter-integrated switch, using different topologies. The net-type multiple-port topology based on a distributed switch demonstrates a measured insertion loss of 4–5 dB with isolation better than 25 dB in 48–65 GHz. In 43–66 GHz, the binary-ring multiple-port topology based on a filter-integrated switch shows a measured insertion loss of 3–4.5 dB with isolation better than 30 dB.