Relation between light trapping and surface topography of plasma textured crystalline silicon wafers

Currently, in the photovoltaic industry, wet chemical etching technologies are used for saw damage removal and surface texturing. Alternative to wet chemical etching is plasma etching. However, as for example, the linear microwave plasma technique, developed by Roth&Rau, has not been implemented in the photovoltaic industry for etching, because of the very low etch rate (<1 µm/min) and the high cost of ownership related to the etching process. In this study, different front surface textured crystalline silicon wafers obtained by means of the linear microwave plasma technique and the expanding thermal plasma technique are investigated in terms of weighted reflection by using reflectometry (250–1200 nm) to study the optical properties of the textures in detail. In addition, atomic force microscopy is used to measure the surface topography to determine statistical roughness parameters, as presented in this paper. Effective light trapping can be obtained by multiple reflections as well as by a graded layer, which leads to a diffuse front surface, or a combination of both. A graded layer can be described as a smooth transition with increasing refractive index from air to silicon with typical thickness of (200 ± 50) nm. We have found that the average plane tilt angle correlates to the measured weighted reflection. Moreover, we can determine from the aspect ratio whether the light trapping is effective by multiple reflections. From the roughness exponent, which is a measure for the micro roughness, we can determine whether the light trapping is effective by a graded layer. Copyright © 2013 John Wiley & Sons, Ltd.     

Dry phosphorus silicate glass etching for multicrystalline silicon solar cells

A dry plasma etching process for phosphorus silicate glass (PSG) in a SiN‐PECVD batch reactor is developed. In the same reactor PSG etching and anti‐reflective coating (ARC) can be performed successively. To demonstrate industrial feasibility, screen‐printed solar cells are manufactured and compared with cells prepared by a standard wet chemical process. Copyright © 2003 John Wiley & Sons, Ltd.     

The effect of cathode materials on reactive ion etching of silicon and silicon dioxide in a CF4 plasma

Silicon and silicon dioxide have been Reactive Ion Etched in a CF₄ plasma using a diode sputtering configuration to achieve etching. Pressures ranged from 20 to 100 millitorr and power densities to the RF cathode were between 0.1 and 1.0 W/cm². The effect of cathode material on the quality of etched surfaces and on etch rates has been investigated. It has been observed that the etch rate of silicon decreases as the area of silicon exposed to the plasma is increased and that this silicon loading effect is strongly influenced by the material covering the balance of the cathode. For instance, the silicon loading effect is much more pronounced when silicon dioxide rather than aluminum is used to cover the balance of the cathode. This silicon loading effect was investigated further by varying RF power. It was found that loading a silicon dioxide covered cathode with silicon wafers decreases the dependence of silicon etch rate on power. The silicon dioxide etch rate and its dependence on RF power are the same whether silicon, silicon dioxide or aluminum is used to cover the balance of the cathode. Possible explanations for these experimental results will be discussed.     

小型等离子清洗/刻蚀机的应用

综述了等离子体产生的原理、小型等离子清洗/刻蚀机的特点以及在各加工行业的应用,特别是其在科学研究领域的独特功能:等离子清洗、刻蚀、等离子镀、等离子涂覆、等离子灰化和表面改性等;论述了小型等离子清洗/刻蚀机在TEM、SEM、电镜等方面的特殊应用,并讨论了等离子处理的特殊性及其在现代科学研究中的不可替代性。     

Study on nano-pores enlargement during Ag-assisted electroless etching of diamond wire sawn polycrystalline silicon wafers

In this paper, diamond wire sawn (DWS) mc-Si wafers were textured using Ag-assisted electroless etching (AgNO₃+HF+H₂O₂) combined with an auxiliary etching (HF+HNO₃). The evolution mechanism of the surface texture structure on the wafers was investigated in detail. It was noted that during the AgNO₃+HF+H₂O₂ etching, there existed the difference in the axial direction and the depth of nano-pores among different grains. This difference made the different grains form different texture structures during the following HF+HNO₃ etching. Since the etching of poly-silicon is isotropic in HF+HNO₃ solution, it was the AgNO₃+HF+H₂O₂ etching rather than the auxiliary etching (HF+HNO₃) that resulted in the different texture structure among different grains. During the HF+HNO₃ etching, the diameter of the etched pits on the wafer surface was enlarged quickly through the adjacent pits combination. The depth of the etched pits hardly increased because the top and bottom of pits were etched at the same time. As a result, the ratio of depth to diameter of the pits decreased. The texture difference among the grains and decrease of the ratio of depth to diameter of the pits limited the further enhancement of the PV efficiency of mc-Si solar cell. Therefore, the improving the uniformity of AgNO₃+HF+H₂O₂ etching for the different crystal orientation grains and obtaining a large ratio of depth to diameter of the pits during the HF+HNO₃ etching are two critical issues to enhance the PV efficiency of mc-Si solar cell.     

Reactive ion etching of dielectrics and silicon for photovoltaic applications

This paper investigates the reactive ion etching of SiO₂, Si₃N₄, and Si using CHF₃/O₂ plasma. In particular, we have characterized the time and rf power dependence of the carrier lifetimes in n‐ and p‐type FZ Si. The time dependence of reactive ion etching (RIE) at different rf powers provide insight into the two competing processes of damage accumulation and damage removal in the near‐surface region of the Si during plasma etching. The carrier lifetime, measured using the quasi‐steady‐state photoconductance (QSSPC) technique, has a quadratic dependence on the rf power, which can be related to changes in the dc self‐bias generated by the plasma at different rf powers. The change in carrier lifetime is similar in both n‐ and p‐type Si of the same doping concentration. Using this fact, together with the electronic properties of defects obtained by deep level transient spectroscopy (DLTS), we have modeled the injection‐dependence of the measured carrier lifetimes using the Shockley–Read–Hall model. The isochronal annealing behavior of plasma etched Si has also been studied. Copyright © 2006 John Wiley & Sons, Ltd.     

电压对N型宏孔硅阵列光电化学腐蚀的影响

研究了电压对宏孔硅阵列光电化学腐蚀的影响. 根据空间电荷区理论、N型硅片在HF酸溶液中I-V扫描曲线、不同电流密度条件下硅阳极氧化反应机理,系统地分析研究了腐蚀电压对宏孔硅阵列形貌的影响.研究结果表明：电压升高使孔型变差,电压降低则盲孔率提高,腐蚀电压恒定、长时间腐蚀孔将逐渐分叉。根据理论分析,优化了工艺参数,制备出高长径比宏孔硅阵列结构,孔深度为317m,方孔边长为3m,长径比为105。     

Influence of voltage on photo-electrochemical etching of n-type macroporous silicon arrays

The influence of voltage on photo-electrochemical etching(PEC) of macroporous silicon arrays(MSA) was researched.According to the theory of the space charge region,I-V scan curves and the reaction mechanism of the n-type silicon anodic oxidation in HF solution under different current densities,the pore morphology influenced by the working voltage were studied and analyzed in detail.The results show that increasing the etching voltage will lead to distortion of the pore morphology,decreasing etching volta...     

Photoelectrochemical etching of uniform macropore array on full 5-inch silicon wafers

We analyze the two main factors causing non-uniformity of the etched macropore array first,and then a novel photoelectrochemical etching setup for large area silicon wafers is described.This etching setup refined typical etching setups by a water cooling system and a shower-head shaped electrolyte circulator.Experimental results showed that the uniform macropore array on full 5-inch n-type silicon wafers could be fabricated by this etching setup.The morphology of the macropore array can be controlled by ...     

光电化学刻蚀法在整个5英寸硅片上制作均匀深孔阵列

在整个大面积硅片上制作均匀的深孔阵列是光电化学刻蚀中的一大难题。本文中我们首先详细分析了造成深孔阵列不均匀性的两个主要因素,然后提出了一种适合于大面积硅片深刻蚀的新型光电化学刻蚀装置。这套装置通过一个独特的水冷系统和一个花洒状的循环器对传统的光电化学刻蚀装置进行了改进。实验结果显示,借助这套装置能够在整个5英寸硅片上制作出均匀的深孔阵列。深孔阵列的形貌可以通过改变相应的刻蚀参数来进行调整。     

Identification of subsurface damage of 4H-SiC wafers by combining photo-chemical etching and molten-alkali etching

In this work, we propose to reveal the subsurface damage (SSD) of 4H-SiC wafers by photo-chemical etching and identify the nature of SSD by molten-alkali etching. Under UV illumination, SSD acts as a photoluminescence-black defect. The selective photo-chemical etching reveals SSD as the ridge-like defect. It is found that the ridge-like SSD is still crystalline 4H-SiC with lattice distortion. The molten-KOH etching of the 4H-SiC wafer with ridge-like SSD transforms the ridge-like SSD into groove lines, which are typical features of scratches. This means that the underlying scratches under mechanical stress give rise to the formation of SSD in 4H-SiC wafers. SSD is incorporated into 4H-SiC wafers during the lapping, rather than the chemical mechanical polishing (CMP).     

High selectivity plasma etching of InN over GaN

Etch selectivities for InN over GaN as high as 40 and 100 are achieved in BBr₃/Ar and BI₃/Ar, respectively, under inductively coupled plasma conditions. Previous work on Cl₂-based plasma chemistries has produced selectivity in the reverse direction, i.e., GaN over InN, and therefore the introduction of these new Br₂- and I₂-based mixtures facilitates device fabrication involving double heterostructures of GaN/In_xGa_1−xN/GaN. Selectivities up to 10 for InN over the common mask materials SiO₂ and SiN_x were obtained in both BI₃ and BBr₃.     

Influence of etching current density on the morphology of macroporous silicon arrays by photo-electrochemical etching

Macroporous silicon arrays(MSA) have attracted much attention for their potential applications in photonic crystals,silicon microchannel plates,MEMS devices and so on.In order to fabricate perfect MSA structure,photo-electrochemical (PEC) etching of MSA and the influence of etching current on the pore morphology were studied in detail.The current-voltage curve of a polished n-type silicon wafer was presented in aqueous HF using back-side illumination.The critical current density J_(PS) was discussed and ...     

电流密度对光电化学腐蚀宏孔硅阵列形貌的影响

宏孔硅阵列(MSA)在光子晶体、硅微通道板、MEMS 器件等领域应用前景广阔,引起人们广泛关注。为制备理想的MSA结构,本文开展了MSA光电化学方法腐蚀实验,重点研究了腐蚀电流密度对宏孔形貌的影响。给出了n型硅抛光片背面光照情况下在氢氟酸溶液中的电流-电压扫描曲线,讨论了临界电流密度JPS的意义和MSA稳定生长的基本电流密度条件。提出了一种间接地测量JPS与腐蚀时间关系的方法,并根据JPS的测量结果调整腐蚀电流,实现了理想的MSA等径生长,制备出孔深度为295m,长径比为98的MSA结构。     

The influence of plasma etching on trap levels in InP

Electroreflectance (ER) and deep level transient spectroscopy (DLTS) were carried out to characterize the effects of CF₄ plasma etching on defect levels in InP. Different chamber gas pressures were conducted to study effects on the etching result. Similar ER spectra were obtained from the starting InP wafer and the wafer after plasma etching plus rapid thermal annealing (RTA) which showed good restoration of material properties by RTA. Two impurity of structural related features, T1 and T2, were observed from these ER spectra at energy positions about 0.112 and 0.178 eV below bandgap. Two trap levels, El and E2, with activation energy 0.15 and 0.55 eV, were detected from the initial wafer by DLTS. Trap El may correlate with the Tl and T2 levels observed by ER. Similar traps were found in plasma etched samples after rapid thermal annealing with one of the DLTS peaks labeled E2 shifted to the higher temperature side as the plasma etching chamber pressure increased. We identified El to be a residual electron trap from material growth and E2 to be an interface trap arising from Schottky diode fabrication.     

Antireflective structures in CdTe and CdZnTe surfaces by ECR plasma etching

A rigorous coupled-wave analysis procedure has been used to design structures which can be embedded in Cd(Zn)Te surfaces to make them antireflective in the 8–14 m spectral region. Gray scale lithography was used to produce these patterns in photoresist layers. High fidelity transfer of patterns into Cd(Zn)Te surfaces was accomplished by utilizing an electron cyclotron resonance plasma with etch selectivity values in the range of 6.7–13.3. Transmission values at patterned surfaces were measured to be as high as 99.3%.     

Inductively coupled plasma etching of HgCdTe

The high-density inductively coupled plasma (ICP) etching technique has been applied to HgCdTe. The HgCdTe etch rate was studied as a function of key process variables commonly used in high-density plasma etching: chamber pressure, direct current (DC) bias, and ICP-source power. Mesa profiles were characterized using scanning electron microscopy (SEM), and the profiles for the process conditions used were found to be compatible with fabrication procedures for HgCdTe infrared focal-plane arrays (FPAs). The etch uniformity was measured to be better than 5% over a diameter of 6-in.     

Room temperature wafer bonding of silicon, oxidized silicon, and crystalline quartz

The use of plasma immersion as preparation for room temperature wafer bonding has been investigated. Silicon wafers have been successfully bonded at room temperature after exposure to oxygen or argon plasma. Oxidized silicon wafers and crystalline quartz have been bonded after exposure to oxygen plasma. The bonded interfaces exhibit very high surface energies, comparable to what can be achieved with annealing steps in the range of 600–800°C using normal wet chemical activation before bonding. The high mechanical stability obtained after bonding at room temperature is explained by an increased dynamic in water removal from the bonded interface allowing covalent bonds to be formed. Electrical measurements were used to investigate the usefulness of plasma bonded interfaces for electronic devices.     

多孔硅层湿法腐蚀现象的研究

阳极氧化法制备的多孔硅层分别经 1% HF、 1% NH3 / H2 O2 和 0 .0 5 % Na OH三种溶液在室温下进行湿法腐蚀 ,并用傅里叶变换红外光谱 (FTIR)和扫描电子显微镜 (SEM)对其变化进行了研究。腐蚀后多孔硅的表面形貌出现明显的刻蚀现象。红外吸收光谱表明 ,在用 1% NH3 / H2 O2 溶液腐蚀时 ,多孔硅层中 Si- O键和 Si- H键的强度增加 ,H- O键的强度下降 ;用 1% HF溶液和 0 .0 5 % Na OH溶液的腐蚀结果正好相反。 0 .0 5 %Na OH溶液对多孔硅层的腐蚀现象类似于强碱性溶液对单晶硅腐蚀表现出的各向异性 ,对多孔硅层厚度的腐蚀速度比 1% HF溶液的高     

Formation and characterization of porous silicon films obtained by catalyzed vapor-chemical etching

Porous silicon films obtained by the metal-assisted vapor-chemical etching technique have been characterized. For the film formation, epitaxial (100) N/P⁺, 1–5 Ω cm monocrystalline silicon wafers were used. The vapors of an alcoholic solution of H₂O₂/HF were drawn towards the silicon surface, which was previously covered with a thin layer of gold (~8 nm) for the catalytic etching. For the optical and morphological characterization of porous films, Raman spectroscopy, Ellipsometry, FTIR spectroscopy and SEM images were used. The films thickness kept a linear relationship with etching time. A porosity gradient from the surface towards the interface (65% to 12%) was observed in the films. A large amount of Si–H bonds as related to O–Si–O bonds were observed and the pore size depends on the HF concentration. Irregular morphology was found in films formed with 50% HF.