Study of diffusion barrier properties of ionized metal plasma (IMP) deposited TaN between Cu and SiO2

The diffusion barrier properties of IMP deposited TaN between Cu and SiO₂ have been investigated in the Cu (200 nm)/TaN (30 nm)/SiO₂ (250 nm)/Si multi-layer structure. The IMP-TaN thin film shows better Cu diffusion barrier properties than chemical vapor deposition (CVD) and conventional physical vapor deposition (PVD) deposited TaN films. The thermal stability was evaluated by electrical measurement and X-ray diffraction (XRD) analysis. As a main part of thermal stability studies, the atomic intermixing, new compound formation and phase transitions in the test structure were also studied. Furthermore, a failure mechanism was also examined by X-ray diffraction (XRD), scanning electron microscopy (SEM), atomic force microscopy (AFM), secondary ion mass spectroscopy (SIMS) and Rutherford backscattering spectroscopy (RBS) in conjunction with electrical measurements. The 30 nm thick IMP-TaN was found to be stable up to 800°C for 35 min.     

Formation of Ti diffusion barrier layers in Thin Cu(Ti) alloy films

In order to study a formation mechanism of thin Ti-rich layers formed on the surfaces of Cu(Ti) wires after annealing at elevated temperatures, the 300-nm-thick Cu(Ti) alloy films with Ti concentration of 1.3 at.% or 2.9 at.% were prepared on the SiO₂/Si substrates by a co-sputter deposition technique. The electrical resistivity and microstructural analysis of these alloy films were carried out before and after annealing at 400°C. The Ti-rich layers with thickness of ∼15 nm were observed to form uniformly both at the film surface and the substrate interfaces in the Cu(2.9at.%Ti) films after annealing (which we call the self-formation of the layers) using Rutherford backscattering spectrometry (RBS) and transmission electron microscopy (TEM). Both the resistivities and the microstructures of these Cu(Ti) films were found to depend strongly on the Ti concentrations. The resistivities of the films decreased upon annealing due to segregation of the supersaturated Ti solutes in the alloy films to both the top and bottom of the films. These Ti layers had excellent thermal stability and would be applicable to the self-formed diffusion barrier in Cu interconnects of highly integrated devices. The selection rules of the alloy elements for the barrier self-formation were proposed based on the present results.     

Cu contact on NiSi/Si with thin Ru/TaN barrier

Thin Ru(5 nm)/TaN(15 nm) bi-layer was sputtered on the NiSi/Si substrate as a diffusion barrier in the copper contact structure. The barrier properties were investigated through X-ray diffraction (XRD), X-ray photoelectron spectroscopy (XPS), transmission electron microscopy (TEM), energy dispersive X-ray (EDX) and electrical measurement. The whole Cu/Ru/TaN/NiSi/Si structure has a good thermal stability until after annealing at 450 °C. The Schottky barrier measurement shows that the leakage current increases after 450 °C annealing and after 500 °C annealing the barrier fails. Failure mechanism of the barrier stack is discussed.     

Characterization of sputtered Ta-C-N film in the Cu/barrier/Si contact system

Characterization of sputtered tantalum carbon nitride (Ta-C-N) film in Cu/barrier/Si system was reported for the first time. With a 50∶50 wt.% TaC target and an optimum N₂/Ar flow rate (in sccm) ratio of 2/24, a 600 Å-thick sputtered Ta-C-N layer was shown metallurgically stable up to 650°C annealing for 30 min, which is about 100°C higher as compared to the case without nitrogen doping. Cu diffusion through the local defects or grain boundaries of the Ta-C-N barrier layer into Si substrate is the dominant factor responsible for the failure of the Ta-C-N barrier layer after high temperature annealing.     

Photoluminescent properties of ZnO thin films grown on SiO2/Si(100) by metal-organic chemical vapor deposition

We report on the photoluminescent (PL) properties of ZnO thin films grown on SiO₂/Si(100) substrates using low pressure metal-organic chemical vapor deposition. The growth temperature of the films was as low as 400°C. From the PL spectra of the films at 10–300 K, strong PL peaks due to free and bound excitons were observed. The origin of the near bandedge emission peaks was investigated measuring temperature-dependent PL spectra. In addition, the Zn O films demonstrated a stimulated emission peak at room temperature. Upon illumination with an excitation density of 1 MW/cm², a strong, sharp peak was observed at 3.181 eV.     

Study on ta diffusion barrier in Al/Si system

The property of Ta as a diffusion barrier is studied for Al/Ta/Si structure. Interfacial reactions of Al(180 nm)/Ta(130 nm)/Si and Al(180 nm)/Ta(24 nm)/Si, in the temperature range 450∼600°C for 30 min, have been investigated. In Al/Ta(130 nm)/Si system, which is Ta-excess case, Al₃Ta is formed at 500°C. At 575°C, TaSi₂ is formed at the interface of Ta Si. At 600°C, after Al₃Ta decomposes at the interface of Al₃Ta TaSi₂, free Ta is bonded to TaSi₂ with the supply of Si from Si substrate and free Al diffuses through TaSi₂, resulting in Al spiking. In Al/Ta(24 nm)/Si system, which is Al-excess case, Al₃Ta is formed at 500°C. At the same temperature of 500°C, after Al₃Ta decomposes at the interface of Al₃Ta/Si, free Ta reacts with Si to form TaSi₂ and free Al diffuses to Si substrate, resulting in Al spiking. The results of interfacial reactions can be understood from the calculated Al-Si-Ta ternary phase diagram. It can be concluded that the reaction at Al/Ta should be suppressed to improve the performance of Ta diffusion barrier in Al/Si system.     

Organic thin film transistors with a SiO2/SiNx/SiO2 composite insulator layer

We have investigated a SiO₂/SiN_x/SiO₂ composite insulation layer structured gate dielectric for an organic thin film transistor（OTFT） with the purpose of improving the performance of the SiO₂ gate insulator. The SiO₂/SiN_x/SiO₂ composite insulation layer was prepared by magnetron sputtering.Compared with the same thickness of a SiO₂ insulation layer device,the SiO₂/SiN_x/SiO₂ composite insulation layer is an effective method of fabricating OTFT with improved electric characteristics and decreased leakage current.Electrical parameters such as carrier mobility by field effect measurement have been calculated.The performances of different insulating layer devices have been studied,and the results demonstrate that when the insulation layer thickness increases,the off-state current decreases.     

新型的形状记忆合金／硅薄膜微驱动器

介绍了一种用硅微加工技术制作的ＮｉＴｉ／Ｓｉ 薄膜结构的双向微驱动器。它利用ＮｉＴｉ 形状记忆合金薄膜（ＳＭＡ） 大的相变回复应力和Ｓｉ 衬底膜的反偏置力产生有一定位移量的双向运动。对ＮｉＴｉ 薄膜进行合理的图形化后使得驱动器位移量增大,双向效应显著,响应速度提高。同时图形化后的ＮｉＴｉ 膜也是加热电阻,使驱动结构简单,所需功率减少。驱动器实际驱动面积为３ ×３ｍ ｍ２ 厚度为２０μｍ 。可产生的最大位移为５０μｍ ,最高驱动频率可达１００Ｈｚ。驱动功率可减小到２００ｍ Ｗ。经过１０００ 万次振动后,驱动膜无开裂,性能正常。它已被成功的应用于压缩型微泵,该泵最大流量达３４０μＬ／ｍｉｎ 。     

Al薄膜对(002)ZnO/Al/Si结构基片中ZnO薄膜特性影响的实验研究

采用射频磁控溅射法沉积制备了(002)ZnO/A l/Si复合结构。研究了Al薄膜对(002) ZnO/Al/Si复合结构的声表面波器件(SAWD)基片性能影响以及当ZnO 薄膜厚度一定时的Al膜最佳厚度。采用X射线衍射(XRD)对Al和ZnO薄膜进行了结构表征 ,采用 扫描电镜(SEM)对ZnO薄膜进行表面形貌表征,并从薄膜生长机理角度进行了分析。结果 表明,加Al薄膜有利于ZnO薄膜按(002)择优取向生长,并且ZnO 薄膜的结晶性能提高;与(002)ZnO/Si结构基片相比,当Al薄膜 厚为100nm时,(002)ZnO/Al/Si结构中ZnO薄 膜的机电耦合系数提高 了65%。     

Chromium thin film as a barrier to the interaction of Pd2Si with Al

Backscattering spectrometry with 2.3 and 2.0 MeV ⁴He⁺ have been used to study the role of Cr as a barrier in the interaction of Pd₂Si with Al. Samples of palladium silicide (Pd₂Si) grown on Si 〈100〉 single crystal and Al evaporated on top, in that order, showed a substantial intermixture of Pd₂Si and Al, and a non-uniform erosion of the Pd₂SiSi interface when heated between 300 and 450°C. With a thin layer of Cr(300–1500 Å) interposed between Pd and Al intermixing of Pd₂Si and Al was suppressed for temperatures up to 500°C and times up to 2 hr. In these samples distinct sublayers of Pd₂Si, CrSi₂ and CrAl_x (where the values of x depends on the relative thicknesses of Al and Cr) are formed. We have noted that whenever there is a thin unreached Cr layer the spectra of the distinct sublayers show sharp boundaries.     

Cross-interaction between Au and Cu in Au/Sn/Cu ternary diffusion couples

Both Au and Cu are so-called fast diffusers in Sn, and can diffuse very long distances in Sn in a relatively short time. In this study, the cross-interaction between Au and Cu across a layer of Sn was investigated through the use of the Au/Sn/Cu ternary diffusion couples. A 7-μm Au layer and a 100-μm Sn layer were electroplated over Cu foils to produce the Au/Sn/Cu diffusion couples. Aging at 200°C revealed that cross-interaction could occur in as short a time as 10 min. Evidence of this cross-interaction included the formation of (Cu_1−xAu_x)₆Sn₅ on the Au side of the diffusion couples as well as on the Cu side. The reaction products on the Au side included the Au-Sn binary compounds. Between the Au-Sn compounds and the Sn was (Cu_1−xAu_x)₆Sn₅. The reaction products on the Cu side initially was only (Cu_1−xAu_x)₆Sn₅, but a layer of Aufree Cu₃Sn eventually formed between (Cu_1−xAu_x)₆Sn₅ and Cu. A detailed atomic flux analysis showed that the Cu flux through the Sn layer was about 2–3 times higher than the Au flux at any moment. The results of this study show that the cross-interaction of Au and Cu in solders is extremely rapid, and cannot be ignored in those solder joints that have both elements present.     

Segregation of phosphorus to SiO2/Si(001) interfaces

Dopant atoms segregate to SiO₂/Si(001) interfaces. This causes problems during manufacture of submicron microelectronic devices. On the basis of ab initio calculations, we identify the physical mechanism by which P atoms are trapped and deactivated at SiO₂/Si(001). We argue that segregation can occur to defected as well as to defect-free interfaces. In the latter case, the interfacial stress stabilizes pairs of threefold-coordinated phosphorus atoms. Implications for Complementary Metal-Oxide-Semiconductor (CMOS) process design are discussed.     

Cu/Ta/SiO2/Si多层膜纳米压痕下微观结构的研究

Cu/Ta/SiO2/Si多层膜结构是目前集成电路制造工艺中的常见结构,其硬度与弹性模量通过纳米压入技术测得.为了表征纳米压痕下的形变微观区域,采用聚焦离子束加工出压痕截面,同时进行扫描电子、扫描离子显微观察,发现样品衬底发生开裂,多层膜结构出现分层现象.TEM分析表明分层出现在Ta/SiO2界面,说明这是该结构的一个薄弱环节.     

Effects of barrier layer and processing conditions on thin film Cu microstructure

The crystallographic texture and grain size of sputtered Cu films were characterized as a function of deposition temperature, barrier layer material, and vacuum conditions. For Cu deposited in a HV chamber, (111) Cu texture was found to weaken with increasing deposition temperatures on W, amorphous C and Ta barrier layers, each deposited at 30°C. Conversely, under identical Cu deposition conditions, texture was found to strengthen with increasing deposition temperature on Ta deposited at 100°C. Median Cu grain size varied parabolically with deposition temperature on all barrier layers and was slightly higher on the 100°C Ta at a given Cu deposition temperature, relative to the other underlayers. For depositions in an UHV chamber, Cu texture was found to strengthen with increasing Cu deposition temperature, independent of Ta deposition temperature. Median Cu grain size, however, was still higher on 100°C Ta than on 30°C Ta. The observed differences between the two different chambers suggest that the trend of weak texture at elevated deposition temperatures may be related to contamination. Characterization of the Ta underlayers revealed that the strengthened texture of Cu films deposited on 100°C Ta is likely related to textural inheritance.     

Electronic properties of Cu(In,Ga)Se2 solar cells on stainless steel foils without diffusion barrier

Compared with rigid glass, manufacturing of Cu(In,Ga)Se₂ (CIGS) solar cells on flexible stainless steel (SS) substrates has potential to reduce production cost because of the application of roll‐to‐roll processing. Up to now, high‐efficiency cells on SS could only be achieved when the substrate is coated with a barrier layer (e.g. SiO_x or Si₃N₄) for hindering the diffusion of impurities, especially Fe, into the CIGS layer. In this paper, the effect of these impurities on the electronic transport properties of the device is investigated. Using admittance spectroscopy, the presence of a deep defect level at around 320 meV is observed, which deteriorates the efficiency of the solar cells. Furthermore, it is shown that reducing substrate temperature during CIGS deposition is an effective alternative to a barrier layer for reducing diffusion of detrimental Fe impurities into the absorber layer. By applying a CIGS growth process for deposition at low substrate temperatures, an efficiency of 17.7%, certified by Fraunhofer Institute ISE, Freiburg, was achieved on Mo/Ti‐coated SS substrate without an additional metal‐oxide or metal‐nitride impurity diffusion barrier layer. Copyright © 2012 John Wiley & Sons, Ltd.     

Local structure around iron at the SiO2/Si interface

We have investigated the local structure around iron at the SiO₂/Si interface by the total-reflection fluorescence x-ray absorption fine structure technique, in conjunction with measurements of the angular dependence of x-ray fluorescence intensity. The Fe-O, Fe-Si and Fe-Fe bondings were observed around iron, in the layer formed at the SiO₂/Si interface. These results show the formation of iron silicate, consisting of iron, oxygen and silicon elements. The chemical state of iron was determined from the Fe-O bond-lengths. The Fe-valence is a mixture of Fe³⁺ and Fe²⁺, mostly Fe³⁺. These results indicate that the layer formed at the SiO₂/Si interface is iron silicate, in which a portion of Fe³⁺ ions were reduced.     

Si/SiO2和SiNx/SiO2多层膜的室温光致发光

采用射频磁控溅射法,制备了纳米Si/SiO2和SiNx/SiO2多层膜,得到强的可见光致发光,利用傅里叶红外吸收(FTIR)谱和光致发光(PL)谱,对其发光特性进行了研究,在374 nm和712 nm左右观察到强发光峰.用量子限制-发光中心(QCLC)模型解释了其可能的发光机制,认为发光可能源自于SiOx界面处的缺陷发光中心.建立了发光的能隙态(EGS)模型,认为440 nm和485 nm的发光源于N-Si-O和Si-O-Si缺陷态能级.     

Effect of barrier layers on BaTiO3 thin film capacitors on Si substrates

The choice of the bottom electrode or barrier layer plays an important role in determining the electrical and structural properties of metal/ferroelectric/metal thin film capacitors. A substantial improvement of the electrical and structural properties of the capacitors was found by using RuO₂ as a bottom electrode. Electrical measurement on a capacitor with a structure of BaTiO₃(246 nm)/RuO₂ (200 nm)/SiO₂/Si, where the BaTiO₃ thin film was deposited at room temperature, showed a dielectric constant of around 15, leakage current density of 1.6 × 10⁻⁷A/cm² at 4 V, a dc conductivity of 9.8 × 10¹⁴S/cm, and a capacitance per unit area of 5.6 × 10⁴pF/cm². A similar structure but with polycrystalline BaTiO³ (273 nm) as the dielectric deposited at 680°C showed a dielectric constant of 290, leakage current density of 1.7 × 10⁻³A/cm² at 4 V, a dc conductivity of 1.2 × 10⁻⁸ S/cm, and a capacitance per unit area of 9.4 × 10⁵ pF/cm². Scanning electron microscopy analysis on the films showed differences in the microstructure due to the use of different bottom electrode materials, such as RuO₂ or Pd.     

SiO2/Si光子晶体透射特性的数值研究

为了了解电磁波在2维三角晶格SiO2/Si光子晶体的传输特性,利用时域有限差分方法进行了数值模拟和计算,并研究了SiO2介质柱的形状和入射波模式的变化对晶体透射特性的影响.计算后得到多种情况下该光子晶体的透射率与入射光频率的关系曲线.结果表明,禁带的宽度和位置与构成光子晶体中SiO2的形状有关,SiO2柱半径变大则禁带变宽且禁带中心频率变大,半径为0.4a时,禁带宽度达到最大值.与TM模相比,TE模入射时,光子晶体更易形成禁带.这为光子晶体的实验制作和应用提供了理论依据.