A simple and efficient honey bee mating optimization approach to performance characterization of a microwave transistor for the maximum power delivery and required noise

In this work, a simple, efficient and multi objective Honey Bee Mating Optimization (HBMO) is presented for the performance characterization of a microwave transistor to deliver maximum power to the load with the required noise F_req. Thus all the possible compatible {F_req ≥ F_min, V_out = 1, G_Tmax} triplets and the corresponding source Z_S and load Z_L = Z^*_out (Z_S) terminations can be obtained in the device operation domain of (V_DS, I_DS and f) without working analytically for the nonlinear performance and stability equations. HBMO is a recently emerging meta‐heuristic algorithm that combines the powers of the simulated annealing and genetic algorithms. Here, a microwave transistor is chosen as a case study, effectiveness and efficiency of the HBMO are shown by comparing its performance to those of the standard meta‐heuristics Genetic and Particle Swarm algorithms and the mean cost results for 10 runs are found to be 0.22, 1.65 and 1.85, respectively, for the comparable execution times. Furthermore, all the numerical results are found to agree with their analytical counterparts obtained using the microwave, linear circuit and noise theories. The Feasible Design Target Space FDTS can be built by the cross relations among all the possible compatible {F_req ≥ F_min, V_out = 1, G_Tmax} triplets together their terminations {Z_S, Z_L = Z^*_out (Z_S)} covering all the possible amplifier designs where both noise figure and output power are at a premium. Copyright © 2015 John Wiley & Sons, Ltd.     

Full flexible performance characterization of a feedback applied transistor with LNA applications

In this paper, the full flexible performance characterization of a transistor with series inductive/parallel capacitive feedback is carried out in terms of LNA applications. For this purpose, the input VSWR V_in–maximum available gain G_Tmax variations are constructed for a high technology low-noise transistor that is subject to the required noise figure F_req(f) ≥ F_min(f) along the device's operation band depending on the feedback. These V_in–G_Tmax variations result in the application of a design chart that indicates which value of feedback can be applied within which region of the operation band with the improvable trade-off between the V_in and output VSWR V_out for the Freq(f) ≥ Fmin(f). Following this, the optimum trade-off between V_in and V_out is made for the necessary operation frequency regions using the load impedance Z_L as an instrument with the predetermined source impedance Z_S. Finally, the LNA applications of a series inductive/parallel capacitive feedback applied transistor with the optimum V_in, V_out, and G_T subject to Freq(f) ≥ Fmin(f) ≥ are also presented as distributed across the entire bandwidth in the different operation bands. It can be concluded that this rigorous work will enable a designer to utilize the entire operation frequency band of transistor through using only a single series inductive/parallel capacitive feedback for the LNA designs of Freq(f) ≥ Fmin(f) with the optimum trade-offs among its performance measures.     

Competitive evolutionary algorithms for building performance database of a microwave transistor

In this work, the simultaneous trade‐off relations among the noise figure F, gain G_T, input V_in, and output V_out VSWRs of a microwave transistor operated at a certain (V_DS, I_DS, f) condition are obtained fast and as accurate as the corresponding analytical results using multiobjective optimization process without any need for expertise on the microwave device, circuit, and noise. Three powerful evolutionary algorithms, cuckoo search, firefly, and differential evolution, are implemented comparatively as a study case to obtain the trade‐off relations of a typical low‐noise amplifier transistor NE3511S02 for its operation between 9 and 17 GHz at V_DS = 2 V and I_DS = 10 mA. Finally, differential evolution is found as the most successful algorithm to demonstrate the typical trade‐off relations of NE3511S02. It can be concluded that these trade‐off relations being obtained by using a signal and noise model of the transistor enable performance database covering all the (F ≥ F_min, G_T, V_in ≥ 1, V_out ≥ 1) quadruples with their (Z_S, Z_L) termination pairs using solely an evolutionary optimization process. Thus, a small signal transistor can be identified by its performance database to be used in the design optimization of high‐performance low‐noise amplifiers with the full device capacity.     

扩频测控系统抗窄带噪声性能分析

对直接序列扩频系统抗窄带噪声性能进行了分析,并指出直接序列扩频系统对窄带噪声的抑制能力,是与窄带噪声相对于扩频系统的载波位置密切相关,且有跳变点,所得分析结果,对于扩频系统的设计与应用具有指导意义。     

Uncertainty analysis of a commercial microwave noise temperature measurement system using Monte Carlo simulations

A Monte Carlo simulation, a non‐linear fitting routine, and an uncertainty extraction routine are used to analyze the uncertainty of a commercial microwave noise temperature measurement system. Measured data for an S/C band synthetic FET‐based cold load, two microwave solid‐state noise diode hot loads, and an ambient load is obtained, and the measurement system uncertainties are subsequently assessed using different DUTs. An estimation of the measurement system uncertainties is determined for a range of DUT temperatures, and the results are consistent with the noise temperature uncertainties calculated from the measured data at the same frequency. Copyright © 2010 John Wiley & Sons, Ltd.     

一种高增益级联微波放大器设计与实现

由于某型设备的微波小信号放大需求,需要设计一款高增益微波放大器。本文给出了一种增益大于100 dB的多级放大器设计思路及设计过程,针对此设计进一步讨论了前置放大器、中间级放大器、末级放大器及混频器等各单元的器件的选择,完成了电原理图的设计以及PCB板的布置,最后对该放大器的进行了实测,结果表明该放大器实际总增益在105±0.130.24 dB,增益精度<±0.5 dB,达到了设计要求。目前此放大器已运用于某型发信监测设备中并取得了良好的效果。     

微波噪声源定标方法及不确定度的分析

噪声系数测量的一个关键指标就是测量不确定度,测量时所用的噪声源的是引起噪声系数测量不确定度的一个明显因素。精确的噪声源的定标可使噪声系数的测量不确定度减至最低的程度,因此它是获得高质量的噪声系数测量的关键因素。本文介绍一种用N2002A噪声源定标装置[1]对微波噪声源超噪比定标的方法,全面分析了引起定标不确定度的因素。最终对微波智能噪声源做了测试,并给出测试结果。     

Analysis and suppression of high-frequency leakage current attributable to the parasitic capacitor of a transistor module

Recently, electromagnetic inference (EMI) and high-frequency leakage current are grave concerns for power supply authorities. Due to rapid switching of high current and high voltage, interference emission is a serious problem in many switching power circuits. However, high-frequency switching is necessary for the reduction of size and the improvement of performance of the products. Usually, EMI noise reduction is attempted using EMI filters and shielding products. But, in many cases, those trials resulted in unsatisfactory results because an analytical investigation was not performed. Recently, the analysis of high-frequency leakage current caused by the step change of common mode voltage produced by the PWM inverter was reported. But the other cause of high-frequency leakage current was not made clear. In this paper, it is clarified theoretically that the parasitic capacitors between the heat sink and the switching semiconductor devices cause high-frequency leakage current. Furthermore, this paper shows that equalization of the parasitic capacitors and increase of the impedance for grounding the heat sink at high-frequency range reduces high-frequency leakage current. Finally, those results are verified from simulation and bread board setup. © 1997 Scripta Technica, Inc. Electr Eng Jpn 119(2): 60–71, 1997     

Stochastic stability of a neural‐net robot controller subject to signal‐dependent noise in the learning rule

We consider a neural network‐based controller for a rigid serial link manipulator with uncertain plant parameters. We assume that the training signal to the network is corrupted by signal‐dependent noise. A radial basis function network is utilized in the feedforward control to approximate the unknown inverse dynamics. The weights are adaptively adjusted according to a gradient descent plus a regulation term (Narendra's e‐modification). We prove a theorem that extends the Yoshizawa D‐boundedness results to the stochastic setting. As in the deterministic setting, this result is particularly useful for neural network robot control when there exists bounded torque disturbances and neural net approximation errors over a known compact set. Using this result, we establish bounds on the feedback gains and learning rate parameters that guarantee the origin of the closed‐loop system is semi‐globally, uniformly bounded in expected value. Copyright © 2009 John Wiley & Sons, Ltd.     

Performance analysis and calculation of critical inductance and output voltage ripple of a simple non‐isolated multi‐input bidirectional DC‐DC converter

In this paper, a simple non‐isolated multiple input (MI) bidirectional DC‐DC topology is proposed which can operate in buck, boost, or buck‐boost modes. The proposed topology utilizes a battery pack to realize the bidirectional power flow operation especially when the input sources are non‐storable ones. The excess energy of input sources can be stored in the battery and be injected to the load, when required. Simultaneous or independent power transfer of input sources is also provided. For better evaluation, the proposed topology has been compared with several recently presented novel topologies, from view point of number of inductors, capacitors, switches, and diodes. Comparison results show that the proposed topology utilizes less number of components (switches, inductors, capacitors, and current sensors) which can reduce the size, cost, and complexity of converter. Different operational modes of the proposed topology (unidirectional buck, boost, buck‐boost modes, and bidirectional mode) have been presented. Also, boost mode of the proposed topology has been investigated in detail, from design point of view, and generalized relationships have been proposed for calculation of critical inductance (CI) and output voltage ripple (OVR) of proposed n‐input boost topology. To validate proposed theoretical concepts, the proposed topology has been modeled and simulated in PSCAD/EMTDC software, and the 3‐input boost version has been experimentally implemented. Simulation and experimental results confirm appropriate performance of the proposed topology.     

Automating the sizing of transistors in CMOS gates for low‐power and high‐noise margin operation

This paper presents an automatic method for sizing the transistors in CMOS gates. The method utilizes a feedback control system to efficiently optimize the transistor sizes in small and large fan‐in gates, with the primary goal of enhancing noise robustness (as characterized by the static noise margin). The gates retain their robustness under threshold‐voltage variations over a range of supply voltages. The optimized gates not only expend reduced power and energy, but also take up less area than the conventional ones. These multi‐faceted gains, however, do incur some performance loss. Copyright © 2014 John Wiley & Sons, Ltd.     

On frequency response and stability of an optical front–end with variable‐gain current amplifier using a bipolar junction transistor translinear loop

A comparative analysis of implementations of an optical front–end with variable transimpedance intended for optical storage systems in two different BiCMOS technologies is given in this article. The variable‐gain current amplifier within the optical front–end is designed by using a modified balanced type of the bipolar junction transistors translinear loop. The predictions of the optical front–end mathematical models are confirmed by the measured results. They show that a 0.6‐µm BiCMOS silicon technology implementation with worse bipolar junction transistor parameters (unity‐gain frequency, current gain β, and the Early voltage) gives much better stability than a 0.35‐µm BiCMOS silicon‐germanium technology implementation. As a consequence, the useful measured transimpedance dynamic range of the proposed optical front–end is 17.5 times larger in the 0.6‐µm BiCMOS silicon technology than that in the 0.35‐µm BiCMOS silicon‐germanium technology. Copyright © 2012 John Wiley & Sons, Ltd.     

基于下垂控制的单台换流器-无穷大系统数学模型及直流系统稳定的解析条件

基于功率-电压下垂控制的换流器因其较好的控制灵活性在多端直流输电系统中的应用日益广泛,同时也为直流电网稳定运行带来了新的挑战.利用单输入单输出分析法研究了单台并网换流器直流系统的稳定性问题.首先,建立系统扰动后的直流电压变化量和直流电流变化量间的传递函数.其次,利用Routh判据得到不同控制模式下系统的稳定判据.然后,...     

Origin of common-mode noise in two-dimensional finite-size circuit and reduction of the noise using a symmetric three-line circuit

In this paper, we investigate common-mode (CM) noise caused by a connection to a two-dimensional finite-size ground plane. Numerical calculations are conducted to visualize the time variation of potentials that leads to CM noise. A connection of the signal line to the ground plane, which is conventionally used in circuits, causes an imbalance in the circuit that makes the potential of the ground plane fluctuate, which results in CM noise. CM noise does not occur in a symmetric three-line circuit because the potential of the middle line is always kept at 0 V. Furthermore, the middle line prevents an externally induced potential fluctuation of the ground plane from being converted to a normal-mode voltage (i.e., CM noise).     

Numerical simulation and design of a new microwave annular waveguide plasma source—I: Simulations without the plasma parameters

A new microwave annular waveguide plasma source with slot antennas is introduced in this paper. The distributions of electromagnetic field within the rectangular waveguide and the annular waveguide are simulated and analyzed, and the relationship between the distributions of the electromagnetic field and the radius of the microwave reactor is investigated. In addition, HFSS microwave studio simulator is applied to carry out the final design. Both analysis calculation and numerical simulation of the electromagnetic field distributions for the waveguide and microwave annular waveguide plasma source are presented and they are in good agreement. Copyright © 2010 John Wiley & Sons, Ltd.     

A parallel prefiltering approach for the identification of a biased sinusoidal signal: Theory and experiments

The problem of estimating the amplitude, frequency, and phase of an unknown sinusoidal signal from a noisy‐biased measurement is addressed in this paper by a family of parallel prefiltering schemes. The proposed methodology consists in using a pair of linear filters of specified order to generate a suitable number of auxiliary signals that are used to estimate—in an adaptive way—the frequency, the amplitude, and the phase of the sinusoid. Increasing the order of the prefilters improves the noise immunity of the estimator, at the cost of an increase of the computational complexity. Among the whole family of estimators realizable by varying the order of the filters, the simple parallel prefilters of orders 2 + 2 and 3 + 3 are discussed in detail, being the most attractive from the implementability point of view. The behavior of the two algorithms with respect to bounded external disturbances is characterized by input‐to‐state stability arguments. Finally, the effectiveness of the proposed technique is shown both by comparative numerical simulations and by a real experiment addressing the estimation of the frequency of the electrical mains from a noisy voltage measurement. Copyright © 2015 John Wiley & Sons, Ltd.     

Increasing power efficiency in the design of a low power and low phase noise CMOS LC oscillator

This study developed a local oscillator (LO) with low phase noise and low power consumption. The proposed oscillator core comprises a pair of cross‐coupled transistors, which are fed by another pair of transistors that injects current at moments close to the peak of output voltage. The position of the current injection transistors, which are inserted in series with the cross‐coupled transistors, affects the waveform of current injected into an inductive–capacitive (LC) tank. Installing a capacitor on the source node of the cross‐coupled transistors increases the current injected into the LC tank and thereby augments the output voltage amplitude and power efficiency of the LO. The resonator phase shift and Q can be corrected by adjusting the source capacitance, which filters noise. These changes reduce the phase noise to ?123.4 dBc/Hz at a frequency offset of 1 MHz and improve oscillator performance with a figure of merit equal to ?193.5 dBc/Hz. To evaluate the LC tank, a 5 GHz LO was simulated at 1.8 V power supply and 2.5 mW power consumption. The simulation was conducted using a practical 0.18 complementary metal–oxide–semiconductor model manufactured by the Taiwan Semiconductor Manufacturing Company. The simulation results confirmed the analytical findings.     

电力线传输特性和噪声干扰对通信性能的相对影响

电力线载波通信技术是支撑智能电网信息传输的重要技术之一,但是电力线作为信息传输通道时具有复杂的传输特性和较多的噪声干扰。为分析电力线信道的频率选择性对通信性能的影响及其和信道噪声的相对作用,设计滤波器模拟具有不同频率选择性的电力线信道,用米德尔顿A类噪声模拟信道中不同强度的噪声,采用基于OFDM技术的G3-PLC标准建立窄带电力线载波通信系统模型进行仿真分析。结果表明：电力线载波通信中,低速率传输数据或信号带宽较小时噪声干扰比频率选择性对系统性能影响大。随着数据传输速率或信号带宽增加,信道的频率选择性对系统性能的影响逐步增大。该结论为设计和研究电力线载波通信系统提供了理论分析基础。     

积灰及迎面风速对直接空冷机组性能的影响

直接空冷凝汽器积灰和迎面风速降低是影响机组背压上升的主要因素,机组背压升高会影响机组出力。以某330 MW直接空冷机组为例,分析了积灰和迎面风速对传热系数和机组背压的影响规律,并提出了防治措施。结果表明：当积灰厚度达到1.0 mm时,机组背压由设计值34.0 kPa升高到49.0 kPa,机组功率降低了8.6 MW;迎面风速由设计值2.2 m/s降低到1.6 m/s,机组背压由设计值34.0 kPa升高到50.1 kPa,机组功率减小了9.4 MW。