可调频率跨导电容Chebyshev滤波器的设计及仿真

首先提出了一种新的跨导运放,其输入级采用了工作在线性区的MOS管作源极负反馈有源电阻实现其良好的线性度,输出级采用折叠式结构,并在电路中引入电压共模负反馈(CMFB)稳定其静态工作点。接着提出了一种新的利用开关电容技术调节跨导运放偏置电流值大小的电路,应用该电路可以精确调节跨导运放Gm值的大小,应用这些电路设计得到了四阶Chebyshev低通滤波器,并实现其频率的精确可调,0.35μm2层多晶硅,4层金属CMOS工艺Spicemodel仿真结果表明设计正确、有效。     

基于宽线性BOTA的新型通用滤波器设计

提出了一种CMOS实现的平衡输出跨导运算放大器(BOTA)电路模型,该模型结构简单,仅由一个跨导运放和一个可变换的电流增益模块级联构成,通过偏置电流调节跨导增益,使线性电压输入范围提高三个数量级。采用BOTA与接地电容实现了三输入单输出的二阶通用滤波器设计。结果表明,该滤波器0可独立调节,且与Q正交,实现了0线性可调的高Q滤波。用Pspice仿真软件证实了滤波器的陷波特性和带通特性,实现了高、低Q值的灵活调节。     

全差分可调频率四阶Chebyshev滤波器的实现

提出了一种新的全差分运算放大器,该运算放大器在具有电压共模负反馈的同时还具有电流共模负反馈,能较好地稳定其工作点。通过利用MOS管工作在线性区便能作可变电阻之用的特性,设计实现了基于R-MOSFET-C运放的全差分频率连续调节的四阶Chebyshev低通滤波器。该滤波器采用台湾联电(UMC)2层多晶硅、2层金属(2P2M)5V电源电压、0.5m CMOS工艺生产制造。其芯片面积大小为0.36mm~2,截止频率调节范围为20kHz到420kHz,输入信号频率在100kHz,2.5Vpp时的失真小于-65dB,功耗仅为16mW。     

应用于高Q跨导-电容带通滤波器的线性跨导运放设计

设计了一种具有高的直流增益的宽带线性全差分跨导运放.一方面,并联一个工作在线性区的场效应管来补偿直流三阶系数,得到了一种应用于连续时间滤波器、增加跨导器饱和区输入信号幅度的简单方法.另一方面,结合负电阻电路提高了输出阻抗,实现高的直流增益而不需要额外的内部结点,并减小了因有限直流增益和寄生电容引起的相位偏差.将此全差分跨导运放应用于0.18μmCMOS工艺二阶带通滤波器,在3.3V电源电压、输入峰峰值1V时,HSPICE仿真结果的总谐波失真小于40dB,中心频率为20MHz,3dB带宽为0.18MHz,即Q为110.     

基于双通路跨导运放的电压模DC/DC片内频率补偿电路

提出了一种新颖的电压模DC/DC频率补偿电路. 通过在内部跨导运放的两条小信号通路中构造阻容网络,此电路能够产生双零点以实现环路高稳定性. 由于其结构简单,易于完全集成,因此有效地减少了外围应用器件数目及印制板面积. 同时, 通过对跨导运放的优化设计进一步提高环路瞬态响应性能. 采用此电路的一款电压模DC/DC转换器已在一0.5 μm CMOS 工艺线投片,测试结果表明环路稳定性良好, 负载调整率及线性调整率均小于0.3%, 400 mA负载阶跃对应输出电压响应时间小于15 μs, 同时补偿器件面积小于裸片面积的2%, 印制板面积减小了11%. 整个芯片的效率高达95%.     

应用于高Q跨导-电容带通滤波器的线性跨导运放设计

设计了一种具有高的直流增益的宽带线性全差分跨导运放.一方面,并联一个工作在线性区的场效应管来补偿直流三阶系数,得到了一种应用于连续时间滤波器、增加跨导器饱和区输入信号幅度的简单方法.另一方面,结合负电阻电路提高了输出阻抗,实现高的直流增益而不需要额外的内部结点,并减小了因有限直流增益和寄生电容引起的相位偏差.将此全差分跨导运放应用于0.18μmCMOS工艺二阶带通滤波器,在3.3V电源电压、输入峰峰值1V时,HSPICE仿真结果的总谐波失真小于40dB,中心频率为20MHz,3dB带宽为0.18MHz,即Q为110.     

一种多输出压控电流差分跨导放大器的设计

提出了一种具有Z端复制输出、跨导可由电压调节的电流差分跨导放大器（MO-VCCDTA）。该电路采用低压高性能电流镜作为电流输入级,降低了消耗的电压余度、输入阻抗与传输误差;利用MOS管的线性组合,实现了可由电压控制跨导的跨导放大级。采用SMIC 0.18um CMOS工艺进行仿真,结果表明：在 0.9V电源电压下,电路的线性输入范围为-100uA-100uA,输入电阻约为10Ω;跨导值可在0.34mS-1.56mS内线性变化,Iz/Ii、Ix/Ii的-3dB带宽分别为131MHz、88MHz;电路总功耗为2.8mW。最后,仅采用两个该模块和两个接地电容得到了电流模式通用二阶滤波器。     

线性可调全差分OTA的实现

为了解决CMOS OTA跨导增益不能线性调节的问题,本文采用AB电流镜对NMOS和PMOS差分对管实现的基本OTA进行电流偏置,从而实现了一个跨导增益可以宽幅线性调节的全差分CMOS OTA电路。提出的OTA能够通过调节外部电流Iadj实现线性调节跨导增益,其误差小于2%,外部电流Iadj的调节范围为-40 A~40 A。OTA的差分输入电压摆幅为200mVp-p,输出电流的非线性度小于1.2%。电路的性能通过PSPICE仿真得到了验证。     

低功耗自适应跨导-电容带通滤波器电路实现

采用单层多晶硅3.3V,0.35μm CMOS数字工艺,实现了用于蓝牙系统的自适应带通滤波器,其中心频率为2MHz,带宽为1.2MHz,功耗为12mW.并对滤波器PLL自适应电路中压控振荡器(VCO)的谐振条件进行了研究,分析了VCO中运放寄生参数对谐振频率的影响.同时,用一种简单的跨导运放结构作为VCO中的负阻抗,解决了VCO振荡幅度限幅问题.     

低功耗自适应跨导—电容带通滤波器电路实现

采用单层多晶硅 3.3V,0 .35μm CMOS数字工艺 ,实现了用于蓝牙系统的自适应带通滤波器 ,其中心频率为2 MHz,带宽为 1.2 MHz,功耗为 12 m W.并对滤波器 PL L自适应电路中压控振荡器 (VCO)的谐振条件进行了研究 ,分析了 VCO中运放寄生参数对谐振频率的影响 .同时 ,用一种简单的跨导运放结构作为 VCO中的负阻抗 ,解决了VCO振荡幅度限幅问题 .     

高线性满摆幅输入度跨导器及其在gm-C带阻滤波器中的应用

介绍了一种利用MOS管线性区特性实现满摆幅输入的跨导器.通过分析电路中MOS管的二阶效应,利用差分放大器以负反馈形式接入偏置和输出端并联电流源的方法,对电路进行了结构优化,提高了电路的线性度,并降低了输出失调电流.模拟结果表明:跨导器总谐波失真可达到-59.2dB,输出失调电流136nA.用该跨导器组成的gm-C带阻滤波器工作在50Hz的中心频率时,陷波带宽33Hz,陷波深度-39.6dB,可应用于滤除信号中的50Hz市电干扰.     

一种面向多标准无线收发器的低功耗宽调谐范围基带滤波器设计

本论文提出了一种面向多标准收发器的具有精确片上调谐电路的低功耗宽调谐范围基带滤波器。设计的滤波器是由三级Active-Gm-RC类型的双二次单元级联组成的六阶巴特沃斯低通滤波器。采用改进的线性化技术来提高低通滤波器的线性度。论文提出了一种新的匹配性能与工艺无关的跨导匹配电路和具有频率补偿的频率调谐电路来增加滤波器的频率响应精度。为了验证设计方法的有效性,采用标准的130nm CMOS工艺对滤波器电路进行流片。测试结果表明设计的低通滤波器带宽调谐范围为0.1MHz-25MHz,频率调谐误差小于2.68%。滤波器在1.2V的电源电压下,功耗为0.52mA到5.25mA,同时取得26.3dBm的带内输入三阶交调点。     

A New Low Voltage CMOS Transconductor for VHF Filtering Applications

In this paper, a new differential input CMOS transconductor circuit for VHF filtering application is introduced. The new circuit has a very high frequency bandwidth, large linear differential mode input range and good common mode signal rejection capability. Using 0.35 m CMOS technology with 3 V power supply, the transconductor has a ±0.9 V linear differential input range with a –54 dB total harmonic distortion (THD) and more than 1 GHz – 3 dB bandwidth. The large signal DC analysis and small signal ac analysis derived by compact equations are in line with SpectreS simulation. A 3rd order elliptic low pass g _m-C filter with a cutoff frequency of 150 MHz is demonstrated as an application of the new transconductor.     

Optimizing CMOS Transconductor-C Filters for Low Power Wide Band Operation

A novel figure of merit to describe the bandwidth power efficiency of CMOS transconductors— is proposed and optimized for cross-coupled differential pair transconductor structures. The optimization is done in two different ways: univariable unconstrained and multivariable constrained. It is revealed that not only dc biases but also ac input phases can affect the bandwidth power efficiency of the transconductor. The bias voltages which can lead to best ratio at different ac phase combinations are obtained and presented in the article. HSPICE simulations are conducted to verify the theoretical predictions. On the basis of the cross-coupled differential pair transconductor, a biquadratic transconductor-C filter configuration is implemented. The frequency vs. power characteristic of the filter is studied for both optimally- and non-optimally-biased transconductor. It is shown that the optimization of the transconductor structure can result in performance improvement of the transconductor-C filter. The deviation of the optimal bias condition between the transconductor alone and the transconductor-C filter due to the inclusion of peripheray circuitries in the filter is discussed in the article.     

Performance analysis of a low power low noise tunable band pass filter for multiband RF front end

This paper presents a low power tunable active inductor and RF band pass filter suitable for multiband RF front end circuits. The active inductor circuit uses the PMOS cascode structure as the negative transconductor of a gyrator to reduce the noise voltage. Also, this structure provides possible negative resistance to reduce the inductor loss with wide inductive bandwidth and high resonance frequency. The RF band pass filter is realized using the proposed active inductor with suitable input and output buffer stages. The tuning of the center frequency for multiband operation is achieved through the controllable current source. The designed active inductor and RF band pass filter are simulated in 180 nm and 45 nm CMOS process using the Synopsys HSPICE simulation tool and their performances are compared. The parameters, such as resonance frequency, tuning capability, noise and power dissipation, are analyzed for these CMOS technologies and discussed. The design of a third order band pass filter using an active inductor is also presented.     

A <Emphasis Type="Italic">G</Emphasis><Subscript><Emphasis Type="Italic">m</Emphasis></Subscript><Emphasis Type="Italic">-C</Emphasis> continuous-time analog filter for IEEE 802.11 a/b/g/n wireless LANs

A CMOS transconductor for multi-mode wireless channel selection filter is presented. The linear transconductor is designed based on the flipped-voltage follower (FVF) circuit and an active resistor to achieve the transconductance tuning. The transconductance tuning can be obtained by changing the bias current of the active resistor. A third-order Butterworth low-pass filter implemented with the transconductors was designed by TSMC 0.18-μm CMOS process. The results show that the filter can operate with the cutoff frequency of 10–20 MHz. The tuning range would be suitable for the specifications of IEEE 802.11 a/b/g/n Wireless LANs under the consideration of saving chip areas. In the design, the maximum power consumption is 13 mW with the cutoff frequency of 20 MHz under a 1.8 V supply voltage.     

A new design of a linear local-feedback MOS transconductor for low frequency applications

For medical devices, low frequency and low power applications are required, and a transconductor which has a low transconductance is needed. A conventional current division scheme for the low transconductance wastes operating current. This paper proposes an improved local-feedback MOS transconductor operating in subthreshold region. The proposed transconductor is optimally designed using maximally flat approximation method, Newton-Raphson method, and Downhill simplex method. From the optimization, two optimum values are obtained. Characteristics of the proposed transconductor are confirmed by simulation. Transfer characteristics of the proposed transconductor are linear, and the power consumption of the proposed transconductor is 1/60 as compared with the presented transconductor using current division scheme. The CMRR is around 70 dB, and the THD is lower than ?55 dB under a condition of that the frequency of the sinusoidal input is 100 Hz. As a demonstration of an application, the proposed transconductor is applied to a low frequency second order Butterworth filter. A cutoff frequency of the filter is 100 Hz. Simulation results show validities and availability of the proposed transconductor.     

Programmable Baseband Filter for Multistandard Mobile Phones

This paper describes a channel selection filter for mobile communication systems using a direct downconversion architecture. The filter can be programmed to meet the requirements of different communicationstandards, including GSM (Global System for Mobile communication), WCDMA (Wideband Code DivisionMultiple Access), and Bluetooth. The filter includes a novel DC offset compensation circuit that combinesoffset sampling in GSM mode with high pass filtering in WCDMA mode. The filter can be programmed to different noiseperformance levels by programming the impedance level and power consumption of the input transconductor. The entirefilter consumes between 2.5 mW and 7.5 mW, depending on the desired noise performance. It is implemented in astandard 0.25 m CMOS process. A test circuit has been developed and fabricated and measurements show that boththe required programmability and the required transfer functions can be obtained from the designedcircuit.     

High-frequency voltage-controlled continuous-time lowpass filter using linearised CMOS integrators

The design and implementation of a continuous-time lowpass filter with voltage-controlled cutoff frequency and passband ripple is presented. The circuit uses a linearised CMOS transconductor as a basic integrating building block. A voltage-controlled phase-adjusting scheme is employed in the integrator to compensate for excess phase in the transconductance at high frequencies. The fabricated filter is capable of realising cutoff frequencies as high as 2 MHz and handles single-ended input signals up to 4 V p-p with less than 1% distortion.     

New CMOS Fully‐Differential Transconductor and Application to a Fully‐Differential Gm‐C Filter

A new CMOS voltage‐controlled fully‐differential transconductor is presented. The basic structure of the proposed transconductor is based on a four‐MOS transistor cell operating in the triode or saturation region. It achieves a high linearity range of ± 1 V at a 1.5 V supply voltage. The proposed transconductor is used to realize a new fully‐differential Gm‐C low‐pass filter with a minimum number of transconductors and grounded capacitors. PSpice simulation results for the transconductor circuit and its filter application indicating the linearity range and verifying the analytical results using 0.35 μm technology are also given.