Asynchronous transfer mode switching LSI chips with 10-Gb/s serialI/O ports

LSI chips were developed that fit on a switching fabric using chip-to-chip optical interconnections; they have 10-Gb/s serial input and output ports, which facilitates the layout of optically interfaced switching element modules. A test switching module composed of these chips was operated at 10.2 Gb/s without bit errors. Ultrahigh-speed switching LSI chips have been developed for a future asynchronous transfer mode (ATM) switching system with an over-Tb/s capacity. Their serial input and output ports facilitate chip-to-chip optical interconnection. Cell-dropper and crosspoint-router LSI chips, composing the core of the switching element, were fabricated by using GaAs LSI technology. A test switching module composed of these chips was operated at 10.2 Gb/s without bit errors     

Conductively connected charge-coupled device

A new kind of charge-coupled device, the conductively connected charge-coupled device (C4D) has been built and operated. This device is formed by providing self-aligned, source-drain diffusions (or implants) between adjacent, refractory electrodes of a two-phase, ion implanted-barrier CCD. These implants eliminate the inherently unstable exposed channel region presently found in CCD's with coplanar gates, without resorting to overlapping gates. Shift registers ranging from 16 to 128 b in length were evaluated and in spite of low mobilities (80 cm²/V.s) and low barrier heights (2-3 V), incomplete transfer losses of 0.2 percent per transfer were measured at 1 MHz clock frequency. Fabrication has been demonstrated to be quite compatible with p-channel refractory gate IGFET technology, and because the sensitive interelectrode region of the C4D is heavily doped, these devices should show the same reliability as conventional circuits made with the same technology.     

A 256-Mb DRAM with 100 MHz serial I/O ports for storage of movingpictures

A 256-Mb DRAM with refresh-free-FIFO function for storage of moving pictures has been developed using 0.25-μm CMOS technology. An operating current of 73 mA (reduction of 52% compared with a conventional circuit) has been achieved at 100 MHz based on introducing (1) a suppressed High(H)-level differential data transfer scheme which ran be operated at 0.6 V, (2) a new pre-charge method which features a 1/2 VCC precharge level in read cycle and VSS pre-charge level in write cycle, and (3) a divided operation of array circuits for serial access     

Synchronous optical detection unmasked

In this article we presented a new silicon optoelectronic receiver in standard CMOS for synchronous detection of light. Two versions were implemented in a 0.7-μm N-well CMOS technology and tested. In the better version, the light-sensitive junctions were the drains of NMOSFETs. This version operated at up to 180 MHz with external 830-nm light pulses of 176 fJ. Our new receiver shows an excellent trade-off between small size, high speed, and good sensitivity, and is therefore an interesting candidate for applications such as digital optical information transfer between VLSI circuits     

Small-signal gain and time-resolved spectroscopy of the D2-F2/CO2pulsed chemical transfer laser system

Measurements made of the small-signal gain and time-resolved spectral output of a flash-initiated D2-F2/CO2chemical transfer laser system are reported. Small-signal gain measurements indicate a possible lack of rotational equilibration among the rotational levels of the CO2during the DF-CO2V-V energy transfer process. Time-resolved spectral output of this system, operated as a laser oscillator, is presented as verification of the small-signal gain results.     

虚拟仪器在遥测舱自动测试中的应用

介绍了虚拟仪器技术,并将其应用于遥测舱自动测试系统,包括系统硬件和软件的设计。利用LABWINDOWS/CVI软件对采集的信号进行分析与处理,将结果显示、存盘并设有系统报警。系统统采用多面板设计,功能明确,易于操作,显示了虚拟仪器技术应用于遥测舱测量中的优势。该检测系统的应用极大地提高了检测智能化和自动化程度。     

Modulation-doped AlGaAs/GaAs heterostructure charge coupled devices

The advantages of the modulation-doped heterostructure over conventional materials structures for high speed CCD applications are outlined. In addition, the first demonstration of charge transfer in a modulation-doped AlGaAs/GaAs heterojunction is reported. A ten cell, three phase Schottky barrier gate CCD was fabricated using this structure and operated as a shift register. The details of the device fabrication and characterization are presented.     

Quantum cascade lasers emitting at lambda greater than 100 /spl mu/m

Quantum-cascade lasers based on a bound-to-continuum transition and emitting at /spl lambda//spl sim/106 /spl mu/m (2.8 THz) are reported. They produce peak output powers of a few milliwatt and can be operated up to a heatsink temperature of 65 K. The devices demonstrate the feasibility of this technology for frequencies below 3 THz.     

基于嵌入式平台的城市主干道BRT监控系统设计

针对国内城市运营BRT（快速公交）系统后出现的问题,为更有效合理地实现对BRT车辆的调度,减少BRT车辆对道路上其他车辆运行造成的影响,提出了一种新型的基于ARM9内核嵌入式平台的BRT监控系统,该系统结合GPS（全球定位系统）、GSM（全球移动通信系统）和GIS（地理信息系统）等无线通信及无线定位技术,可实时展开对BRT车辆的位置、车况、站台信息等数据的采集、传输和反馈过程,有效提高了城市主干道BRT监控系统调度的效率和合理性,增强了行车安全。分析了该系统的运行原理和关键技术,给出了系统软件和硬件的设计方案及未来改进方向。     

Experimental single flux quantum NDRO Josephson memory cell

Single flux quantum nondestructive readout (NDRO) Josephson memory cells which store an energy of only ~6/spl times/10/SUP -20/ J have been successfully fabricated and operated for the first time. Margin enhancement due to quantization, and low operating currents render this cell an attractive basis for a <1 ns access-time Josephson cache memory designed with a 2.5 /spl mu/m technology.     

Parallel-to-serial transformation by using large-cell-size amorphous-silicon charge-coupled devices

An 8 bit/mm amorphous-silicon charge-coupled device of resistive gate structure and amorphous-silicon transistors has been integrated in monolithic form. The device operated at 10 kHz with a transfer efficiency of more than 99.4% per transfer. Parallel signals applied from external terminals have been transferred to cells in the charge-coupled device under the control of transistors, and have been detected as serial signals at the output terminal of the charge-coupled device.     

脉冲MIG／MAG焊接熔滴过渡的自适应模糊控制

脉冲ＭＩＧ／ＭＡＧ焊接熔滴过渡的控制是焊接技术领域的一个重要研究课题。本文提出了采用自适应模糊控制方法对脉冲ＭＩＧ／ＭＡＧ焊接熔滴过渡进行在线实时控制，建立了以全数字控制ＩＧＢＴ逆变弧焊电源为核心的自适应模糊控制系统。     

A sequentially operated periodic FIR filter for perfect reconstruction

This paper presents a sequentially operated periodic FIR filter to perform the functions of multirate filter banks for perfect reconstruction. This filter consists of an analysis filter and a synthesis filter. Each of these filters has a single-input/single-output FIR filter with periodically time-varying coefficients and a sequentially operated multichannel sampling scheme. As a result, the proposed filter can offer considerable improvements in computation and implementation. For the design of the filter, we provide a necessary and sufficient condition for perfect reconstruction in terms of the blocked transfer matrices and give a design procedure.     

The design of wideband and low-power CMOS active polyphase filter and its application in RF double-quadrature receivers

In this work, a new technique to implement the transfer function of polyphase filter with CMOS active components is proposed and analyzed. In the proposed polyphase filter structure, the currents mirrored from capacitors and the transistors in a single-stage are used to realize high-pass and low-pass functions, respectively. The multistage structure expands the frequency bandwidth to more than 20 MHz. Furthermore, a constant-gm bias circuit is employed to decrease the sensitivity of image rejection to temperature and process variations. HSPICE simulations are performed to confirm the performance. With the current-mode operation, the low-voltage version of proposed active polyphase filters was designed. It can be operated at 1-V power supply with similar performance but with only 50% of the power dissipation of the normal-voltage version. The proposed four-stage polyphase filter is fabricated in 0.25-/spl mu/m CMOS 1P5M technology. The measured image rejection ratio is higher than -48 dB at frequencies of 6.1 MHz/spl sim/30 MHz. The measured voltage gain is 6.6 dB at 20 MHz and IIP3 is 8 dBm. The power dissipation is 11 mW at a supplied voltage of 2.5 V and the active chip area is 1162/spl times/813 /spl mu/m/sup 2/.     

遥感图像融合效果评估方法

遥感图像融合效果评估是目前遥感图像融合领域中亟待解决的问题,直接影响遥感图像融合处理技术的发展.文中在构建多源遥感图像融合处理估计模型的基础上,重点讨论分析遥感图像融合效果的主、客观评价技术的发展现状,进行SAR图像与光学图像的融合处理仿真实验,优选相关系数及峰值信噪比完成SAR图像与光学图像的融合效果评估处理.同时,还讨论了目前图像融合效果评估中存在的主要问题,对进一步研究图像融合效果评估有很好的意义.     

A dual-mode truly modular programmable fractional divider based on a 1/1.5 divider cell

A divide-by-1/1.5 divider cell using a dual edge-trigger technique is proposed. Based on this divider cell, a dual-mode programmable divide-by-X circuit is demonstrated in 0.18-/spl mu/m CMOS technology, where X=P or P.5 in one mode and 2P or 2P+1 in the other mode with P=128-255. When operated in the divide-by-2P/2P+1 mode, this circuit outputs a signal with 50% duty cycle. Theoretically, P can be any arbitrary and programmable integer.     

24 Gbit/s regenerating demultiplexer IC in silicon bipolar technology

A 1:2 regenerating demultiplexer IC has been realised in an advanced self-aligned silicon bipolar technology using 0.8 mu m lithography. The circuit can be operated up to 24 Gbit/s at 5 V supply voltage. This is by far the highest data rate reported for a demultiplexer in any IC technology.<>     

A 15-GHz monolithic two-modulus prescaler

A high-speed two-modulus prescaler for divide-by-4/5 select was successfully realized adopting a new circuit design that reduces the effective fan-out of each D-flip-flop (D-FF) to one. To assure stable and high-speed operation, a low-voltage signal amplitude of 250 mV in the D-FF was adopted for both true-and-complementary and single-phase signals. Using a 70-GHz-f_T GaAs/AlGaAs HBT technology, the D-FF operated stably up to 18.6 Gb/s at designed bias voltages of 9 V with power dissipation of 0.55 W, and the prescaler operated up to 15.5 GHz with power dissipation of 1.5 W     

Three-phase GaAs Schottky-barrier CCD operated up to 100-MHz clock frequency

GaAs CCD's with 5-µm electrodes were fabricated using a process fully compatible to MESFET integrated circuits. The devices were operated at clock frequencies from 100 kHz to 100 MHz. The transfer inefficiency was found to be ≈ 1 × 10^-2in the frequency range from 100 kHz to 30 MHz. This is due to an incomplete charge transfer caused by interelectrode gaps larger than the layer thickness.     

Software engineering technology infusion within NASA

Abstract technology transfer is of crucial concern to both government and industry today. In this paper, several software engineering technologies used within NASA are studied, and the mechanisms, schedules, and efforts at transferring these technologies are investigated. The goals of this study are: (1) to understand the difference between technology transfer (the adoption of a new method by large segments of an industry) as an industrywide phenomenon and the adoption of a new technology by an individual organization (called technology infusion); and (2) to see if software engineering technology transfer differs from other engineering disciplines. While there is great interest today in developing technology transfer models for industry, it is the technology infusion process that actually causes changes in the current state of the practice