Progress in Chip-Scale Photonic Sensing

Chip-scale integrated planar photonic sensing systems for portable diagnostics and monitoring are emerging, as photonic components are integrated into systems with silicon (Si), Si complementary metal–oxide semiconductor, and fluidics. This paper reviews progress in these areas. Medical and environmental applications, candidate photonic sensors, integration methodologies, integrated subsystem demonstrations, and challenges facing this emerging field are discussed in this paper.      

Integrated Optical Polarizer for Silicon-on-Insulator Waveguides Using Evanescent Wave Coupling to Gap Plasmon–Polaritons

Resonant coupling to a gap plasmon–polariton supported by a metal–dielectric nanoscale multilayer on top of a silicon guiding core is proposed for polarization control in silicon-on-insulator waveguides. The device functionality relies on the unusual dispersion properties of the gap plasmon–polaritons, whose modal index can be significantly higher than the refractive index of the gap layer.      

Design of plasmonic half-adder and half-subtractor circuits employing nonlinear effect in Mach–Zehnder interferometer

Plasmonic metal–insulator–metal (MIM) waveguides have the unique attribute of propagating surface plasmons beyond the diffraction limit. In this paper, basic designs for half-adder and half-subtractor circuits are proposed based on the nonlinear effect in Mach–Zehnder interferometers designed using plasmonic MIM waveguides. The proposed devices are studied in the third optical communications window with transverse magnetic polarization. The designs are verified by the finite-difference time-domain technique with the help of MATLAB simulations.     

Large-scale photonic integrated circuits

100-Gb/s dense wavelength division multiplexed (DWDM) transmitter and receiver photonic integrated circuits (PICs) are demonstrated. The transmitter is realized through the integration of over 50 discrete functions onto a single monolithic InP chip. The resultant DWDM PICs are capable of simultaneously transmitting and receiving ten wavelengths at 10 Gb/s on a DWDM wavelength grid. Optical system performance results across a representative DWDM long-haul link are presented for a next-generation optical transport system using these large-scale PICs. The large-scale PIC enables significant reductions in cost, packaging complexity, size, fiber coupling, and power consumption.     

Large-Scale InP Photonic Integrated Circuits: Enabling Efficient Scaling of Optical Transport Networks

An overview of commercially available large-scale photonic integrated circuits (PICs) in indium phosphide is provided. Results of 100-Gb/s PICs that are field-deployed in wavelength-division-multiplexing (WDM) networks is provided, along with development results showing scaling of both channel count and channel bit rate to implement next-generation PICs with an aggregate capacity of 1.6 Tb/s. Use of PIC-enabled WDM systems allows affordable optical-electrical-optical (OEO) conversion and the implementation of "digital" optical networks with enhanced sub-wavelength reconfigurable bandwidth management, digital performance monitoring, and protection features. PICs will enable the continued capacity scaling required for next-generation IP core networks and support of high-bandwith 40-G and 100-GbE service connectivity between core routers     

Intimate monolithic integration of chip-scale photonic circuits

In this paper, we introduce a robust monolithic integration technique for fabricating photonic integrated circuits comprising optoelectronic devices (e.g., surface-illuminated photodetectors, waveguide quantum-well modulators, etc.) that are made of completely separate epitaxial structures and possibly reside at different locations across the wafer as necessary. Our technique is based on the combination of multiple crystal growth steps, judicious placement of epitaxial etch-stop layers, a carefully designed etch sequence, and self-planarization and passivation steps to compactly integrate optoelectronic devices. This multigrowth integration technique is broadly applicable to most III-V materials and can be exploited to fabricate sophisticated, highly integrated, multifunctional photonic integrated circuits on a single substrate. As a successful demonstration of this technique, we describe integrated photonic switches that consume only a 300 /spl times/300 /spl mu/m footprint and incorporate InGaAs photodetector mesas and InGaAsP/InP quantum-well modulator waveguides separated by 50 /spl mu/m on an InP substrate. These switches perform electrically-reconfigurable optically-controlled wavelength conversion at multi-Gb/s data rates over the entire center telecommunication wavelength band.     

Dielectric investigation of photoinduced chromophore degradation in nonlinear optical side-chain polymer electrets

Organic materials with noncentrosymmetric chromophores are known to be susceptible to a number of photochemical processes, including reversible isomerization reactions as well as irreversible photooxidation or photoreduction reactions. Reversible isomerization is the basis for a variety of applications, such as photoinduced poling, optical data storage and optical grating formation. The irreversible processes that involve the destruction of the chromophores have been found useful for the fabrication of optical waveguides, but they also limit the life times of polymeric photonic devices. In this paper, it is demonstrated that dielectric measurements allow for an in-depth investigation of nonreversible chromophore degradation processes in a typical side-chain polymer. The time- and temperature-dependent dielectric function of the polymer at 1 kHz enables us to follow the chromophore-degradation kinetics and to monitor the bleaching depth as a function of time at room and elevated temperatures.     

2-D MMI Devices Based on Integrated Hollow ARROW Waveguides

In this paper, the design, fabrication, and characterization of 2-D multimode interference (MMI) devices based on integrated silicon hollow antiresonant reflection optical waveguides (ARROW) is presented. Unlike conventional waveguides, the field in ARROW is not confined in the core region by total internal reflection but by dielectric cladding layers designed to form-high reflectivity Fabry-Perot mirrors. This peculiar structure permits to realize integrated hollow-core waveguides using standard silicon technology. In this paper, we show that these waveguides can be usefully applied in the fabrication of 2-D MMI devices. With a 130 mumtimes 130 mum cross-section waveguide, multiple images are observed from 1times1 to 6times6 image matrices. These devices also exhibit interesting bandpass spectral properties that can be usefully applied in several fields ranging from telecommunications to sensing     

High-power broad-area tapered amplifier with a monolithicallyintegrated output focusing lens at 0.98-μm wavelength

We have demonstrated a 0.98-μm wavelength tapered broad-area amplifier with a monolithically integrated aspherical waveguide lens. CW output exceeding 1 W from the amplifier-lens chip was measured with 10 mW input from a 0.98-μm diode laser. The integrated semiconductor waveguide lens focused the amplifier output to a 8 μm×3 μm spot, which was measured at output power up to about 0.5 W, corresponding to 2.5 times the diffraction limit The beam propagation method was used to model the integrated amplifier-lens chip, and the calculated focal distances agree with the experiment to within 5%. The integrated lens may be used for output coupling to a single mode fiber with the requirement that the focal point should be positioned on the output facet. Based on BPM simulation, however, the focal point position becomes uncritical if a single mode output waveguide is integrated. Our results indicate that the waveguiding lens is a useful component for the design of high-power photonic integrated circuits     

Silicon-on-silicon rib waveguides with a high-confiningion-implanted lower cladding

The realization of single-mode rib waveguides in standard epitaxial silicon layer on lightly doped silicon substrate, using ion implantation to form the lower cladding, is reported. The implanted buffer layer enhances' the vertical confinement and improves the propagation characteristics. Respect to similar standard all-silicon waveguides a propagation loss reduction of about 7 dB/cm, in the single-mode regime, has been measured. A numerical analysis has been performed to evaluate the theoretical attenuation and the transverse optical field profiles. As a result of the presence of the ion implanted buffer layer, an increase of the fundamental mode confinement factor from 0.3 to 0.85 has been calculated. This results in a great enhancement of the coupling efficiency with standard single-mode optical fibers. Moreover, the proposed technique is low cost, fully compatible with standard VLSI processes, and allows a great flexibility in the integration of guided-wave devices and electronic circuits. Finally, the very high thermal conductivity characterizing these waveguides makes them attractive host-structures for electrically and thermally controlled active optical devices     

Optical modeling of waveguide photonic nanostructures using theradiation spectrum method (RSM) with evanescent modes

In this work, we study the effects of the evanescent modes in the simulation and modeling of optical integrated circuits based on photonic bandgap structures. We show that the contribution of these modes in the energy transfer in structures like the MOEM structures, can not be neglected. The radiation spectrum method, recently developed by the authors for the guided wave devices, is thus extended to account for the evanescent mode propagation. Applying this technique on an air-gap in a suspended waveguide a model of this gap is developed in terms of its parameters. This model is then integrated in an all optical simulator to predict the performance of photonic structures. Such technique enables to design and to optimize the photonic integrated circuits taking the evanescent modes effects into account     

Planar microoptomechanical waveguide switches

Planar micromechanical waveguide switches based on lateral deflection of a cantilever beam are presented. Two material systems have been used: a GaAs-AlGaAs structure with integrated waveguides and a silicon-on-insulator (SOI), with postprocessed polymeric waveguides. The switches are characterized by low actuation voltage (3-20 V), short switching times (32-200 μs), and low crosstalk (< -30 dB)     

High-Voltage CMOS Controller for Microfluidics

A high-voltage microfluidic controller designed using DALSA Semiconductor's 0.8-$mu $m low-voltage/high-voltage complementary metal–oxide semiconductor/double diffused metal– oxide semiconductor process is presented. The chip's four high- voltage output drivers can switch 300 V, and the dc–dc boost converter can generate up to 68 V using external passive components. This integrated circuit represents an advancement in microfluidic technology when used in conjunction with a charge coupling device (CCD)-based optical system and a glass microfluidic channel, enabling a portable and cost-efficient platform for genetic analysis.      

A Large-Area High-Reflectivity Broadband Monolithic Single-Crystal-Silicon Photonic Crystal Mirror MEMS Scanner With Low Dependence on Incident Angle and Polarization

In this paper, we introduce a single-axis resonant combdrive microelectromechanical systems (MEMS) scanner with a large-area highly reflective broadband monolithic single-crystal-silicon (SCS) photonic crystal (PC) mirror. PC mirrors can be made from a single monolithic piece of silicon through alternate steps of etching and oxidation. This process allows the fabrication of a stress-free PC reflector in SCS with better optical flatness than deposited films such as polysilicon slabs on low-index oxide. PC mirrors can be made in IR transparent dielectric material and can achieve high reflectivity over a broad wavelength range. PC reflectors have several advantages over other mirror technologies. They can tolerate much higher processing temperatures and higher incident optical powers as well as operate in more corrosive environments than metals. Compared to multilayer dielectric stacks, PC mirrors allow for simpler process integration, thus making them highly compatible with CMOS and MEMS processing. In this paper, we fabricate a PC mirror MEMS scanner in SCS without any deposited films. Our PC mirrors show broadband high reflectivity in the wavelength range from 1550 to 1600 nm, and very low angular and polarization dependence over this same range. The single-axis MEMS scanners are fabricated on silicon-on-insulator (SOI) wafers with the PC mirrors also fabricated in the SOI device layer. The scanners are actuated by electrostatic comb drives on resonance. Dynamic deflection measurements show that the scanners achieve 22deg total scan angle with an input square wave of 67 V and have a resonance frequency of 2.13 kHz.     

ESD protection for SOI technology using under-the-BOX (substrate) diode structure

This paper presents a new integrated silicon-on-insulator (SOI) substrate-diode (SUBD) structure for an electrostatic-discharge (ESD) protection of the SOI I/O circuits. The diode is built under the buried oxide, within the substrate region of the SOI wafer, without additional steps to the conventional SOI CMOS process. This paper shows that the ESD protection level can reach four times the level of the standard SOI lateral-diode structure. This paper presents the device and process simulation results to demonstrate the effect of self-heating in both the standard SOI lateral and substrate diodes, and to demonstrate how to optimize the SUBD structure using a deep n-well implant.     

Dielectric Charging in Electrostatically Actuated MEMS Ohmic Switches

MEMS switches having separate signal and actuation electrodes with different air gaps are fabricated using a copper-based CMOS interconnect manufacturing process. By using a control voltage high enough to establish metal–metal contact between the signal electrodes while avoiding contact between the dielectric-covered actuation electrodes, dielectric charging appears to be tolerable. By simultaneously measuring the conductance across the signal electrodes and the capacitance across the actuation electrodes, the conductance–force characteristic can be readily monitored and analyzed. For the present switches, the effect of polarization charge appears to be negligible, and dielectric charging is significant only after dielectric contact is made and space charge is injected.      

高压SOI器件介质场增强

提高纵向耐压是研究绝缘体上的硅(Silicon-on-insnlator,简称SOI)高压器件之瓶颈,经过多年研究,总结出了SOI高压器件介质场增强(Enhanced Dielectric Layer Field,简称ENDIF)理论与技术,通过增强介质埋层电场来提高击穿电压.给出增强介质埋层电场的3项技术,即在埋层上界面引入电荷、降低埋层介电系数、采用超薄顶层硅.基于ENDIF,提出了一系列SOI高压器件结构,即电荷型SOI高压器件、低k和变k埋层SOI高压器件、薄硅层阶梯漂移区SOI高压器件,建立了相应的耐压模型,并研制出大于700V的双面电荷槽SOI横向扩散金属氧化物半导体(Laterally Diffused Metal Oxide Semiconductor,简称LDMOS).     

A hybrid time-domain technique for simulation of high-density integrated optical circuits

This paper presents a new simulation method for modeling and simulation of high-density integrated optical circuits based on high index contrast (HIC) waveguides with complex topology. The method combines the time-domain reflective beam propagation method (TD-RBPM) and the slow-wave finite-difference time-domain method and is hence referred to as the time-domain hybrid BPM (TD-HBPM). It is capable of handling arbitrary optical integrated circuits with perpendicularly located input and output ports. The application to the two HIC optical circuits shows the accuracy and efficiency of this method.     

Lensed Fiber-Array Assembly With Individual Fiber Fine Positioning in the Submicrometer Range

An innovative design is presented enabling fine positioning of each individual fiber in a fiber array used in multiinput- and multioutput-port photonic integrated circuits. Hence, the coupling efficiency of lensed fiber arrays can be improved by eliminating the eccentricities of the lenses deposited on the individual fibers and the inaccuracies of the supporting V-groove substrates. In preparation, four different types of commercially available lensed fibers are characterized and coupling efficiencies to InP-based waveguides are determined in order to select the best applicable fibers for the array. The final fiber-tip position accuracy is within$pm 0.25 mu$m and this design is based on metal deformation by laser-welding-induced local heat. With this technique, laser-supported adjustment is possible, allowing the opportunity of fine-tuning the fiber-tip position of already secured parts in the subassembly. Owing to the accurate fiber-tip position and the assembly of the array with selected lensed fibers, coupling efficiencies of$- 2.9$to$- 3.5$dB are simultaneously measured for four fibers to InP-based waveguides with physical dimensions of 3$mu$m$times 0.6 mu$m. To compare these results, the performance of different types of regular, commercially available fiber arrays, whereby the fibers are mounted on silicon V-groove substrates, are determined. In contrast, the measured coupling efficiencies are of the order of$- 5.2$to$- 7.8$dB using similar InP-based waveguides.