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1.
Effective work function (φm,eff) values of Ru gate electrode on SiO2 and HfO2 MOS capacitors were carefully examined and discussed from the viewpoint of an effect of oxygen incorporation in Ru gate electrode on φm,eff. Annealing at 400 °C in the reduction (3%H2) and the oxidation (1%O2) ambient resulted in similar changes in the φm,eff of Ru/HfO2/SiO2 and Ru/SiO2 MOS capacitors. Furthermore, the Ru gate MOS capacitor after annealing in the oxidation condition have shown almost the same φm,eff value to that of RuO2 gate MOS capacitors. The oxygen concentration in the Ru/HfO2 interface after annealing in oxidizing atmosphere is approximately one order of magnitude higher than that after annealing in reducing atmosphere as confirmed by secondary ion mass spectroscopy analysis. Furthermore, the higher oxygen concentration at the Ru/dielectric interface leads to the higher φm,eff value, regardless of SiO2 or HfO2 dielectrics. This indicates that φm,eff of Ru gate MOS capacitor is dominantly determined by the oxygen concentration at the Ru/dielectric layer interface rather than the dipoles originated from the oxygen vacancy in HfO2.  相似文献   

2.
UV-assisted annealing processes for thin oxide films is an alternative to conventional thermal annealing and has shown many advantages such as low annealing temperature, reducing annealing time and easy to control. We report in this work the deposition of ultra-thin HfO2 films on silicon substrate by two CVD techniques, namely thermal CVD and photo-induced CVD using 222 nm excimer lamps at 400 °C. As-deposited films of around 10 nm in thickness with refractive indices from 1.72 to 1.80 were grown. The deposition rate measured by ellipsometry was found to be about 2 nm/min by UV-CVD, while the deposition rate by thermal CVD is 20% less than that by UV-CVD. XRD showed that the as-deposited HfO2 films were amorphous. This work focuses on the effect of post deposition UV annealing in oxygen on the structural, optical and electrical properties of the HfO2 films at low temperature (400 °C). Investigation of the interfacial layer by FTIR revealed that thickness of the interfacial SiO2 layer slightly increases with the UV-annealing time and UV annealing can convert sub-oxides at the interface into stoichiometric SiO2, leading to improved interfacial qualities. The permittivity ranges in 8–16, are lower than theoretical values. However, the post deposition UV O2 annealing results in an improvement in effective breakdown field and calculated permittivity, and a reduction in leakage current density for the HfO2 films.  相似文献   

3.
The temperature dependence of field‐effect transistor (FET) mobility is analyzed for a series of n‐channel, p‐channel, and ambipolar organic semiconductor‐based FETs selected for varied semiconductor structural and device characteristics. The materials (and dominant carrier type) studied are 5,5′′′‐bis(perfluorophenacyl)‐2,2′:5′,2″:5″,2′′′‐quaterthiophene ( 1 , n‐channel), 5,5′′′‐bis(perfluorohexyl carbonyl)‐2,2′:5′,2″:5″,2′′′‐quaterthiophene ( 2 , n‐channel), pentacene ( 3 , p‐channel); 5,5′′′‐bis(hexylcarbonyl)‐2,2′:5′,2″:5″,2′′′‐quaterthiophene ( 4 , ambipolar), 5,5′′′‐bis‐(phenacyl)‐2,2′: 5′,2″:5″,2′′′‐quaterthiophene ( 5 , p‐channel), 2,7‐bis((5‐perfluorophenacyl)thiophen‐2‐yl)‐9,10‐phenanthrenequinone ( 6 , n‐channel), and poly(N‐(2‐octyldodecyl)‐2,2′‐bithiophene‐3,3′‐dicarboximide) ( 7 , n‐channel). Fits of the effective field‐effect mobility (µeff) data assuming a discrete trap energy within a multiple trapping and release (MTR) model reveal low activation energies (EAs) for high‐mobility semiconductors 1 – 3 of 21, 22, and 30 meV, respectively. Higher EA values of 40–70 meV are exhibited by 4 – 7 ‐derived FETs having lower mobilities (µeff). Analysis of these data reveals little correlation between the conduction state energy level and EA, while there is an inverse relationship between EA and µeff. The first variable‐temperature study of an ambipolar organic FET reveals that although n‐channel behavior exhibits EA = 27 meV, the p‐channel regime exhibits significantly more trapping with EA = 250 meV. Interestingly, calculated free carrier mobilities (µ0) are in the range of ~0.2–0.8 cm2 V?1 s?1 in this materials set, largely independent of µeff. This indicates that in the absence of charge traps, the inherent magnitude of carrier mobility is comparable for each of these materials. Finally, the effect of temperature on threshold voltage (VT) reveals two distinct trapping regimes, with the change in trapped charge exhibiting a striking correlation with room temperature µeff. The observation that EA is independent of conduction state energy, and that changes in trapped charge with temperature correlate with room temperature µeff, support the applicability of trap‐limited mobility models such as a MTR mechanism to this materials set.  相似文献   

4.
The open‐circuit voltage (VOC) of an organic solar cell is limited by the donor‐acceptor material system. The effective gap Egeff between the electron affinity of the acceptor and the ionization potential of the donor is usually regarded as the upper limit for VOC, which is only reached for T → 0 K. This relation is confirmed for a number of small‐molecule bulk heterojunction p‐i‐n type solar cells by varying the temperature and illumination intensity. With high precision, the low temperature limit of VOC is identical to Egeff. Furthermore, the influence of the hole transport material in a p‐doped hole transport layer and the donor‐acceptor mixing ratio on this limit V0 is found to be negligible. Varying the active material system, the quantitative relation between V0 and Egeff is found to be identity. A comparison of V0 in a series of nine different donor‐acceptor material combinations opens a pathway to quantitatively determine the ionization potential of a donor material or the electron affinity of an acceptor material.  相似文献   

5.
From quantum simulations of both capacitance and current measurements, the main physical parameters (dielectric thickness and permittivity, doping levels) of hafnium based (HfSiOx and HfO2) gate oxide capacitors have been extracted. Three kinds of gates (n+-polysilicon, totally silicided (TOSI) NiSi and metal TiN gates) have been studied. In the case of thick (EOT between 11.1 and 12.3 nm) HfSiOx gate oxides or thin (EOT inferior to 2 nm) HfO2 stacks with n+-polysilicon or TiN gates, a good agreement between simulations and experimental data is obtained. Electron tunneling currents are prevalent in these stacks except for the specific case of TiN/HfO2 stacks in p-substrate accumulation mode. In this case, electron and hole tunneling transparencies become of the same order of magnitude. Hole transport contribution can no more be neglected and should be taken into account in simulations.  相似文献   

6.
本篇文章采用了基于密度泛函理论的VASP软件对RRAM器件HfO2层中的金属掺杂物的效应进行了研究。首先根据金属掺杂物存在于HfO2晶胞中不同位置的形成能,将其分为两种类型:间隙式和替位式。通过分别计算分波电荷密度图,发现在掺有间隙式金属的HfO2中产生了若干导电细丝,而在掺有替位式金属的HfO2中未发现此现象。通过态密度与分态密度的分析发现导电细丝由间隙式金属直接产生而替位式金属不能直接产生导电细丝。然而,对于氧空位细丝机制的RRAM中,所有的金属掺杂物都会有利于氧空位细丝的产生。通过计算氧空位的形成能以及金属与氧空位的相互作用能,发现P型替位式金属掺杂物对氧空位细丝有较强的促进作用,间隙式金属掺杂物具有较小的促进作用,而类Hf型和N型替位式金属掺杂物的促进作用最弱。  相似文献   

7.
An electrical characterization comparative analysis between Al/HfO2/n-Si and Al/Hf-Si-O/n-Si samples has been carried out. Hafnium-based dielectric films have been grown by means of atomic layer deposition (ALD). Interface quality have been determined by using capacitance–voltage (CV), deep level transient spectroscopy (DLTS) and conductance transient (G-t) techniques. Our results show that silicate films exhibit less flat-band voltage shift and hysteresis effect, and so lower disordered induced gap states (DIGS) density than oxide films, but interfacial state density is greater in Hf–Si–O than in HfO2. Moreover, a post-deposition annealing in vacuum under N2 flow for 1 min, at temperatures between 600 and 730 °C diminishes interfacial state density of Hf–Si–O films to values measured in HfO2 films, without degrade the interface quality in terms of DIGS.  相似文献   

8.
The isotypic heterojunctions p-AlxGa1−x As/p-AlyGa1−y As, grown by MOVPE on n-GaAs substrates, have been investigated by the voltage-capacitance method at temperatures ranging from 300 to 100 K. To determine the valence-band offset ΔE V and the built-in charge in the heterojunction, the Poisson equation was solved numerically on a nonuniform coordinate grid. The incomplete ionization of the acceptors and the different magnitude of the permittivity in different layers of the heterostructure were taken into account in the calculation. It was found that for a p-Al 0.2 a0.8As/p-Al 0.5 Ga0.5As heterojunction ΔE V at room temperature is 39% (113 meV) of the total gap ΔE g and decreases monotonically to 35% at T=120 K. Fiz. Tekh. Poluprovodn. 33, 940–944 (August 1999)  相似文献   

9.
In this work, we investigated the effect of so-called WF (Work Function) setting anneal (high temperature annealing on TiN/HfO2 stack) on gate stack properties. It was found that intermixed layer created in-between TiN and HfO2 during WF setting anneal has negative fixed charge and reduces pFET Vt (positive Vt shift). In addition, higher anneal temperature further reduces pFET Vt while keeping nFET Vt almost unchanged. This could be explained by passivation of oxygen vacancies in HfO2 with diffused oxygen from TiN layer. By combining these effects, one can further push effective work function towards valence band edge which enables wider coverage of transistor Vt option.  相似文献   

10.
This work demonstrates the valence band-edge effective work function (?? m ,eff) of a titanium nitride (TiN) gate with a hafnium oxide (HfO2) dielectric using a cost-effective, low-complexity gate-first integration scheme. Aluminum (Al) ion implantation following TiN gate stack formation yielded a ?? m ,eff of 5.0?eV without an equivalent oxide thickness penalty. Additionally, the incorporation of fluorine (F) into the HfO2 dielectric by the channel implantation approach further improved ?? m ,eff to 5.1?eV. This technique for modulating ?? m ,eff has potential for threshold-voltage tuning without any process complexity in high-k/metal gate low-power applications.  相似文献   

11.
The properties of metal oxides with high dielectric constant (k) are being extensively studied for use as gate dielectric alternatives to silicon dioxide (SiO2). Despite their attractive properties, these high‐k dielectrics are usually manufactured using costly vacuum‐based techniques. In that respect, recent research has been focused on the development of alternative deposition methods based on solution‐processable metal oxides. Here, the application of the spray pyrolysis (SP) technique for processing high‐quality hafnium oxide (HfO2) gate dielectrics and their implementation in thin film transistors employing spray‐coated zinc oxide (ZnO) semiconducting channels are reported. The films are studied by means of admittance spectroscopy, atomic force microscopy, X‐ray diffraction, UV–Visible absorption spectroscopy, FTIR, spectroscopic ellipsometry, and field‐effect measurements. Analyses reveal polycrystalline HfO2 layers of monoclinic structure that exhibit wide band gap (≈5.7 eV), low roughness (≈0.8 nm), high dielectric constant (k ≈ 18.8), and high breakdown voltage (≈2.7 MV/cm). Thin film transistors based on HfO2/ZnO stacks exhibit excellent electron transport characteristics with low operating voltages (≈6 V), high on/off current modulation ratio (~107) and electron mobility in excess of 40 cm2 V?1 s?1.  相似文献   

12.
The physical and electrical properties of hafnium oxide (HfO2) thin films deposited by high pressure reactive sputtering (HPRS) have been studied as a function of the Ar/O2 ratio in the sputtering gas mixture. Transmission electron microscopy shows that the HfO2 films are polycrystalline, except the films deposited in pure Ar, which are amorphous. According to heavy ion elastic recoil detection analysis, the films deposited without using O2 are stoichiometric, which means that the composition of the HfO2 target is conserved in the deposition films. The use of O2 for reactive sputtering results in slightly oxygen-rich films. Metal-Oxide-Semiconductor (MOS) devices were fabricated to determine the deposited HfO2 dielectric constant and the trap density at the HfO2/Si interface (Dit) using the high–low frequency capacitance method. Poor capacitance–voltage (CV) characteristics and high values of Dit are observed in the polycrystalline HfO2 films. However, a great improvement of the electrical properties was observed in the amorphous HfO2 films, showing dielectric constant values close to 17 and a minimum Dit of 2×1011 eV−1 cm−2.  相似文献   

13.
High permittivity (high-k) gate dielectrics were fabricated using the plasma oxidation of Hf metal/SiO2/Si followed by the post-deposition annealing (PDA), which induced a solid-phase reaction between HfOx and SiO2. The oxidation time and PDA temperature affected the equivalent oxide thickness (EOT) and the leakage current density of the high-k dielectric films. The interfacial structure of the high-k dielectric film/Si was transformed from HfOx/SiO2/Si to HfSixOy/Si after the PDA, which led to a reduction in EOT to 1.15 nm due to a decrease in the thickness of SiO2. These high-k dielectric film structures were investigated by X-ray photoelectron spectroscopy. The leakage current density of high-k dielectric film was approximately four orders of magnitude lower than that of SiO2.  相似文献   

14.
In this work, the dependence of the electrical characteristics of some thin (<4 nm) HfO2, HfSiO and HfO2/SiO2 stacks on their manufacturing process is studied at the nanoscale. Topography, current maps and current–voltage (IV) characteristics have been collected by conductive atomic force microscope (CAFM), which show that their conductivity depends on some manufacturing parameters. Increasing the annealing temperature, physical thickness or Hafnium content makes the structure less conductive.  相似文献   

15.
《Microelectronics Reliability》2015,55(11):2224-2228
A resistive switching random access memory (RRAM) with an HfO2/Ti structure grown on a molybdenum (MO) substrate was fabricated, and a gold (Au) conductive atomic force microscopy (CAFM) tip was used as the top electrode such that the cell area of the resulting RRAM device is as small as 3 × 10−12 cm2. The pre- and post-irradiated resistive switching behaviors of the RRAM device with various HfO2 layer thicknesses were investigated after being subjected to Co60 γ-ray irradiation with different radiation doses. It is found that the forming voltage (Vforming), set voltage (Vset), resistance of high resistance state (RHRS) and resistance of low resistance state (RLRS) of the RRAM device are all radiation dose-dependent. The Vforming, Vset, RHRS and RLRS all decrease as the radiation dose increases due to increasing radiation-induced oxygen vacancies or defects inside the HfO2 layer. Our experimental results indicate that the HfO2-based RRAM cell with an extremely small cell area is not actually radiation hard since the operating voltage will change with Vforming and Vset after irradiation.  相似文献   

16.
The effective permittivity of composites with interpenetrating phases was determined through finite-element simulation. The spectra of effective permittivity for such composites were calculated, and relationships among the effective permittivity ε eff, permittivity ratio x of the matrix to network phase, and volume fraction of the network f were developed using the numerical results. The simulation has been validated by comparing the results with previously published experiments, and excellent agreement has been achieved. The electric field distributions in the composites were also explored in this work.  相似文献   

17.
AlGaN/GaN metal-oxide-semiconductor heterostructure field-effect transistors (MOSHFETs) with Al2O3 gate oxide which was deposited by atomic layer deposition (ALD) were fabricated and their performance was then compared with that of AlGaN/GaN MOSHFETs with HfO2 gate oxide. The capacitance (C)-voltage (V) curve of the Al2O3/GaN MOS diodes showed a lower hysteresis and lower interface state density than the C-V curve of the HfO2/GaN diodes, indicating better quality of the Al2O3/GaN interface. The saturation of drain current in the ID-VGS relation of the Al2O3 AlGaN/GaN MOSHFETs was not as pronounced as that of the HfO2 AlGaN/GaN MOSHFETs. The gate leakage current of the Al2O3 MOSHFET was five to eight orders of magnitude smaller than that of the HfO2 MOSHFETs.  相似文献   

18.
The DCIV method was applied to investigate negative bias temperature instability (NBTI) in SiO2 gate oxides. The DCIV technique, which measures the interface defect density independently from bulk oxide charges, delineates the contribution of the interface defect generation to the overall NBTI measured by the threshold voltage shift, ΔVTH. The DCIV results obtained during both stress and relaxation phases are generally consistent with the main features of the reaction–diffusion (R–D) model, which suggests positive charge generation/annealing at the Si/SiO2 interface due to breaking/re-passivation of the Si–H bonds. These results are in agreement with the spin-dependent recombination (SDR) experiments, which reflect the density of the Si dangling bonds at the Si/SiO2 interface (Pb centers) and its vicinity (E′ centers). Comparison of degradation kinetics as measured by DCIV, charge-pumping, and ID − VGVTH) techniques, however, suggests that ΔVTH includes additional contributions, most likely from the oxide bulk charges. For comparison, an NBTI study was also performed on the high-k HfO2/SiO2 gate stacks. After adjusting for the high-k related contribution, similar kinetics of the long-term stress interface trap generation was observed in SiO2 and high-k gate stacks suggesting a common mechanism of the interface degradation.  相似文献   

19.
A physical model was proposed to account for the observed very low effective mobility μeff and almost zero temperature coefficient of μeff in Al2O3-InP MISFETs (Metal-Insulator-Semiconductor-Field-Effect-Transistor). By taking account of the interface state density distribution and the statistically varying surface potential, the analysis explained the experimental results semi-quantitatively. The effective height of the surface potential fluctuation was estimated to be 10–20 mV. The proposed model covered the high quality Al2O3-InGaAsP interface (with low interface state density), and explained μeff vs temperature characteristics in InGaAsP MISFET being close to that of the bulk mobility.  相似文献   

20.
Effects of constant voltage stress (CVS) on gate stacks consisting of an ALD HfO2 dielectric with various interfacial layers were studied with time dependent sensing measurements: DC IV, pulse IV, and charge pumping (CP) at different frequencies. The process of injected electron trapping/de-trapping on pre-existing defects in the bulk of the high-κ film was found to constitute the major contribution to the time dependence of the threshold voltage (Vt) shift during stress. The trap generation observed with the low frequency CP measurements is suggested to occur within the interfacial oxide layer or the interfacial layer/high-κ interface, with only a minor effect on Vt.  相似文献   

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