对数域积分电路的噪声特性研究

介绍了瞬时缩展积分器的基本原理，对数域积分器是其中重要的一种，由于对数域电路是基于晶体管的对数－指数缩展特性，且晶体管本身存在噪声源，使得安的噪声呈现出信号与噪声相互调制的特性，这与线性非缩展积分电路噪声为常数是有所不同，文中采用积分器框图形式，将噪声集中考虑为一固定噪声源进行分析，最后得出了甲类和甲乙类工作状态的对数域积分器信噪比SNR的计算公式，研究表明，只有甲乙类工作的积分电路可饱和到SNRmax，使其动态范围能比甲类状态电路的动态范围扩展很多。     

基于对数域无损积分器的高阶滤波器设计

提出利用双极型晶体管构成的对数域无损积分器以及对数压缩和指数扩展电路实现高阶滤波器.基于无源网络模拟,该设计不仅方法简单,而且使用元件种类很少,易于集成给出一个6阶Butterworth带通滤波器设计实例.PSpice仿真结果表明,该对数域滤波器能在低电压条件下工作,并具有高频、宽调谐范围和低失真等特性.     

对数域滤波器的实现

对数域电路是利用器件的非线性实现电路的线性工作,解决了有源滤波器线性工作范围的问题.介绍了基于晶体管的反相和同相对数域积分器并进行Pspice仿真.以三阶低通滤波器为例,描述了从线性滤波器到对数域滤波器实现过程,给出了具体的滤波器实现原理图.     

用对数域电流模式电路实现连续小波变换

本文提出了用对数域电路实现连续小波变换的一种方法.利用复解调技术将设计带通滤波器组转化为设计相对简单的低通滤波器组问题,给出了分解与重构的系统流程.设计并分析了对数域电流控制振荡电路,对数域积分器和高斯滤波器等主要的模拟电路.     

一种新颖的对数域电流模式有损积分器

提出了一种新颖的对数域电流模式有损积分器。该积分器的极点频率与基准偏置电流呈线性关系，具有较宽的动态范围和较低的总谐波失真，适合于在低电压下工作。电路采用双极型晶体管和接地电容实现，适合于全集成。面向晶体管级的ＰＳＰＩＣＥ仿真结果表明该电路是正确的。     

用对数域电流模式积分器实现的高频集成滤波器

文本提出了全差动对数域电流模式积分器．该积分器的时间常数受参考偏流控制,其直流增益可达60dB,在高频它具有比较平坦的相频特性。用该积分器设计的二阶滤波器和1dB波纹五阶Chebyshev低通滤波器,计算机仿真显示,“实际”频响特性几乎是理想的．且频率可在很宽的范围内调控．这种滤波器具有很低的THD。     

触发器

Y2000-62090-685 00102731V CMOS 对数域积分器=A 1V CMOS log-domain in-tegrator[会,英]/Python,D.& Punzenberger,M.//1999 IEEE International Symposium on Circuits and Sys-rems,Vol.2 of 6:analog and digital circuits.—685～688(HC)     

一种对数域电流模式积分器及其在高频滤波中的应用

提出了一种新颖的对数城电流模式积分器。该积分器的时间常数由参考偏置电流控制。用该积分器设计了二阶带通滤波器和0．1dB纹波三阶Chebyshev低通滤波器。计算机仿真表明，所设计的滤波器实际频响特性几乎是理想的，而且高频谐波失真很小，通频带灵敏度很低，频率在很宽的范围内可控。电路由双极型晶体管和接地电容构成，适合于全集成实现。     

具有宽调谐范围的低电压对数域二阶低通滤波器

提出了一个由BiCMOS构成的对数域二阶低通滤波器,并采用跨导线性原理分析得到其传递函数。分析了晶体管的寄生电容对此滤波器频率特性的影响。PSpice仿真结果表明,该对数域低通二阶节的实际频率特性和理想特性基本一致。且具有宽频率调谐范围、低工作电压和低失真等特点,可用于对数域高阶滤波器的设计。     

基于对数域电路的连续小波变换模拟实现的可行性分析

在目前国外提出的几种用于实现连续小波变换的电路中，我们抽取了电路中几种关键的模拟器件进行分析，并且讨论了器件与对数域电路之间的关系。我们的目的是为了讨论用对数域电路实现连续小波变换的可行性。我们在最后的结论中提出了一个构想：构造少数几个对数域电路基元，再利用电路基元来简化用于连续小波变换实现的模拟电路设计。     

对数域积分电路的分析与应用

本文分析了一种对数域积分电路的特性,以及极间电容对其性能的影响.在此基础上给出了一般对数域滤波器的设计方法,以及其在宽频带的流控振荡器(ICO)和锁相环电路中的应用,并给出了模拟结果.     

基于开关电流技术的切比雪夫滤波电路的实现

提出了一种运用开关电流技术实现切比雪夫低通滤波电路的方法。将双二次滤波器的传递函数由s域进双线性z变换,确立了基于开关电流积分器的双二次节电路,利用这种双二次节可以实现开关电流滤波器。文中采用双二次低通滤波器级联实现了六阶切比雪夫低通滤波器的设计与仿真,仿真结果表明切比雪夫低通滤波器的陡峭衰减特性和理想幅频特性符合设计要求,从而证实了该方法的可行性和正确性。     

A realization of a high-frequency monolithic integrator with low power dissipation and its application to an active RC filter

According as the fine LSI process technique develops, the technique to reduce power dissipation of high-frequency integrated analog circuits is getting more important. This paper describes a design of high-frequency integrator with low power dissipation for monolithic leapfrog filters. In the design of the conventional monolithic integrators, there has been a great difficulty that a high-frequency integrator which can operate at low supply voltage cannot be realized without additional circuits, such as unbalanced-to-balanced conversion circuits and common-mode feedback circuits. The proposed integrator is based on the Miller integrator. By a PNP current mirror circuit, high CMRR is realized. However, the high-frequency characteristic of the integrator is independent of PNP transistors. In addition, it can operate at low supply voltage. The excess phase shift of the integrator is compensated by insertion of the compensation capacitance. The effectiveness of the proposed technique is confirmed by PSPICE simulation. The simulation results of the integrator shows that the common-mode gain is efficiently low and the virtual ground is realized, and that moderate phase compensation can be achieved. The simulation results of the 3rd-order leapfrog filter using the integrator shows that the 50 MHz-cutoff frequency filter is obtained. Its power dissipation in operating 2 V-supply voltage is 5.22 mW.     

Adaptive log domain filters for system identification using floating gate transistors

We describe an adaptive log domain filter with integrated learning rules for model reference estimation. The system is a first-order low pass filter implemented using multiple input floating gate transistors operating in subthreshold to realize on-line learning of gain and cut-off frequency. We use adaptive dynamical system theory to derive robust control laws for gain and cut-off frequency adaptation in a system identification task. Simulation results show that convergence is slower using simplified control laws but still occurs within milliseconds. Experimental results confirm that the estimated gain and cut-off frequency track the parameters of the reference filter. The adaptive log domain filter has measured power consumption of 33 μW. During operation, deterministic errors are introduced by mismatch within the analog circuit implementation. An analysis is presented which attributes the errors to current mirror mismatch.     

A Novel Log‐Domain First‐Order Multifunction Filter

A new log‐domain first‐order multifunction filter is proposed in this letter. The proposed filter is systematically derived using the state‐space synthesis procedure from a corresponding block diagram. It provides low‐pass (LP), high‐pass (HP), and all‐pass (AP) responses simultaneously for a single input signal. The filter circuit has a very simple structure since it uses only bipolar junction transistors (BJTs) and a grounded capacitor. It can be electronically tuned by changing an external current. The filter has a greater bandwidth due to its inherent current‐mode and log‐domain operations. PSPICE simulations are given to confirm the theoretical analysis.     

Palmo cell using sampled data log-domain integrators

The authors present the first log domain integrator for programmable analogue sampled data signal processing. This circuit is specific to the implementation of emergent programmable pulse based signal processing systems yielding greater dynamic range, reduced power supply voltage and increased operating frequency. Simulation results demonstrate the validity of the approach     

Design of low-voltage and low-power fully integrated filter based on log-domain current-mode integrator

In this paper a novel log-domain current-mode integrator based on MOS transistors in subthreshold is proposed. The integrator's time-constant is tunable by varying a reference bias current. By use of the integrator, a fifth-order Chebyshev lowpass filter with 0.1dB ripples is designed. The simulation results demonstrate that the proposed filter has such advantages as low power supply(1.5V), very low power dissipation (μW level), nearly ideal frequency response, very small sensitivity to components in passband, and adjustable cut-off frequency over a wide range. The circuit is composed of NMOS transistors and grounded capacitors which make it suitable for fully integrated circuit implementation.     

Log-domain filtering by simulating the topology of passive prototypes

A systematic method for designing log-domain filter structures that simulate the topology of the corresponding passive prototypes is introduced in this paper. This has been achieved by transposing the i-/spl upsi/ characteristic equation of each passive element in the linear domain, to the corresponding one in the log domain. The transposition has been done in such a way that, the current that flows through the terminals of the passive element in the linear domain sustains its value in the corresponding log-domain configuration. In this way the linear operation of the whole filter is preserved. With regard to the voltage at each terminal of the passive prototype, this is logarithmically compressed in order to achieve filtering in the log domain. Following the above considerations, the log-domain equivalents of all passive elements of the prototype filter were derived. Having established the equivalents, the procedure for designing high-order log-domain filters is quite facilitated. The validity of the proposed technique is demonstrated through simulation results for a fifth-order elliptic low-pass filter.