Spatial Distributions of Trapping Centers in HfO2/SiO2 Gate Stack

An analysis methodology for charge pumping (CP) measurements was developed and applied to extract spatial distributions of traps in SiO ₂/HfO₂ gate stacks. This analysis indicates that the traps accessible by CP measurements in the frequency range down to a few kilohertz are located primarily within the SiO₂ layer and HfO₂/SiO₂ interface region. The trap density in the SiO₂ layer increases closer to the high-kappa dielectric, while the trap spatial profile as a function of the distance from the high-kappa film was found to be dependent on high-kappa film characteristics. These results point to interactions with the high-kappa dielectric as a cause of trap generation in the interfacial SiO₂ layer     

Border-Trap Characterization in High-κ Strained-Si MOSFETs

In this letter, we focus on the border-trap characterization of TaN/HfO₂/Si and TaN/HfO₂/strained-Si/Si_0.8Ge_0.2 n-channel MOSFET devices. The equivalent oxide thickness for the gate dielectrics is 2 nm. Drain-current hysteresis method is used to characterize the border traps, and it is found that border traps are higher in the case of high-kappa films on strained- Si/Si_0.8Ge_0.2 .These results are also verified by the 1/f-noise measurements. Possible reasons for the degraded interface quality of high-kappa films on strained-Si are also proposed.     

Germanium MOSFETs With CeO2/HfO2/ TiN Gate Stacks

Long-channel Ge pMOSFETs and nMOSFETs were fabricated with high-kappa CeO₂/HfO₂/TiN gate stacks. CeO₂ was found to provide effective passivation of the Ge surface, with low diode surface leakage currents. The pMOSFETs showed a large I _ON/I_OFF ratio of 10⁶, a subthreshold slope of 107 mV/dec, and a peak mobility of approximately 90 cm² /Vmiddots at 0.25 MV/cm. The nMOSFET performance was compromised by poor junction formation and demonstrated a peak mobility of only ~3 cm²/Vmiddots but did show an encouraging I_ON/I _OFF ratio of 10⁵ and a subthreshold slope of 85 mV/dec     

Direct Observation of Anomalous Positive Charge and Electron-Trapping Dynamics in High-k Films Using Pulsed-MOS-Capacitor Measurements

Due to the rapid transient charging and discharging effects in high-k dielectrics, conventional "stress and sense" techniques cannot be reliably applied to study the oxide traps in these dielectrics. We introduce a new transient methodology based on the pulsed-MOS-capacitor measurement, which allows us to observe aspects of the dynamics of transient charging and discharging behavior in the high-k dielectric. The method is relatively simple and easy to employ. It has the advantage that the surface is depleted during the initial transient allowing the effect of anomalous positive charge and electron trapping to be isolated. We apply this technique to explain oxide charging in HfO₂ samples deposited by atomic layer deposition and metal-organic chemical vapor deposition     

A high performance MIM capacitor using HfO2 dielectrics

Metal-insulator-metal (MIM) capacitors with a 56 nm thick HfO₂ high-κ dielectric film have been fabricated and demonstrated for the first of time with a low thermal budget (~200°C). Voltage linearity, temperature coefficients of capacitance, and electrical properties are all characterized. The results show that the HfO₂ MIM capacitor can provide a higher capacitance density than Si₃N₄ MIM capacitor while still maintaining comparable voltage and temperature coefficients of capacitance. In addition, a low leakage current of 2×10^-9 A/cm² at 3 V is achieved. All of these make the HfO ₂ MIM capacitor to be very suitable for use in silicon RF and mixed signal IC applications     

Low-frequency noise in Si0.7Ge0.3 surface channel pMOSFETs with ALD HfO2/Al2O3 gate dielectrics

Low-frequency noise was characterized in Si_0.7Ge_0.3 surface channel pMOSFETs with ALD Al₂O₃/HfO₂/Al₂O₃ stacks as gate dielectrics. The influences of surface treatment prior to ALD processing and thickness of the Al₂O₃ layer at the channel interface were investigated. The noise was of the 1/f type and could be modeled as a sum of a Hooge mobility fluctuation noise component and a number fluctuation noise component. Mobility fluctuation noise dominated the 1/f noise in strong inversion, but the number fluctuation noise component, mainly originating from traps in HfO₂, also contributed closer to threshold and in weak inversion. The number fluctuation noise component was negligibly small in a device with a 2 nm thick Al₂O₃ layer at the SiGe channel interface, which reduced the average 1/f noise by a factor of two and decreased the device-to-device variations.     

Study of the Reliability Impact of Chlorine Precursor Residues in Thin Atomic-Layer-Deposited HfO2 Layers

Atomic layer deposition (ALD) with HfCl₄ as a precursor is widely used for HfO₂ fabrication. Due to the nature of the precursor under study, i.e., HfCl₄ and H₂O, the presence of chlorine residues in the film due to insufficient hydrolysis is eminent. Obviously, the chlorine residue in the HfO₂ film is suspected to affect the quality of the HfO₂ film. In this paper, The authors reduced the concentration of chlorine residues by increasing the H₂O oxidant pulse time in between the deposition cycles from 0.3 to 10 and 90 s. Time-of-flight secondary ion mass spectrometry analysis shows that this decreases the chlorine concentration in the HfO₂ film by more than one order of magnitude. However, time-dependent dielectric breakdown analysis shows that the lifetime remains quasi unaffected (within identical error bars) for the different injection cycles. Charge pumping analysis was done by varying both pulse frequency and amplitude to investigate the creation of defects, but negligible differences were observed. Therefore, the presence of chlorine residues has no significant impact on the trap generation and reliability of ALD HfO₂ layers, and this result corresponded with the mobility result. The experimental picture is confirmed with first-principle calculations that show that the presence of chlorine residues does not induce defect levels in the bandgap of HfO₂     

Reliability assessment of SiO2/ZrO2 stack gate dielectric on strained-Si/Si0.8Ge0.2 heterolayers under dynamic and AC stress

The reliability characteristics of SiO₂/ZrO₂ gate dielectric stacks on strained-Si/Si_0.8Ge_0.2 have been investigated under dynamic and pulsed voltage stresses of different amplitude and frequency in order to analyze the transient response and the degradation of oxide as a function of stress parameters. The current transients observed in dynamic voltage stresses have been interpreted in terms of the charging/discharging of interface and bulk traps. The evolution of the current during unipolar pulsed voltage stresses shows the degradation being much faster at low frequencies than at high frequencies. Results have been compared with those obtained after CVS, as a function of injected charge and pulse frequency.     

Charge Trapping and TDDB Characteristics of Ultrathin MOCVD HfO2 Gate Dielectric on Nitrided Germanium

In this letter, we investigate the long-term reliability characteristics of ultrathin HfO₂ dielectrics on nitrided germanium for the first time. Stress-polarity dependence in charge trapping and time-dependent dielectric-breakdown (TDDB) characteristics has been observed in germanium nand p-type devices. The p-MOS devices exhibit severe charge trapping under stress, while no significant charge trapping and stress-induced leakage current were found in the n-MOS devices. In terms of operation-voltage projection for a ten-year lifetime, V_g=2.8 and -2.1 V is projected for the germanium p- and n-MOS devices, respectively, with an equivalent oxide thickness of 11 Aring. Compared to Si control samples, germanium devices show a comparable projected operation voltage, indicating that the TDDB for high-kappa dielectrics on nitrided germanium is not a concern. The stress-polarity dependence in germanium devices is believed to result from the asymmetrical band structure and the significant difference of the electric field strength across the gate dielectric between the positive and negative stress conditions     

Partial Crystallization of HfO2 for Two-Bit/Four-Level SONOS-Type Flash Memory

The nonvolatile memory properties of the partially crystallized HfO₂ charge storage layer are investigated using short-channel devices of gate length L_g down to 80 nm. Highly efficient two-bit and four-level device operation is demonstrated by channel hot electron injection programming and hot hole injection erasing for devices of L_g > 170 nm, although the reduction of the memory window is observed for devices of L_g < 170 nm. A memory window of 5.5 V, ten-year retention of V_th clearance larger than 1.5 V between adjacent levels, endurance for 10⁵ programming/erasing cycles, and immunity to programming disturbances are demonstrated. Flash memory with partially crystallized HfO₂ shows a larger memory window than HfO₂ nanodot memory, assisted by the enhanced electron capture efficiency of an amorphous HfO₂ matrix, which is lacking in other types of reported nanodot memory. The scalability, programming speed, V_th control for two-bit and four-level operation, endurance, and retention are also improved, compared with NROM devices that use a Si₃N₄ trapping layer.     

Fluorine Passivation in Gate Stacks of Poly-Si/TaN/HfO2 (and HfSiON/HfO2)/Si Through Gate Ion Implantation

Fluorine passivation in poly-Si/TaN/HfO₂/p-Si and poly-Si/TaN/HfSiON/HfO₂/p-Si gate stacks with varying TaN thickness through gate ion implantation has been studied. It has been found that when TaN thickness was less than 15 nm, mobility and subthreshold swing improved significantly in HfO₂ nMOSFETs; while there was little performance improvement in HfSiON/HfO₂ nMOSFETs due to the blocking of F atoms by the HfSiON layer in gate dielectrics, as has been proved by the electron energy loss spectroscopy mapping     

Electrical Characteristics of Memory Devices With a High- k HfO2 Trapping Layer and Dual SiO2/Si3N4 Tunneling Layer

A novel device structure with a high-k HfO₂ charge storage layer and dual tunneling layer (DTL) (SiO₂/Si₃N₄) is presented in this paper. Combining advantages of the high trapping efficiency of high-k materials and enhanced charge injection from the substrate through the DTL, the device achieves a fast program/erase speed and a large memory window. The device demonstrates excellent retention due to its physically thick DTL and also improved endurance without any increase of programming V_th throughout the cyclic test as compared with SONOS Flash memory devices using an Si₃N₄ trapping layer.     

磁控管用新型直热式稀土铪酸钆陶瓷阴极研究

为了提高大功率磁控管的输出功率,延长其使用寿命,采用难熔稀土氧化钆和过渡金属氧化铪制备大功率磁控管用新型直热式稀土铪酸钆陶瓷阴极,并对该阴极的热发射特性和寿命特性等进行了测试,热发射测试结果显示该阴极在1300℃ br即可提供0.1A/cm²发射电流密度,1600℃ br下可提供超过1.93A/cm²的发射电流密度.寿命实验结果显示,该阴极在1500℃ br,直流负载为0.5A/cm²的条件下,寿命已经超过4000h.最后,利用X射线衍射仪、扫描电镜、能谱分析仪、氩离子深度刻蚀俄歇电镜等设备分别对该阴极活性物质的分子结构,阴极表面微观形貌、元素成分及含量等进行了分析.结果表明,高温烧结合成了单一的铪酸钆物相,烧结过程中当一种Gd³⁺价稀土氧化钆掺入Hf⁴⁺价的过渡金属氧化铪时,会发生离子置换固溶,为了保持铪酸钆晶格的电中性,晶格中就会产生一个氧空位.当阴极在激活、老练、热发射测试时,会加速氧空位的生成,产生的氧空位越多,阴极表面导电性就会越好,这间接降低了逸出功,从而提高了阴极的热发射能力.     

不同退火氛围对TiN/HfO2/SiO2/Si结构电荷分布的影响

热退火技术是集成电路制造过程中用来改善材料性能的重要手段。系统分析了两种不同的退火条件(氨气氛围和氧气氛围)对TiN/HfO₂/SiO₂/Si结构中电荷分布的影响,给出了不同退火条件下SiO₂/Si和HfO₂/SiO₂界面的界面电荷密度、HfO₂的体电荷密度以及HfO₂/SiO₂界面的界面偶极子的数值。研究结果表明,在氨气和氧气氛围中退火会使HfO₂/SiO₂界面的界面电荷密度减小、界面偶极子增加,而SiO₂/Si界面的界面电荷密度几乎不受退火影响。最后研究了不同退火氛围对电容平带电压的影响,发现两种不同的退火条件都会导致TiN/HfO₂/SiO₂/Si电容结构平带电压的正向漂移,基于退火对其电荷分布的影响研究,此正向漂移主要来源于退火导致的HfO₂/SiO₂界面的界面偶极子的增加。     

Yttrium- and Terbium-Based Interlayer on SiO2 and HfO2 Gate Dielectrics for Work Function Modulation of Nickel Fully Silicided Gate in nMOSFET

Novel yttrium- and terbium-based interlayers (Y_IL and Tb_IL, respectively) on SiO₂ and HfO₂ gate dielectrics were employed for NMOS work function Phi_m modulation of undoped nickel fully silicided (Ni-FUSI) gate. Bandedge Ni-FUSI gate Phi_m of ~4.11 and ~4.07 eV was obtained by insertion of ultrathin (~1 nm) Y_IL and Tb_IL, respectively, on the SiO₂ gate dielectric in a gate-first process (with 1000 degC anneal). NiSi Phi_m on SiO₂ could also be tuned between the Si midgap and the conduction bandedge E_C by varying the interlayer thickness. The achievement of NiSi Phi_m around 4.28 eV on the HfO₂ gate dielectric using interlayer insertion makes this an attractive Phi_m modulation technique for Ni-FUSI gates on SiO₂ and high-k dielectrics     

In Situ Comparison of Si/High- $kappa$ and $hbox{Si}/ hbox{SiO}_{2}$ Channel Properties in SOI MOSFETs

Detailed measurements of front- and back-channel characteristics in advanced SOI MOSFETs (ultrathin Si film, high-kappa, metal gate, and selective epitaxy of source/drain) are used to reveal and compare the transport properties at the corresponding Si/high- kappa (HfO₂ or HfSiON) and Si/SiO₂ interfaces. Low-temperature operation magnifies the difference between these two interfaces in terms of carrier mobility, threshold voltage, and subthreshold swing. As compared with Si/SiO₂, the low-field mobility is lower at the Si/high-kappa interface and increases less rapidly at low temperature, reflecting additional scattering mechanisms governed by high-kappa and neutral defects.     

Electrical characteristics of highly reliable ultrathin hafniumoxide gate dielectric

Electrical and reliability properties of ultrathin HfO₂ have been investigated. Pt electroded MOS capacitors with HfO₂ gate dielectric (physical thickness ~45-135 Å and equivalent oxide thickness ~13.5-25 Å) were fabricated. HfO₂ was deposited using reactive sputtering of a Hf target with O₂ modulation technique. The leakage current of the 45 Å HfO₂ sample was about 1×10^-4 A/cm ² at +1.0 V with a breakdown field ~8.5 MV/cm. Hysteresis was <100 mV after 500°C annealing in N₂ ambient and there was no significant frequency dispersion of capacitance (<1%/dec.). It was also found that HfO₂ exhibits negligible charge trapping and excellent TDDB characteristics with more than ten years lifetime even at V_DD=2.0 V     

Electrical Characterization of ZrO2/Si Interface Properties in MOSFETs With ZrO2 Gate Dielectrics

MOSFETs incorporating ZrO₂ gate dielectrics were fabricated. The I_DS-V_DS, I_DS-V_GS , and gated diode characteristics were analyzed to investigate the ZrO₂/Si interface properties. The interface trap density (D _it) was determined to be about 7.4times10¹² cm ^-2middoteV^-1 using subthreshold swing measurement. The surface-recombination velocity (s₀) and the minority carrier lifetime in the field-induced depletion region (tau _0,FIJ) measured from the gated diodes were about 3.5times10 ³ cm/s and 2.6times10^-6 s, respectively. The effective capture cross section of surface state (sigma_s) was determined to be about 5.8times10^-16 cm² using the gated diode technique and the subthreshold swing measurement. A comparison with conventional MOSFETs using SiO₂ gate oxides was also made     

Stimulated Raman shifting of the Nd:YAG fourth harmonic (266 nm) inH2, HD, and D2

The dependence of the first Stokes stimulated Raman conversion efficiency of fourth-harmonic radiation from a Nd:YAG laser at 266 nm has been studied for the isotopic species H₂, HD, and D₂ as a function of gas pressure and laser energy using a low numerical aperture (~4.5×10^-3) pumping geometry. While the laser energy threshold for first Stokes conversion is seen to vary significantly between the species it has been found that photon conversion efficiencies of at least 50% can be achieved for all of them for laser pump energies at 266 nm ⩽50 mJ/pulse. This study provides a new measurement of the differential cross section for stimulated Raman scattering in HD of 8.1±2.4×10^-29 cm²/sr at 266 nm and at high pressures, and agreement is found with previous measurements of the cross sections for H₂ and D₂. The results have been used to optimize the laser transmitter system for a differential absorption lidar (DIAL) system to measure tropospheric ozone concentration profiles     

The Effect of Nanoscale Nonuniformity of Oxygen Vacancy on Electrical and Reliability Characteristics of HfO2 MOSFET Devices

To understand the influence of oxygen vacancies in on the electrical and reliability characteristics, we have investigated area-dependent leakage-current characteristics of HfO₂ with large-area device and conducting atomic force microscopy (C-AFM). Unlike with the large-area analysis with typical capacitor and transistor, a clear evidence of oxygen vacancy was observed in nanoscale-area measurement using the C-AFM. Similar observations were made in various postdeposition annealing ambients to investigate the generation and reduction of oxygen vacancy in HfO₂ . With optimized postdeposition annealing for oxygen vacancy, significantly reduced charge trapping was observed in HfO₂ nMOSFET.