A compare of electrical characteristics in Al/p-Si (MS) and Al/C20H12/p-Si (MPS) type diodes using current–voltage (I–V) and capacitance–voltage (C–V) measurements

In this study, both the metal-semiconductor (MS) and metal-polymer-semiconductor (MPS), (Al/C₂₀H₁₂/p-Si), type Schottky barrier diodes (SBDs) were fabricated using spin coating method and they were called as D₁ and D₂ diodes, respectively. Their electrical characterization have been investigated and compared using the forward and reverse bias I–V and C–V measurements at room temperature. The main electrical parameters such as ideality factor (n), reverse saturation current (I_o), zero-bias barrier height (Φ_Bo), series (R_s) and shunt (R_sh) resistances, energy dependent profile of interface states (N_ss), the doping concentration of acceptor atoms (N_A) and depletion layer width (W_D) were determined and compared each other and literature. The rectifying ratio (RR) and leakage current (I_R) at ±3 V were found as 2.06×10³, 1.61×10⁻⁶ A and 15.7×10³, 2.75×10⁻⁷ A for D₁ and D₂, respectively. Similarly, the R_s and R_sh values of these diodes were found as 544 Ω, 10.7 MΩ and 716 Ω and 1.83 MΩ using Ohm’s Law, respectively. In addition, energy and voltage dependent profiles of N_ss were obtained using the forward bias I–V data by taking into account voltage dependent effective barrier height (Φ_e) and n and low-high frequency capacitance (C_LF–C_HF) methods, respectively. The obtained value of N_ss for D₂ (MPS) diode at about the mid-gap of Si is about two times lower than D₁ (MS) type diode. Experimental results confirmed that the performance in MPS type SBD is considerably high according to MS diode in the respect of lower values of N_ss, R_s and I_o and higher values of RR and R_sh.     

The temperature dependent analysis of Au/TiO2 (rutile)/n-Si (MIS) SBDs using current–voltage–temperature (I–V–T) characteristics

In this study, the main electrical parameters of Au/TiO₂(rutile)/n-Si Schottky barrier diodes (SBDs) were analyzed by using current–voltage–temperature (I–V–T) characteristics in the temperature range 200–380 K. Titanium dioxide (TiO₂) thin film was deposited on a polycrystalline n-type Silicon (Si) substrate using the DC magnetron sputtering system at 200 °C. In order to improve the crystal quality deposited film was annealed at 900 °C in air atmosphere for phase transition from amorphous to rutile phase. The barrier height (Φ_b) and ideality factor (n) were calculated from I–V characteristics. An increase in the value of Φ_b and a decrease in n with increasing temperature were observed. The values of Φ_b and n for Au/TiO₂(rutile)/n-Si SBDs ranged from 0.57 eV and 3.50 (at 200 K) to 0.82 eV and 1.90 (at 380 K), respectively. In addition, series resistance (R_s) and Φ_b values of MIS SBDs were determined by using Cheung's and Norde's functions. Cheung's plots are obtained from the donward concave curvature region in the forward bias semi-logarithmic I–V curves originated from series resistance. Norde's function is easily used to obtain series resistance as a function of temperature due to current counduction mechanism which is dominated by thermionic emission (TE). The obtained results have been compared with each other and experimental results show that R_s values exhibit an unusual behavior that it increases with increasing temperature.     

The source of negative capacitance and anomalous peak in the forward bias capacitance-voltage in Cr/p-si Schottky barrier diodes (SBDs)

The frequency and voltage dependence of capacitance–voltage (C–V) and conductance-voltage (G/ω−V) characteristics of the Cr/p-Si metal semiconductor (MS) Schottky barrier diodes (SBDs) were investigated in the frequency and applied bias voltage ranges of 10 kHz to 5 MHz and (−4 V)−(+4 V), respectively, at room temperature. The effects of series resistance (R_s) and density distribution of interface states (N_ss), both on C–V and G/ω−V characteristics were examined in detail. It was found that capacitance and conductance, both, are strong functions of frequency and applied bias voltage. In addition, both a strong negative capacitance (NC) and an anomalous peak behavior were observed in the forward bias C–V plots for each frequency. Contrary to the behavior of capacitance, conductance increased with the increasing applied bias voltage and there happened a rapid increase in conductance in the accumulation region for each frequency. The extra-large NC in SBD is a result of the existence of R_s, N_ss and interfacial layer (native or deposited). In addition, to explain the NC behavior in the forward bias region, we drew the C–I and G/ω−I plots for various frequencies at the same bias voltage. The values of C decrease with increasing frequency at forward bias voltages and this decrease in the NC corresponds to an increase in conductance. The values of N_ss were obtained using a Hill–Coleman method for each frequency and it exhibited a peak behavior at about 30 kHz. The voltage dependent profile of R_s was also obtained using a Nicollian and Brews methods.     

A detailed comparative study on the main electrical parameters of Au/n-Si and Au/PVA:Zn/n-Si Schottky barrier diodes

We have fabricated Au/n-Si and Au/PVA:Zn/n-Si Schottky barrier diodes (SBDs) to investigate the effect of organic interfacial layer on the main electrical characteristics. Zn doped poly(vinyl alcohol) (PVA:Zn) was successfully deposited on n-Si substrate by using the electrospinning system and surface morphology of PVA:Zn was presented by SEM images. The current–voltage (I–V) characteristics of these SBDs have been investigated at room temperature. The experimental results show that interfacial layer enhances the device performance in terms of ideality factor (n), zero-bias barrier height (Φ_B0), series resistance (R_s), and shunt resistance (R_sh) with values of 1.38, 0.75 eV, 97.64 Ω, and 203 MΩ whereas those of Au/n-Si SBD are found as 1.65, 0.62 eV, 164.15 Ω and 0.597 MΩ, respectively. Also, this interfacial layer at metal/semiconductor (M/S) interface leads to a decrease in the magnitude of leakage current and density of interface states (N_ss). The values of N_ss range from 1.36×10¹² at E_c—0.569 eV to 1.35×10¹³ eV^?1 cm^?2 at E_c—0.387 eV for Au/PVA:Zn/n-Si SBD and 3.34×10¹² at E_c—0.560 eV to 1.35×10¹³ eV^?1 cm^?2 at E_c—0.424 eV for Au/n-Si SBD. The analysis of experimental results reveals that the existence of PVA:Zn interfacial layer improves the performance of such devices.     

The effect of frequency and temperature on capacitance/conductance–voltage (C/G–V) characteristics of Au/n-GaAs Schottky barrier diodes (SBDs)

The capacitance–voltage (C–V) and conductance–voltage (G/ω–V) characteristics of the Au/n-GaAs Schottky barrier diodes (SBDs) have been investigated for 10, 100 and 500 kHz at 80 and 280 K. To evaluate the reason of non-ideal behavior in C–V and G/ω–V plots, the measured C and G/ω values were corrected by taking into accounts series resistance effect. Experimental results show that the values of C and G/ω were found to be a strong function of interface states (N_ss) at inverse and depletion regions especially at low frequencies, but R_s is effective only at the accumulation region especially at high frequencies. Such behavior of the C and G/ω values may be attributed to an increase in polarization especially at low frequencies and the existence of N_ss or dislocations between metal and semiconductor. It can be concluded that the increase in C and G/ω at low frequencies especially at weak and depletion regions results from the existence of N_ss. The values of doping concentration (N_d) and barrier height (BH) between metal and semiconductor were also obtained from the linear part of high frequency (500 kHz) C⁻² vs. V plots at 80 and 280 K, respectively.     

Analysis of interface states and series resistance of MIS Schottky diodes using the current-voltage (I-V) characteristics

The purpose of this paper is to analyze interface states in Al/SiO₂/p-Si (MIS) Schottky diodes and determine the effect of SiO₂ surface preparation on the interface state energy distribution. The current-voltage (I-V) characteristics of MIS Schottky diodes were measured at room temperature. From the I-V characteristics of the MIS Schottky diode, ideality factor (n) and barrier height (Φ_B) values of 1.537 and 0.763 eV, respectively, were obtained from a forward bias I-V plot. In addition, the density of interface states (N_ss) as a function of (E_ss-E_v) was extracted from the forward bias I-V measurements by taking into account both the bias dependence of the effective barrier height (Φ_e), n and R_s for the MIS Schottky diode. The diode shows non-ideal I-V behaviour with ideality factor greater than unity. In addition, the values of series resistance (R_s) were determined using Cheung’s method. The I-V characteristics confirmed that the distribution of N_ss, R_s and interfacial insulator layer are important parameters that influence the electrical characteristics of MIS Schottky diodes.     

Determination of contact parameters of Ni/n-GaP Schottky contacts

The electrical analysis of Ni/n-GaP structure has been investigated by means of current–voltage (I–V), capacitance–voltage (C–V) and capacitance–frequency (C–f) measurements in the temperature range of 120–320 K in dark conditions. The forward bias I–V characteristics have been analyzed on the basis of standard thermionic emission (TE) theory and the characteristic parameters of the Schottky contacts (SCs) such as Schottky barrier height (SBH), ideality factor (n) and series resistance (R_s) have been determined from the I–V measurements. The experimental values of SBH and n for the device ranged from 1.01 eV and 1.27 (at 320 K) to 0.38 eV and 5.93 (at 120 K) for Ni/n-GaP diode, respectively. The interface states in the semiconductor bandgap and their relaxation time have been determined from the C–f characteristics. The interface state density N_ss has ranged from 2.08 × 10¹⁵ (eV^?1 m^?2) at 120 K to 2.7 × 10¹⁵ (eV^?1 m^?2) at 320 K. C_ss has increased with increasing temperature. The relaxation time has ranged from 4.7 × 10^?7 s at 120 K to 5.15 × 10^?7 s at 320 K.     

Electrical characterization of current conduction in Au/TiO2/n-Si at wide temperature range

In this study, we have examined Au/TiO₂/n-Si Schottky barrier diodes (SBDs), in order to interpret in detail the experimental observed non-ideal current–voltage–temperature (I–V–T) characteristics. I–V characteristics were measured in the wide temperature range of 80–400 K. TiO₂ was deposited on n-Si substrate by reactive magnetron sputtering. The zero-bias barrier height (ϕ_B0) and ideality factor (n) show strong temperature dependence. While n decreases, ϕ_B0 increases with increasing temperature. Experimental results show that the current across the SBDs may be greatly influenced by the existence of Schottky barrier height (SBH) inhomogeneity. These temperature behaviors have been explained on the basis of the thermionic emission (TE) theory with Gaussian distribution (GD) of the barrier heights (BHs) due to BH inhomogeneities at metal–semiconductor (M/S) interface. From this assumptions, obtaining Richardson constant value of the A^* 121.01 A/cm² K² is perfect agreement with the theoretical value of 120 A/cm² K² for n-type Si. Hence, behaviors of the forward-bias I–V characteristics of the Au/TiO₂/n-Si (SBDs) can be successfully explained on the basis of a TE mechanism with a double Gaussian distribution of the BHs.     

Frequency and voltage dependence of negative capacitance in Au/SiO2/n-GaAs structures

The frequency (f) and bias voltage (V) dependence of electrical and dielectric properties of Au/SiO₂/n-GaAs structures have been investigated in the frequency range of 10 kHz–3 MHz at room temperature by considering the presence of series resistance (R_s). The values of R_s, dielectric constant (ε′), dielectric loss (ε″) and dielectric loss tangent (tan δ) of these structures were obtained from capacitance–voltage (C–V) and conductance–voltage (G/ω–V) measurements and these parameters were found to be strong functions of frequency and bias voltage. In the forward bias region, C–V plots show a negative capacitance (NC) behavior, hence ε′–V plots for each frequency value take negative values as well. Such negative values of C correspond to the maximum of the conductance (G/ω). The crosssection of the C–V plots appears as an abnormality when compared to the conventional behavior of ideal Schottky barrier diode (SBD), metal–insulator–semiconductor (MIS) and metal–oxide–semiconductor (MOS) structures. Such behavior of C and ε′ has been explained with the minority-carrier injection and relaxation theory. Experimental results show that the dielectric properties of these structures are quite sensitive to frequency and applied bias voltage especially at low frequencies because of continuous density distribution of interface states and their relaxation time.     

The effect of Mo-doped PVC+TCNQ interfacial layer on the electrical properties of Au/PVC+TCNQ/p-Si structures at room temperature

The effect of Mo-doped and undoped PVC+TCNQ interfacial layer on electrical characteristics of a Au/PVC+TCNQ/p-Si structure was investigated using current–voltage (I–V), capacitance–voltage (C–V) and conductance–voltage (G/ω–V) measurements at room temperature. The energy dependent interface states density (N_ss) was obtained from the forward bias I–V data by taking into account voltage dependent effective barrier height (Φ_e) for two diodes, i.e. with and without Mo doping. The voltage dependent resistance (R_i) of structures was also obtained using Ohm׳s law and the method of Nicollian and Brews for the diodes. In order to eliminate the effect of series resistance (R_s), C and G/ω at high frequency values were corrected. N_ss and R_s values were compared between the diodes and experimental results showed that N_ss and R_s values of the Mo-doped PVC+TCNQ structure are considerably lower than those of the undoped PVC+TCNQ structure. The other important parameters such as ideality factor (n), reverse saturation current (I_s), zero-bias barrier heights (Φ_Bo) and R_s were obtained from forward bias I–V data by using I–V, Cheung and Norde methods. Experimental results confirmed that the Mo-doped (PVC+TCNQ) layer considerably improved the performance of the Au/PVC+TCNQ/p-Si structure.     

Evaluation of lateral barrier height of inhomogeneous photolithography-fabricated Au/n-GaAs Schottky barrier diodes from 80 K to 320 K

In order to evaluate current conduction mechanism in the Au/n-GaAs Schottky barrier diode (SBD) some electrical parameters such as the zero-bias barrier height (BH) Φ_bo(I–V) and ideality factor (n) were obtained from the forward bias current–voltage (I–V) characteristics in wide temperature range of 80–320 K by steps of 10 K. By using the thermionic emission (TE) theory, the Φ_bo(I–V) and n were found to depend strongly on temperature, and the n decreases with increasing temperature while the Φ_bo(I–V) increases. The values of Φ_bo and n ranged from 0.600 eV and 1.51(80 K) to 0.816 eV and 1.087 (320 K), respectively. Such behavior of Φ_bo and n is attributed to Schottky barrier inhomogeneities by assuming a Gaussian distribution (GD) of BHs at Au/n-GaAs interface. In the calculations, the electrical parameters of the experimental forward bias I–V characteristics of the Au/n-GaAs SBD with the homogeneity in the 80–320 K range have been explained by means of the TE, considering GD of BH with linear bias dependence.     

Carrier transport mechanisms and photovoltaic properties of Au/p-ZnPc/Al device

The dark current density–voltage characteristic of Au/ZnPc/Al device at room temperature has been investigated. Results showed a rectification behavior. At low forward bias, the current density was found to be ohmic, while at high voltages, space charge limited the current mechanism dominated by exponential trapping levels. Junction parameters such as rectification ratio (RR), series resistance (R_s), and shunt resistance (R_sh) were found to be 9.42, 9.72 MΩ, and 0.88 × 10³ MΩ, respectively. The current density–voltage characteristics under white light illumination (100 W/m²) gives values of 0.55 V, 3 × 10⁻³ A/m², 0.18 and 5.8 × 10⁻⁴% for the open circuit voltage, V_oc, the short circuit current density (J_sc), the fill factor (FF), and conversion efficiency (η), respectively.     

Characteristics of RF reactive sputter-deposited Pt/SiO2/n-InGaN MOS Schottky diodes

All RF sputtering-deposited Pt/SiO₂/n-type indium gallium nitride (n-InGaN) metal–oxide–semiconductor (MOS) diodes were investigated before and after annealing at 400 °C. By scanning electron microscopy (SEM), the thickness of Pt, SiO_2, n-InGaN layer was measured to be ~250, 70, and 800 nm, respectively. AFM results also show that the grains become a little bigger after annealing, the surface topography of the as-deposited film was smoother with the rms roughness of 1.67 nm and had the slight increase of 1.92 nm for annealed sample. Electrical properties of MOS diodes have been determined by using the current–voltage (I–V) and capacitance–voltage (C–V) measurements. The results showed that Schottky barrier height (SBH) increased slightly to 0.69 eV (I–V) and 0.82 eV (C–V) after annealing at 400 °C for 15 min in N₂ ambient, compared to that of 0.67 eV (I–V) and 0.79 eV (C–V) for the as-deposited sample. There was the considerable improvement in the leakage current, dropped from 6.5×10⁻⁷ A for the as-deposited to 1.4×10⁻⁷ A for the 400 °C-annealed one. The annealed MOS Schottky diode had shown the higher SBH, lower leakage current, smaller ideality factor (n), and denser microstructure. In addition to the SBH, n, and series resistance (R_s) determined by Cheungs׳ and Norde methods, other parameters for MOS diodes tested at room temperature were also calculated by C–V measurement.     

Frequency and voltage dependency of interface states and series resistance in Al/SiO2/p-Si MOS structure

The capacitance–voltage (C–V) and conductance–voltage (G/ω–V) characteristics of Al/SiO₂/p-Si metal-oxide-semiconductor (MOS) Schottky diodes have been measured in the voltage range from ?3 to +3 V and frequency range from 5 KHz to 1 MHz at room temperature. It is found that both C and G/ω of the MOS capacitor are very sensitive to frequency. The fairly large frequency dispersion of C–V and G/ω–V characteristics can be interpreted in terms of the particular distribution of interface states at SiO₂/Si interface and the effect of series resistance. At relatively low frequencies, the interface states can follow an alternating current (AC) signal that contributes to excess capacitance and conductance. This leads to an anomalous peak of C–V curve in the depletion and accumulation regions. In addition, a peak at approximately ?0.2 V appears in the R_s–V profiles at low frequency. The peak values of the capacitance and conductance decrease with increasing frequency. The density distribution profile of interface state density (N_ss) obtained from C_HF–C_LF capacitance measurement also shows a peak in the depletion region.     

Origin of forward bias capacitance peak and intersection behavior of C and G/w of Ag/p-InP Schottky barrier diodes

Frequency-dependent electrical characteristics of Ag/p-InP diodes have been determined using impedance spectroscopy at room temperature. Series resistance (R_s) and interface state(s) (N_ss) values were extracted from capacitance (C) and conductance (G/w) data using the Nicollian and Goetzberger and Hill–Coleman methods, respectively. C and G/w data were also corrected in the whole measured bias voltage range to obtain real diode capacitance C_c and conductance G_c values in order to see the effects of R_s. Both the C–V and R_s–V plots showed anomalous peak in depletion region especially at low frequencies due to the existence of N_ss. C–V and G/w–V plots crossed at a certain bias voltage and this point shifted toward negative bias voltages with increasing frequency and then disappeared at 3 MHz. Also, decrease in C values corresponds to an increase in G/w values in the same bias voltages.     

Effects of PCBM concentration on the electrical properties of the Au/P3HT:PCBM/n-Si (MPS) Schottky barrier diodes

In this study, the gold/poly(3-hexylthiophene):[6,6]-phenyl C61 butyric acid methyl ester/n-type silicon (Au/P3HT:PCBM/n-Si) metal–polymer–semiconductor (MPS) Schottky barrier diodes (SBDs) were investigated in terms of the effects of PCBM concentration on the electrical parameters. The forward and reverse bias current–voltage (I–V) characteristics of the Au/P3HT:PCBM/n-Si MPS SBDs fabricated by using the different P3HT:PCBM mass ratios were studied in the dark, at room temperature. The main electrical parameters, such as ideality factor (n), barrier height (Φ_B0), series resistance (R_s), shunt resistance (R_sh), and density of interface states (N_ss) were determined from I–V characteristics for the different P3HT:PCBM mass ratios (2:1, 6:1 and 10:1) used diodes. The values of n, R_s, Φ_B0, and N_ss were reduced, while the carrier mobility and current were increased, by increasing the PCBM concentration in the P3HT:PCBM organic blend layer. The ideal values of electrical parameters were obtained for 2:1 P3HT:PCBM mass ratio used diode. This shows that the electrical properties of MPS diodes strongly depend on the PCBM concentration of the P3HT:PCBM organic layer. Moreover, increasing the PCBM concentration in P3HT:PCBM organic blend layer improves the quality of the Au/P3HT:PCBM/n-Si (MPS) SBDs which enables the fabrication of high-quality electronic and optoelectronic devices.     

AlGaN/GaN Schottky barrier diodes on silicon substrates with various Fe doping concentrations in the buffer layers

This study demonstrated AlGaN/GaN Schottky barrier diodes (SBDs) for use in high-frequency, high-power, and high-temperature electronics applications. Four structures with various Fe doping concentrations in the buffer layers were investigated to suppress the leakage current and improve the breakdown voltage. The fabricated SBD with an Fe-doped AlGaN buffer layer of 8 × 10¹⁷ cm^− 3 realized the highest on-resistance (R_ON) and turn-on voltage (V_ON) because of the memory effect of Fe diffusion. The optimal device was the SBD with an Fe-doped buffer layer of 7 × 10¹⁷ cm^− 3, which exhibited a R_ON of 31.6 mΩ-cm², a V_ON of 1.2 V, a breakdown voltage of 803 V, and a buffer breakdown voltage of 758 V. Additionally, the low-frequency noise decreased when the Fe doping concentration in the buffer layer was increased. This was because the electron density in the channel exhibited the same trend as that of the Fe doping concentration in the buffer layer.     

Electrical characterization of MS and MIS structures on AlGaN/AlN/GaN heterostructures

The forward and reverse bias I-V, C-V, and G/ω-V characteristics of (Ni/Au) Schottky barrier diodes (SBDs) on the Al_0.22Ga_0.78N/AlN/GaN high-electron-mobility-transistor (HEMTs) without and with SiN_x insulator layer were measured at room temperature in order to investigate the effects of the insulator layer (SiN_x) on the main electrical parameters such as the ideality factor (n), zero-bias barrier height (Ф_B0), series resistance (R_s), interface-state density (N_ss). The energy density distribution profiles of the N_ss were obtained from the forward bias I-V characteristics by taking into account the voltage dependence of the effective barrier height (Ф_e) and ideality factor (n_V) of devices. In addition, the N_ss as a function of E_c-E_ss was determined from the low-high frequency capacitance methods. It was found that the values of N_ss and R_s in SBD HEMTs decreases with increasing insulator layer thickness.     

Controlling the electrical characteristics of Au/n-Si structures by interfacial insulator layer

Admittance (C–V and G/ω–V) measurements of Au/n-Si (metal–semiconductor, MS) and Au/SnO₂/n-Si (metal–insulator–semiconductor, MIS) structures were carried out between 1 kHz and 1 MHz at room temperature to investigate the interfacial insulator layer effect on the electrical characteristics of Au/n-Si structures. Experimental results showed that MIS structure's capacitance (C) values, unlike those of MS structure, became stable especially at high frequencies in the accumulation region. Also, the insulator layer caused structure's shunt resistance (R_sh) to increase. It was found that series resistance (R_s) is more effective in the accumulation region at high frequencies after the correction was applied to C and G/ω data to eliminate the R_s effect. The density of interface states (D_is) was obtained using Hill–Coleman method, D_is values MIS structure was obtained smaller than those of MS structure. Results indicate that interfacial insulator layer brings about some improvements in electrical characteristics of Au/n-Si structures.