RF performance and modeling of Si/SiGe resonant interband tunneling diodes

The RF performance of two different Si-based resonant interband tunneling diodes (RITD) grown by low-temperature molecular beam epitaxy (LT-MBE) were studied. An RITD with an active region of B /spl delta/-doping plane/2 nm i-Si/sub 0.5/Ge/sub 0.5//1 nm i-Si/P /spl delta/-doping plane yielded a peak-to-valley current ratio (PVCR) of 1.14, resistive cutoff frequency (f/sub r0/) of 5.6 GHz, and a speed index of 23.3 mV/ps after rapid thermal annealing at 650/spl deg/C for 1 min. To the authors' knowledge, these are the highest reported values for any epitaxially grown Si-based tunnel diode. Another RITD design with an active region of 1 nm p+ Si/sub 0.6/Ge/sub 0.4//B /spl delta/-doping plane/4-nm iSi/sub 0.6/Ge/sub 0.4//2 nm i-Si/P /spl delta/-doping plane and annealed at 825/spl deg/C for 1 min had a PVCR of 2.9, an f/sub r0/ of 0.4 GHz, and a speed index of 0.2 mV/ps. A small signal model was established to fit the measured S/sub 11/ data for both device designs. Approaches to increase f/sub r0/ are suggested based on the comparison between these two diodes. The two devices exhibit substantially different junction capacitance/bias relationships, which may suggest the confined states in the /spl delta/-doped quantum well are preserved after annealing at lower temperatures but are reduced at higher temperature annealing. A comprehensive dc/RF semi-physical model was developed and implemented in Agilent advanced design system (ADS) software. Instabilities in the negative differential resistance (NDR) region during dc measurements were then simulated.     

Low leakage and high performance of nMOSFET using SiGe layer as a diffusion barrier

As a boron diffusion barrier, a 20 nm-thick Si_0.8Ge_0.2 layer was successfully utilized in n-channel MOSFETs for implementing a retrograded well structure. Compared with the conventional Si CMOS process, the developed n-channel MOSFET process provides an enhanced transconductance (7%) and lower sub-threshold swing which is nearly unchanged even at an increased drain-source voltage. Especially, because sub-threshold leakage current is one of the key issues in the MOS device scaling due to reduced threshold voltage, the usage of a Si_0.8Ge_0.2 layer in n-channel MOSFET was verified to be useful for low power and high performance even under aggressive scaling constraints.     

Fabrication of thick, high-quality strained SiGe layer on ultra-thin silicon-on-insulator and modeling of film strain

Fabrication of a thick strained SiGe layer on bulk silicon is hampered by the lattice mismatch and difference in the thermal expansion coefficients between Si and SiGe, and a high Ge content leads to severe strain in the SiGe film. When the thickness of the SiGe film is above a critical value (90 nm for 18% Ge), drastic deterioration of the film properties as well as dislocations will result. In comparison, a silicon-on-insulator (SOI) substrate with a thin top Si layer can mitigate the problems and so a thick SiGe layer with high Ge concentration can conceivably be synthesized. In the work reported here, a 110 nm thick high-quality strained Si_0.82Ge_0.18 layer was fabricated on an ultra-thin SOI substrate with a 30 nm top silicon layer using ultra-high vacuum chemical vapor deposition (UHVCVD). The thickness of the SiGe layer is larger than the critical thickness on bulk Si. Cross-sectional transmission electron microscopy (XTEM) reveals that the SiGe layer is dislocation-free and the atoms at the SiGe/Si interface are well aligned, even though X-ray diffraction (XRD) data indicate that the SiGe film is highly strained. The strain factors determined from the XRD and Raman results agree well.     

铟掺杂显著改善硫化锌薄膜光电性能研究

Abstract： This paper reports a new material, indium-doped ZnS （ZnS：In） film, which is fabricated for the first time to improve its electrical and optical performance. By electron beam evaporation technology and the optimized annealing treatment, high quality ZnS：In film is prepared. XRD indicates that the incorporation of 6 at.% indium atoms into ZnS film causes little lattice deformation. The AFM results imply that large sized particles are compactly dispersed in the ZnS：In layer and results in an unsmooth surface. Electrical and optical property tests show that the resistivity of ZnS film is greatly decreased to 4.46×10-2 Ω.cm and the optical transmittance is improved to 85% in the visible region. Comparing with the results in other literatures, significant progress in electrical/optical performance has been made in this paper.     

新型高性能电工材料应用特性建模的模块化设计

传统的电工材料主要是指电工产品中常用的导体材料、半导体材料、磁性材料以及电工绝缘材料等,然而随着社会的进步和科技的发展,新型高性能的电工材料因其优异的性能,给电工行业注入了新鲜的血液。尤其是它在军民两用高科技领域中的应用,有着出色的表现,同时,也在越来越多的领域中有着广泛的应用背景。     

绝缘层上应变SiGe沟道p-MOSFET电学特性模拟分析

利用数值模拟软件ISE TCAD对绝缘层上应变SiGe(SGOI)和Si(SOI)p-MOSFET的电学特性进行了二维数值模拟.计算结果表明,与传统的SOI p-MOSFET相比,SGOI p-MOSFET的漏源饱和电流几乎要高出两倍; 其亚阈值电流要高出1～3个数量级.Ge合金组分作为应变SiGe沟道MOSFET的重要参数,就不同Ge合金组分对SGOI p-MOSFET的电学特性的影响也进行了较为深入的研究.随着Ge合金组分的增大,SGOI p-MOSFET的总体电学性能有所提高.     

电气自动化在电气工程中的应用和改进

电气工程中应用电气自动化技术可以显著改善电气工程运行效率及质量,在电气工程建设数量及规模不断扩展的当下,应通过电气自动化的综合应用,提高电气工程的自动化及智能化水平。文章以电气工程为对象,探究电气自动化在电气工程中的应用形式,总结电气自动化效率改进措施,希望可以起到抛砖引玉之作用。     

Structure optimization of multi-finger power SiGe HBTs for thermal stability improvement

The two-dimensional temperature profile of a power SiGe HBT with traditional uniform emitter finger spacing is calculated, which shows that there is a higher temperature in the central region of the device. With the aid of the theoretical analysis, an optimized structure of the HBT with non-uniform emitter finger spacing is presented. The peak temperature is lowered by 23.82 K, and the thermal resistance is also improved by 15.09% compared with that of the uniform one. The improvements above are ascribed to the increasing the spacing between fingers, and hence suppressing the heat flow from adjacent fingers to the center finger. Based on the analytical results, two types of HBTs with uniform emitter finger spacing and non-uniform emitter finger spacing are fabricated and their temperature profiles and thermal resistance are measured. The measured results agree well with the calculated results, verifying the accuracy of the calculations. For the HBT with non-uniform emitter finger spacing, the peak temperature and the thermal resistance are improved markedly over a wide biasing range compared with that of the uniform one. Therefore, both the calculated results and the experimental results verify that the optimized structure of power HBT with non-uniform emitter finger spacing is superior to the uniform emitter spacing structure for enhancing the thermal stability of power devices over a wide biasing range.     

Investigation of the degradation of smooth SiGe epitaxial layer on Si substrate

The degradation of smooth SiGe epitaxial layer was investigated by transmission electron microscopy (TEM), X-ray reflectivity (XRR) and atomic force microscopy (AFM). It was shown from AFM results that the crosshatch was formed with increasing annealing temperature, which indicated the degradation of smooth surface. The surface degradation was caused by the internal dislocations, which were observed by plan-view TEM (PTEM) and cross-sectional TEM (XTEM). From XTEM, the sharp interface between SiGe top layer and Si substrate was broadened and there were a lot of 60° dislocations formed in SiGe top layer, which resulted in the crosshatch on the surface. The crosshatch was also verified by PTEM.     

Investigation of the implanted phosphorus in a boron doped SiGe epitaxial layer

Phosphorus diffusion into strained SiGe layers was studied by different methods. Doping profiles and carrier concentration profiles N(x), depth of pn junction, Ge content in SiGe and thickness of epitaxial layer were measured and simulated. Several experimental methods such as secondary ion mass spectroscopy, spreading resistance method, Raman spectroscopy—and process simulator ISE TCAD have been used. The results obtained by different methods and at different places of work have been compared and analysed.     

Characteristics degradation of the SiGe HBT under electromagnetic field stress

This paper describes a new reliability study in SiGe Heterojunction Bipolar Transistors (HBTs) by which the electromagnetic field aggression effects can be identified. Base current deviation mechanism with current gain degradation is studied for the first time. Reverse Gummel plots and capacitance characterizations indicate that the electromagnetic field stress induces traps not only at the emitter–base spacer’s oxide, but also at the collector–base spacer’s oxide. These traps induce generation/recombination centers, and leads to excess non-ideal base currents. Two-dimensional physical simulations have been used to analyse the impact of this degradation mechanism on the device behavior. As a consequence of introducing surface recombination centers at emitter–base and collector–base spacer’s oxide, a non-ideal base current rises up in agreement with the experimental data extracted. As the density of interface traps increases, the charge contributed by these interface states causes a broadening in the base current response and the capacitances deviation.     

Evaluation of the nanoindentation behaviors of SiGe epitaxial layer on Si substrate

In this paper, ultra-high vacuum chemical vapor deposition (UHV/CVD) was employed to synthesize silicon-germanium (SiGe), and sequence to endure annealing treatment. Morphological characterization, roughness, and microstructural morphology were observed by means of scanning electron microscopy (SEM), atomic force microscopy (AFM), and transmission electron microscopy (TEM). The elements distribution, crystallographic, and nanomechanical behavior were carried out using energy-dispersive X-ray spectroscopy (EDS) mapping technique, X-ray diffraction (XRD), and nanoindentation technique.The annealing treated SiGe leads to the 2D germanium segregation on the surface. The phenomenon is interpreted in terms of dislocation-induced structural changes in annealing treatment. Thus, the dislocation propagation in the microstructure was observed. Subsequently hardness and elastic modulus were increased because of a comparatively unstable microstructure after annealing treatment.     

聚乙二醇阴极修饰层改善聚合物太阳能电池光电性能的研究

通过将聚乙二醇(PEG)掺入活性层制备聚合物太阳 能电池,利用PEG的迁移特性获得阴极修饰层,研 究PEG阴极修饰层对聚合物太阳能电池光电性能的影响。X射线光电子能谱(XPS)分 析表明,掺入活性层中的 PEG迁移到活性层与Al电极之间,形成了阴极缓冲层。吸收光谱、电流密度-电压 特性曲线和外量子 效率谱的分析表明,PEG阴极缓冲层的形成改善了活性层与阴极的界面接触特性, 降低了活性层与电 极之间的能级势垒,有利于载流子传输,因此显著地改善了聚合物太阳能电池的光电性能, 使得器件的开 路电压Voc、短路电流密度Jsc和填充因子(FF)都有明显提高。当P3HT:PCBM 活性层中掺入体积比为0.5%的PEG时,聚合物太阳能电池的能量转换 效率(P CE)最高,达到了3.07%,比未掺杂PEG的参考器件提 高了38.5%。     

Non-homogeneous electrical transport through silicon-on-sapphire thin films: Evidence of the internal stress influence

The non-homogeneous electrical parameters of carrier transport in silicon on sapphire (SOS) films are investigated through galvanomagnetic experiments using “MOS-Hall” thin (0.65 μm) SOS devices with low n-type dopings ($\text{n}{}_0\text{? 10}{}^{15}\text{to 10}{}^{16}\text{cm}{}^{\mathrm{?3}}$). Capacitance-voltage (C-V), Hall and magnetoresistance measurements are performed on the gate-controlled depleted or “active” layers of the film. Experimental results and theoretical calculations show that longitudinal magnetoresistance (LMR) measurements yield the accurate determination of anisotropy and carrier drift mobility. On the contrary, it is underlined that the (previous) characterization methods, exclusively based on C-V or Hall experiments could produce inconsistent and misleading results in SOS.This is partly due to the fact that the usual 6 valley conduction band model used for bulk silicon is no longer valid in thin SOS films, for which the high stress at Si-sapphire interface requires the adoption of a 4 valley model throughout the film; this implies a high anisotropy for carrier mobility and explains why, in SOS films, the Hall mobility is 40% lower than the drift mobility, and the LMR is higher than the transverse magnetoresistance. C-V, Hall and LMR measurements then give fully consistent results allowing one to describe the variation of the carrier scattering mechanisms across the film and to determine the exact profiles for carrier mobilities and concentration as well as for the anisotropy coefficient.     

Reliability and performance scaling of very high speed SiGe HBTs

We discuss the SiGe HBT structural changes required for very high performance. The increase in collector concentration, affecting current density and avalanche current, appears to be the most fundamental concern for reliability. In device design, a narrow emitter and reduced poly–single-crystal interfacial oxide are important elements in minimizing device parameter shifts. From the application point of view, avalanche hot-carriers appear to present new constraints, which may be managed through limiting voltage (to 1.5×–2× BV_CEO), or through circuit designs robust to base current parameter shifts.     

A TCAD approach to the physics-based modeling of frequencyconversion and noise in semiconductor devices under large-signal forcedoperation

The paper presents a novel, unified technique to evaluate, through physics-based modeling, the frequency conversion and noise behavior of semiconductor devices operating in the large-signal periodic regime. Starting from the harmonic balance (HE) solution of the spatially discretized physics-based model under (quasi) periodic forced operation, frequency conversion at the device ports in the presence of additional input tones is simulated by application of the small-signal large-signal network approach to the model. Noise analysis under large-signal operation readily follows as a direct extension of classical approaches by application of the frequency conversion principle to the modulated microscopic noise sources and to the propagation of these to the external device terminals through a Green's function technique. An efficient numerical implementation is discussed within the framework of a drift-diffusion model and some examples are finally provided on the conversion and noise behavior of rf Si diodes     

应力对薄膜偏振分束镜性能的影响及改进工艺

为了研究应力对薄膜偏振分束镜性能的影响和减少应力的方法,通过在镀制分光膜之前预镀Al2O3过渡层,镀制过程中提高真空度、升高基底温度、减慢薄膜沉积速率,以及封装过程中采用光学光敏胶紫外光照射快速凝固法来减少薄膜应力。利用CCD采集了工艺改进前后薄膜偏振分束镜反射光和透射光的光斑图像,利用消光比测试系统测量了工艺改进前后薄膜偏振分束镜反射光和透射光的消光比。结果表明,改进工艺后反射光和透射光的光斑能量更加集中,散斑现象变小;反射光和透射光的消光比特性明显提高。由此可见,通过改进镀制工艺和封装工艺可以使薄膜偏振分束镜的指标达到使用要求。     

Theoretical small-signal performance of Si/SiGe/Si HBT

Application of the Monte Carlo technique to analyze electron and hole transport in bulk Si_0.8Ge_0.2 and strained Si _0.8Ge_0.2/Si is discussed. The computed minority- and majority-carrier transport properties were used in a comprehensive small-signal model to evaluate the high-frequency performance of a state-of-the-art n-p-n heterostructure bipolar transistors (HBT) fabricated with SiGe as the base material. The valence band discontinuity of a SiGe-base HBT reverses the degradation in emitter injection efficiency caused by bandgap narrowing in the base, and permits a higher ratio of base doping to emitter doping than would be practical for a bipolar transistor. Any degradative effect of increased base doping on electron and hole mobilities is offset by improved transport in the strained SiGe base, resulting in a marked decrease in the base resistance and base transit time. Compared to the Si BJT, the use of Si_0.8Ge_0.2 for the base region of an HBT leads to significant improvements in low-frequency common emitter current gain, low-frequency unilateral power gain, and maximum oscillation frequency     

Structure and electrical properties of polycrystalline SiGe films grown by molecular beam deposition

The structural and electrical properties of polycrystalline Si_0.5Ge_0.5 films 150 nm thick grown by molecular beam deposition at temperatures of 200–550°C on silicon substrates coated with amorphous layers of silicon oxynitride were studied. It is shown that the films consist of a mixture of amorphous and polycrystalline phases. The amorphous phase fraction decreases from ～50% in films deposited at 200°C to zero in films grown at 550°C. Subsequent 1-h annealing at a temperature of 550°C results in complete solid-phase crystallization of all films. The electron transport of charge carriers in polycrystalline films occurs by the thermally activated mechanism associated with the energy barrier of ～0.2 eV at grain boundaries. Barrier lowering upon additional annealing of SiGe films correlates with an increase in the average grain size.