Comment on “realization of series and parallel R-L and C-D impedances using single differential voltage current conveyor”

The comment is related to the recently published paper given in [1] dealing with the implementation of series and parallel R-L and C-D impedances using a single differential voltage current conveyor (DVCC). Nevertheless, straightforward analysis of the circuit in Fig. 3(b) of [1] and also given in Fig. 1 shows that it has a problem because it makes its input voltage V _in = 0. Therefore, it can not realize parallel (–L)–(–R) simulator as claimed in [1]. Alternatively, a circuit given in Fig. 2 for realizing parallel (–L)–(–R) simulator employing a single minus-type DVCC (DVCC–) and a minimum number of passive components is proposed. The introduced circuit employs a grounded capacitor, and requires no critical component matching constraints thus it is suitable for fully integrated circuit technology. If plus-type DVCC (DVCC+) is replaced instead of the DVCC–, this proposed simulator can realize parallel (L)–(R) simulator. Fig. 1 The circuit proposed in Fig. 3(b) of [1]

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Fig. 2 Presented circuit for realizing parallel (+L)–(+R) and parallel (L)–(R) simulators depending on the type of the DVCC

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Novel floating simulated inductors with wider operating-frequency ranges

In this paper, a number of simulated floating inductors (FIs) employing second-generation current conveyor (CCII), current-feedback operational amplifier (CFOA), differential voltage current conveyor (DVCC) and differential difference current conveyor (DDCC) are proposed. They employ only a grounded capacitor; accordingly, they are suitable for integrated circuit (IC) implementation. Some of the developed FI simulators demonstrate the feature of improved low-frequency performance while the other ones suffer from the Z/Y terminal parasitic resistors bringing extra series resistors to the inductances of the simulated FIs. Two novel methods for reducing/eliminating the unwanted series resistance in equivalent inductances of the FIs are developed, one of which is called the direct design technique accomplished by adjusting the resistive component/components of the FIs. The series resistors of the FIs affecting their low-frequency performance can be canceled by adding floating negative resistors in series, which is another method. Three of the presented FIs as examples are chosen in order to verify the developed method, perform their simulations and show their performance.     

Modified current follower-based immittance function simulators

In this paper, four immittance function simulators consisting of a single modified current follower with single Z? terminal and a minimum number of passive components are proposed. The first proposed circuit can provide +L parallel with +R and the second proposed one can realise ?L parallel with ?R. The third proposed structure can provide +L series with +R and the fourth proposed one can realise ?L series with ?R. However, all the proposed immittance function simulators need a single resistive matching constraint. Parasitic impedance effects on all the proposed immittance function simulators are investigated. A second-order current-mode (CM) high-pass filter derived from the first proposed immittance function simulator is given as an application example. Also, a second-order CM low-pass filter derived from the third proposed immittance function simulator is given as an application example. A number of simulation results based on SPICE programme and an experimental test result are given to verify the theory.     

General configuration for realizing current-mode first-order all-pass filter using DVCC

In this paper, a new general configuration for realizing current-mode all-pass filter circuits using differential voltage current conveyor (DVCC) is proposed. The proposed configuration is composed of a DVCC and five passive admittances. However, each of the circuits extracted from the proposed configuration uses only three passive elements. As an application, the proposed configuration is used to construct a quadrature oscillator. The theoretical results are verified by SPICE simulations.     

一种新型的宽线性范围差分电压输入电流传输器及其应用

设计了一种带有共模检测电路的宽线性范围差分电压输入电流传输器(DVCCⅡ).所提出的电路具有动态的长尾电流的差分对,可获得较大的动态线性输入范围.所提出的电路可以得到精确跟随特性和宽线性输入范围,且比较已有电路具有低电压低功耗等特点.采用SMIC 0.18μm工艺,用Spectre对电路进行仿真,电源电压是1.8 V,...     

Design and implementation of monostable multivibrators employing differential voltage current conveyors

In this paper, two novel application circuits utilizing the differential voltage current conveyor (DVCC) are introduced and implemented. To the best knowledge of authors, this is the first reported monostable multivibrators employing DVCC device. Each presented circuit is constructed by single DVCC as the basic active building block together with a few passive components. Both of them can be operated via a positive-edge triggering signal to generate a pulse waveform with an adjustable width. The first one is a general monostable circuit. The second design is an improved construction, which shortens the recovery time for applying the consecutive triggering signals. The circuit operations are first described and then the non-ideal issues and design considerations of the proposed circuits are discussed. To demonstrate their feasibility, the presented circuits are simulated using circuit simulation program Is-Spice. Available commercial ICs and discrete components are used to implement the prototype circuits. Simulation and experimental results agree well with the theoretical analysis.     

Novel low-voltage ultra-low-power DVCC based on floating-gate folded cascode OTA

In this paper a novel low-voltage ultra-low-power differential voltage current conveyor (DVCC) based on folded cascode operational transconductance amplifier OTA with only one differential pairs floating-gate MOS transistor (FG-MOST) is presented. The main features of the proposed conveyor are: design simplicity; rail-to-rail input voltage swing capability at a low supply voltage of ±0.5 V; and ultra-low-power consumption of mere 10 μW. Thanks to these features, the proposed circuit could be successfully employed in a wide range of low-voltage ultra-low-power analog signal processing applications. Implementation of new multifunction frequency filter based on the proposed FG-DVCC is presented in this paper to take the advantages of the properties of the proposed circuit. PSpice simulation results using 0.18 μm CMOS technology are included as well to validate the functionality of the proposed circuit.     

Inverting voltage buffer based lossless grounded inductor simulators

In this study, two new lossless grounded inductor simulators (GISs) made up of a single plus-type second-generation current conveyor, two inverting voltage buffers and a minimum number of passive components are proposed. There is no requirement of matching conditions and cancellation constraints among passive elements of the proposed GISs. Nevertheless, both of the proposed GISs have a floating capacitor which can be easily realized in nowadays integrated circuit fabrication. A second-order voltage-mode band-pass filter application is given for the proposed lossless GISs. A number of simulations based on SPICE program are given so as to verify the theory.     

New low component count floating inductor simulators consisting of a single DDCC

In this paper, five novel and minimum number count floating inductor simulators (FIs) are proposed. Three of the presented FIs depending on the passive component choice can provide parallel R–L, (–R)–(–L) and series R–L, (–R)–(–L) from the same configuration while other two provide one of parallel R–L or series R–L. Some of the introduced positive lossy inductor simulators employ a grounded capacitor; accordingly, they are convenient for integrated circuit (IC) implementation. So as to exhibit the performance of the proposed structures, computer simulations based on SPICE program are given.     

New canonic lossy inductor using a single CDBA and its application

A new lossy inductor (parallel R-L type) using single current differencing buffered amplifier (CDBA) is presented, which employs only two resistors and a grounded capacitor. The proposed lossy inductor is shown to be useful in realizing an oscillator circuit, which provides quadrature voltage outputs using only two CDBAs, three resistors and two grounded capacitors and offers independent control on condition of oscillation and frequency of oscillation up to a frequency of 61 MHz. Detailed non-ideal analysis including single-pole model for voltage and current gain has also been carried out. SPICE simulation results and experimental results based upon the CDBA constructed from commercially available IC AD844 have been included which confirm the practical workability of the proposed lossy inductor and quadrature oscillator circuit.     

一种新型节能LED驱动电路设计

提出一种新型串联方式的LED驱动方法,通过将多节LED模块串联,利用高直流电压来降低传统并联方式所需提供的较大电流。。利用稳压技术及等电流替换思想,提高各模块两端工作电压的稳定性,并通过光电耦合器确保相邻模块间的数据通信互不干扰。通过实验验证了所提出稳压方海的有效性,并给出了一组8模块串联工作时各模块两端电压的稳定性测试结果。理论估算结果表明,该方法相比传统并联方式具有更高的节能效果。该方案已申请国家发明专利。     

Novel grounded and floating high order immittance simulators using OTAs and OAs

This paper proposes novel grounded and floating high order series and parallel immittance simulators using operational transconductance amplifiers (OTAs) and operational amplifiers (OAs) with a finite gain–bandwidth (GB) product. They are composed of active devices (OTAs and OAs) and resistances, and are suitable for monolithic implementation in either CMOS or bipolar technologies. They also realize both positive and negative high order immittances. The circuit characteristics can be electronically tuned by adjusting the transconductances of OTAs and the GB products of OAs. Any transfer functions are realizable using the proposed simulators. Two examples are shown, together with simulation results.     

All-Grounded Passive Elements Voltage-Mode DVCC-Based Universal Filters

In this paper two new voltage-mode (VM) universal filters employing three plus-type differential voltage current conveyors (DVCC+s) and grounded passive elements are presented. The first proposed filter is a single-input five-output (SIFO) circuit which can realize simultaneously all of the standard responses, i.e. low-pass (LP), band-pass (BP), high-pass (HP), all-pass (AP) and notch (NH) from the same configuration. The second proposed circuit is a three-input single-output (TISO) universal filter for realizing standard responses depending on the selection of the input signal from the same topology. Both of the proposed filters have the advantage of a high input impedance, which enables easy cascading to obtain higher order filters. The proposed filters are simulated using the SPICE program to verify the theoretical analysis.     

A Simple Schmitt Trigger Circuit with Grounded Passive Elements and Its Application to Square/Triangular Wave Generator

This paper introduces a new simple Schmitt trigger circuit using a plus-type differential voltage-current conveyor (DVCC+) and only two grounded resistors. The proposed circuit is very simple and enjoys adjustable lower and higher threshold voltages as well as the output saturation levels. The application of the proposed Schmitt trigger circuit to the square/triangular wave generator is also given. Moreover, a current feedback operational amplifier (CFOA)-based square/triangular wave generator is derived from the proposed DVCC+-based circuit. Simulation and experimental results are presented to exhibit the performance of the proposed circuits.     

Positive/negative lossy/lossless grounded inductance simulators employing single VDCC and only two passive elements

Actively simulated grounded inductors have been used in several applications ranging from filter to oscillator design as well as cancellation of parasitic inductances. In this paper, new grounded inductance simulators employing only one voltage differencing current conveyor (VDCC) and two passive components are proposed. Two new topologies for realizing positive and negative lossless inductances and four different topologies for realizing lossy inductances are proposed. The aim of this paper is to present new inductance simulators using the minimum number of active and passive components. The proposed inductance simulators can be tuned electronically by changing the biasing current of the VDCC. Moreover, the circuits do not require any conditions of component matching. Finally, using one of the proposed inductance simulators a third-order high-pass filter is constructed. The performance of the proposed filter is verified and simulated by using SPICE.     

Control Strategy for Series and Parallel Output Dual-Buck Half Bridge Inverters Based on DSP Control

This paper presents a novel control strategy for series and parallel output dual-buck half-bridge inverters (DBHBIs). With the increasing concern of fossil fuel reserves and the environmental aspects, the 2005 International Future Energy Challenge, sponsored by U.S. the Department of Energy and the Institute of Electrical and Electronics Engineers, required that the grid-connected inverter should provide a single-phase utility line with 110–240 V at either 50/60 Hz. The proposed series and parallel output DBHBI can produce those kinds of voltage by series or parallel connection of two inverters and with digital signal processor (DSP) control to meet the aforementioned specifications. The load current of the two inverters at parallel output association and the load voltage of both at series output association can be shared. The waveform quality of the whole output voltage is high at both associations. Stability and relative stability of the inverter are unaffected at the two output associations. Operating principle, control strategy, stability and relative stability, and design guidelines and examples are illustrated. Experimental results of a 1-kVA DSP-based series and parallel output DBHBI at stand-alone mode verify the theoretical analysis. The comparisons between single and double inverter structures show that the proposed inverter is very promising in applications.      

Universal Series and Parallel Immittance Simulators Using Four Terminal Floating Nullors

Most of the presented immittance simulator topologies in the literature realize certain types of inductor–resistor–capacitor combinations using the same configuration. In this study, a series and a parallel immittance simulator employing FTFNs in its most general form are introduced. The presented circuits are universal and able to simulate series and parallel (±G), (±L), (±C) for which all values are independently adjustable. The simulator circuits do not require any component matching constraint, except for the realization of pure inductance. Strong reduction in the number of active and passive elements is possible for special cases. The performance of the proposed universal immittance simulators is demonstrated on two chosen typical application examples by PSPICE simulations.     

A novel low-voltage low-power fully differential voltage and current gained CCII for floating impedance simulations

In this paper we present a new current-mode basic building block that we named voltage and current gained second generation current conveyor (VCG-CCII). The proposed active block allows to control and tune both the CCII current gain and the voltage gain through external control voltages. It has been designed, at transistor level in a standard CMOS technology (AMS 0.35 μm), with a low single supply voltage (2 V), as a fully differential active block. The proposed integrated solution, having both low-voltage (LV) and low-power (LP) characteristics, can be applied with success in suitable IC applications such as floating capacitance multipliers and floating inductance simulators, utilizing a minimum number of active components (one and two, respectively). Simulation results, related to floating impedance simulators, are in good agreement with the theoretical expectations.     

Novel grounded parallel inductance simulators realization using a minimum number of active and passive components

In this paper novel lossless and lossy grounded parallel inductance simulators are reported. All grounded inductor simulator circuits employing only a single DXCCII and three passive components are proposed. The proposed topologies realized all grounded parallel inductance variations. To demonstrate the performance of the presented DXCCII based parallel inductance simulators, we used one of the circuits to construct a third order high-pass filter, a voltage-mode band-pass filter and LC oscillator. Simulation results are given to confirm the theoretical analysis. The proposed DXCCII and its applications are simulated using CMOS 0.35 μm technology.     

A vector control scheme for EV induction motors with a series ironloss model

Electric vehicle (EV) motors are characterized by their low inductance and high current density, so that they run at high speed and produce a high starting torque. Due to the low inductance coil design, the current ripple caused by pulsewidth modulation (PWM) switching makes a significant amount of eddy-current loss and hysteresis loss, especially in high-speed operation. If one simply neglects the iron loss, the overall vector controller is detuned, resulting in an error in the torque control. The iron loss is modeled, in general, by a parallel resistor R_M to the magnetizing inductor L_M. The authors propose a series R-L model that accounts for the effects of the iron loss. A major advantage of the series model is that it does not increase the number of state variables in developing a vector control. In this paper, they derive a rotor-flux-oriented flux error, orientation angle error, and torque error caused by iron loss. Finally, they demonstrate the effectiveness of the proposed control method through computer simulation and experimental results