CMOS电路γ总剂量辐射效应评论

本文从实验结果出发,评论了国产市售和加固CMOS电路抗γ总剂量的辐射特性。介绍了几种工艺CMOS电路阈电压、静态功耗电流、输入输出特性和传输延迟时间等对总剂量辐射的不同响应规则。对多种实验电路进行了为期两年的辐射特性退火观察。实验的同时,对美国RCA公司的一种未加固电路作了辐射测量。用该结果与国产电路的辐射特性作了比较。本文认为~(6O)Co源可以作为合适的核爆总剂量辐射效应模拟源。     

热释光剂量仪的线性升温加热器稳定性分析及设计

线性升温加热器的基本电路可见“放射医学”1975年第1期(1974年10月,热释光技术经验交流会的资料专辑),本文是它的继续和补充。应用自动控制系统稳定性理论对控制电路的稳定性及有关问题作了比较仔细的分析,对电路作了局部的修改,使其参数选择     

弱电流测量中的I-F变换电路

介绍了一种用于弱电流测量中的I-F变换电路,它将输入的电流信号直接变换为脉冲频率输出,然后送入计数器计数和送入计算机处理。并对其电路原理作了较详细的阐述。经过在现场检验和使用,该电路工作稳定可靠,灵敏度高．抗干扰能力强等特点,得到了满意的结果。     

积分型全景取样保持电路

本文简要描述了一种具有宽带响应特性的积分型取样保持电路,并对电路设计和测量结果作了介绍。     

EDA电路仿真

EDA技术用于电路仿真并对门电路单稳态电路作了电路仿真及分析。结果表明EDA电路仿真是一种很有用的技术。     

HCMOS器件γ辐射损伤电路分析

本文对最基本的HCMOS器件(反相器和与非门)作了γ辐射损伤实验。通过器件性能变化,分析了γ辐射对电路的作用。     

超短脉冲束流位置监测器的校准

对一己研制成的响应精度优于０．１ｍｍ的超短脉冲束流位置监测器的电子学电路于在线安装前对其监测器的电中心进行了校准，以保证实际测量精度不变劣。对此校准技术作简单介绍并给出相关的校准电路。     

GAL器件在触发判选径迹系统中的应用

本文简要介绍在北京谱仪触发判选的径迹系统中采用GAL器件作相“或”电路、符合配对电路及径迹数相加电路。     

加固的MOS／SOS集成电路抗γ瞬态辐照的最新实验结果

本文介绍了三个MOS/SOS集成电路,即SC4082,SC4066和SC1416的抗γ瞬态辐照的最新实验结果。其中SC4082和SC4066是类似相应体硅4000系列的CMOS/SOS电路,而SC1416是类似MC1416的高压NMOS/SOS电流驱动器。这些电路在我们早先的文章中有过介绍,但这次实验的样品,在加固上作了一些新的考虑,特别是输入保护电路作了较大的改进。     

正电子心脑功能仪定位电路的设计

本文在扼要介绍正电子心脑功能仪的基础上，对其电子学线路的关键部分──定位电路作了详细的分析，并给出一种实用的高速对数变换器。     

Simulation of the depressurisation occuring at the beginning of a LOCA in a 4-loop PWR

The safety analysis of Pressurised Water Reactors (PWR) is based on the assessment of the consequences of a hypothetical Loss of Coolant Accident (LOCA). The accident supposes that a break occurs on a pipe of the primary circuit. A depressurisation wave propagates from the break through the entire primary circuit, then the circuit empties progressively in diphasic regime. This study focuses on the phase of depressurisation happening during the first milliseconds following the break opening. The geometry of the primary circuit is simplified and represented with a pipe-model to be able to simulate the accident in the entire circuit. The reactor is supposed to work in operating conditions when the accident takes place. After a brief presentation of the geometry and the numerical model, the hydraulic consequences of the LOCA are analysed.     

功率MOS器件SEB、SEGR测量系统的研制

研制了功率MOS器件单粒子烧毁、单粒子栅穿辐照效应实验用的电流测量及电源系统,该系统由栅极电源电路、极电源电路、漏极RC振荡电路和DUT栅极触发电路组成,具有栅（漏）极电压偏置、电流测量、过流保护、电容电阻选择等功能,经实验验证,本系统工作性能稳定可靠。     

一台穆斯堡尔谱仪驱动电路的设计

穆斯堡尔谱仪驱动电路的功能,是产生一个驱动电压来推动振动子,使之按要求的速度波形运动。穆斯堡尔谱仪的机电振动装置采用扬声器系统。它具有线性的电能-机械能转换特性。根据振动子的质量,弹性系数及线圈的阻抗,可以精确计算出驱动电压的波形和大小。通常并不需要专门装配驱动电压发生器,而是用一个参考波形发生器和一个负反馈放大电路来实现。当负反馈放大倍数足够大时,反馈系统自己就可以产生所要求的驱动电压。     

分布电容对微电流放大器响应性能影响分析及实验研究

本文分析比较了基本放大电路、T型反馈放大电路、高频补偿T型反馈放大电路和并联补偿放大电路四种微电流放大电路的响应特性。研究了转移电阻和布线引入的分布电容对放大电路增益和响应速度的影响。探讨了影响微电流放大器的稳定性、可靠性因素以及提升放大器的稳定性和可靠性的措施。对并联补偿放大电路脉冲响应的时间常数进行了测试,测试结果为80μs。理论分析和实验研究表明,并联补偿放大电路具有增益大、响应速度快等优点,稳定性好,可靠性高,在离子迁移谱中具有良好的应用前景。     

CPLD在多路定时信号处理中的应用

本文主要介绍了CPLD在多路定时信号处理中的应用.针对大型核物理实验中的符合测量、多路时间测量系统中的门控快定时信号等应用的需要,设计了一种多路延迟/脉宽调节电路,主要功能是对输入的多路快信号进行延迟和脉宽调节,支持NIM负信号输入和输出,在系统主时钟频率为100MHz的时候,延迟和脉宽调节的最小步进精度为10ns.我们采用复杂可编程逻辑器件CPLD来构建系统的主要电路,具有较小的延迟和脉宽调节误差,和常规逻辑器件相比其特点是:元件少且成本低,功耗小,稳定性好.     

Detailed Analysis of the Transient Voltage in a JT-60SA PF Coil Circuit

A superconducting coil system is actually complicated by the distributed parameters, e.g. the distributed mutual inductance among turns and the distributed capacitance between adjacent conductors. In this paper, such a complicated system was modeled with a reasonably simplified circuit network with lumped parameters. Then, a detailed circuit analysis was conducted to evaluate the possible voltage transient in the coil circuit. As a result, an appropriate (minimum) snubber capacitance for the Switching Network Unit, which is a fast high voltage generation circuit in JT-60SA, was obtained.     

CsI(Tl)闪烁探测器读出电路设计

介绍了配置于新型γ能谱仪的CsI(Tl)闪烁探测器的读出电路设计。输入缓冲级采用折叠嵌位电路,改善了系统频率特性并提高了输入阻抗;放大级采用自举电路,改善了系统动态性能并提高了开环增益;输出级采用电流源负载电路,改善了输出信号的线性度并增强了系统的稳定性。实验表明:读出电路噪声为51.08 f C+1.97 f C/p F,时间漂移为0.112%,探头对137Cs源γ射线的输出信号信噪比可达23:1,能量分辨率可达4.98%。     

On the theoretical-numerical study of the ITER Upper Port Plug structure hydraulic behaviour under steady state and draining and drying transient conditions

The ITER diagnostic Upper Port Plug (UPP) is a water-cooled stainless steel structure aimed to integrate within vacuum vessel the plasma diagnostic systems, shielding them from neutron and photon irradiation. Due to the very intense heat loads expected, a proper cooling circuit has been designed to ensure an adequate UPP cooling with an acceptable thermal rise and an unduly high pumping power and to perform its draining and drying procedure by injection of pressurized nitrogen.A theoretical research activity has been launched at the Department of Nuclear Engineering of the University of Palermo aiming to investigate the hydraulic behaviour of the UPP Trapezoid Section cooling circuit under steady state conditions and during its draining and drying transient procedure. The research activity has been performed following a theoretical-computational approach and adopting the RELAP5 thermal-hydraulic system code.The Trapezoid Section cooling circuit characteristic functions have been derived under steady state conditions at various coolant temperatures for both the coolant flow paths at the present under consideration for this circuit. The distributions of coolant mass flow rates along the channels of the cooling circuit have been calculated too. Results show that the flow path characterized by right plate inlet has improved hydraulic performances.The transient behaviour of the Trapezoid Section cooling circuit has been investigated during the draining and drying operational transient procedure, considering realistic operative scenarios, for both the coolant flow paths at the present under consideration for the cooling circuit. In particular, it has been found out that the recently proposed flow path seems to allow the complete draining of the Trapezoid Section circuit, eliminating the need for the drying procedure.