n+ -GaAs/undoped GaAlAs/undoped GaAs field-effect transistor

The first self aligned accumulation-mode GaAs MIS-like FET having an n+ -GaAs/undoped GaAlAs/undoped GaAs structure is reported. The FETs fabricated show the threshold voltage of almost zero (V?th = 0.035 V) and very uniform (?Vth = 0.013 V) characteristics, as expected. The transconductance is as high as 170 mS/mm, which is the highest value ever reported on GaAs MIS-like FETs.     

Quantum-well-doped FET (QUD-FET)

A novel FET using a 2DEG is presented. The FET has an AlAs/GaAs/AlAs single quantum well with planar doping in the centre of the GaAs layer. The conduction channels are composed of a 2DEG generated in undoped GaAs layers outside the well. The measured 2DEG concentration was 1.8?2 × 1012cm?2 with electron mobilities of 3500cm2/Vs at RT and 10500cm2/Vs at 77K. A 1.5?m-gate-length FET exhibits a maximum transconductance of 174 mS/mm and a maximum current exceeding 300 mA/mm at 77K.     

A GaAsMISFET using an MBE-grown CaF2 gate insulatorlayer

The CaF₂ layer and an undoped GaAs channel layer grown by molecular beam epitaxy (MBE) on a semi-insulating GaAs (100) substrate. The two layers are grown sequentially inside the same MBE chamber to form a clean CaF₂-GaAs interface. A self-aligned process using a WSi_x gate metal is used to fabricate the MISFET. A 1- μm gate-length FET exhibiting a transconductance of 64 mS/mm has been achieved     

Improved breakdown voltage in GaAs MESFETs utilizing surface layersof GaAs grown at a low temperature by MBE

A metal-semiconductor field-effect transistor (MESFET) utilizing surface layers of GaAs grown at a low temperature by MBE (LT GaAs) under the gate electrode has been fabricated. The high trap density of LT GaAs reduces the surface fields of the FET, suppresses gate leakage, and increases the gate-drain breakdown voltage without sacrificing current drive capability. An undoped AlAs layer is incorporated between the LT GaAs layer and the channel as a barrier to the diffusion of excess As from the LT GaAs layer to the channel. A 74-μm-gate-width device demonstrated an improved breakdown voltage of 34.85 V with a g _m of 144 mS/mm and an I_dss of 248 mA/mm     

Self-aligned GaAs gate heterojunction SISFET

A self-aligned GaAs gate heterojunction enhancement-mode SISFET with a layer structure of n+-GaAs/undoped Al0.5Ga0.5As/undoped GaAs is fabricated and shows a high transconductance and a low threshold voltage. The highest transconductance at both room temperature and at 77 K ever reported on a long-channel GaAs gate SISFET, 197 mS/mm and 313 mS/mm, respectively, is obtained.     

2英寸GaAs快速热退火技术研究

为配合２０００门ＧａＡｓ超高速门阵列及ＧａＡｓ超高速分频器等２英寸ＧａＡｓ工艺技术研究，开展了２英寸ＧａＡｓ快速热退火技术研究。做出了阈值电压为０～０．２Ｖ，跨导大于１００ｍＳ／ｍｍ的Ｅ型ＧａＡｓＭＥＳＦＥＴ和夹断电压为－０．４～－０．６Ｖ，跨导大于１００ｍＳ／ｍｍ的低阈值Ｄ型ＧａＡｓＭＥＳＦＥＴ。     

Realization of n-channel and p-channel high-mobility (Al,GA)As/GaAs heterostructure insulating gate FET's on a planar wafer surface

Self-aligned gate by ion implantation n-channel and p-channel high-mobility (Al,Ga)As/GaAs heterostructure insulated-gate field-effect transistors (HIGFET's) have been fabricated on the same planar wafer surface for the first time. Enhancement-mode n-channel (Al,Ga)As/GaAs HIGFET's have demonstrated extrinsic transconductances of 218 mS/mm at room temperature and 385 mS/mm at 77 K. Enhancement-mode p-channel (Al,Ga)As/GaAs HIGFET's have demonstrated extrinsic transconductances of 28 mS/mm at room temperature and 59 mS/mm at 77 K. There are the highest transconductance values ever reported on a p-channel FET device.     

Very high-transconductance heterojunction field-effect transistor (HFET)

A new form of FET has been demonstrated in the GaAs/AlGaAs material system. Designated the HFET, it has shown a transconductance of 500mS/mm at 300K for a nominal Lg =2?m and a drain current of 430mA/mm. The conduction occurs in an inversion channel at the heterointerface.     

Ion-implanted GaAs/AlGaAs heterojunction FET's grown by MOCVD

The successful fabrication of an ion-implanted GaAs/AlGaAs heterojunction FET device is discussed. Half-micrometer gate-length FET devices are fabricated by ion implantation into GaAs/AlGa heterostructures grown by metalorganic chemical vapor deposition (MOCVD) on 3-in-diameter GaAs substrates. The FET device exhibits a maximum extrinsic transconductance of 280 mS/mm with reduced transconductance variation over 2 V of gate bias. Excellent microwave performance is achieved with an f_t of 40 GHz, which is comparable to results obtained from 0.25-μm gate GaAs MESFETs. The effects of ion implantation on the heterojunction and corresponding device characteristics are also discussed     

A new self-aligned GaAs FET with a Mo/WSixT-gate

An n+-layer and ohmic electrode self-aligned (NOSA) GaAs FET is a new self-aligned GaAs FET in which n⁺-layers and ohmic contacts in the source and the drain regions are self-aligned to a T-shaped gate formed with Mo and WSix(≈0.6) double layers. Using the NOSA FET structure, the device area can be easily reduced because no alignment margin is needed. The fabricated FET's exhibit a transconductance gmof 170 mS/mm.     

⟨110⟩-oriented GaAs MESFETs

GaAs metal semiconductor field-effect transistors (MESFETs) have been successfully fabricated on molecular-beam epitaxial (MBE) films grown on the off-axis (110) GaAs substrate. The (110) substrates were tilted 6° toward the (111) Ga face in order to produce device quality two-dimensional MBE growth. Following the growth of a 0.4-μm undoped GaAs buffer, a 0.18-μm GaAs channel with a doping density of 3.4×10¹⁷ cm^-3 and a 0.12-μm contact layer with a doping density of 2×10¹⁸ cm^-3, both doped with Si, were grown. MESFET devices fabricated on this material show very low-gate leakage current, low output conductance, and an extrinsic transconductance of 200 mS/mm. A unity-current-gain cutoff frequency of 23 GHz and a maximum frequency of oscillation of 56 GHz have been achieved. These (110) GaAs MESFETs have demonstrated their potential for high-speed digital circuits as well as microwave power FET applications     

AlGaAs/InGaAs/GaAs quantum well doped channel heterostructure fieldeffect transistors

The results of experimental and theoretical studies of pseudomorphic AlGaAs/InGaAs/GaAs quantum-well doped-channel heterostructure field effect transistors (QW-DCHFETs) are presented. The channel doping was introduced in two ways: during growth by molecular beam epitaxy or by direct ion implantation. The latter technique may be advantageous for fabrication of complementary DCHFET circuits. Peak transconductances of 471 mS/mm and peak drain currents of 660 mA/mm in 0.6-μm-gate doped-channel devices were measured. The results show the advantages of the DCHFET over standard heterostructure FET structures and their potential for high-speed IC applications. Self-consisted calculations of the subband structure show that the potential barrier between the quasi-Fermi level in the channel and the bottom of the conduction band in the barrier layer is considerably larger for the doped channel structure than for the structure with an undoped channel. This lowers the thermionic emission gate current of the doped channel device compared to the undoped channel device     

Metamorphic InAlAs/InGaAs HEMTs on GaAs substrates with a novelcomposite channels design

We report on fabrication and performance of novel 0.13 μm T-gate metamorphic InAlAs/InGaAs HEMTs on GaAs substrates with composite InGaAs channels, combining the superior transport properties of In_0.52Ga_0.48As with low-impact ionization in the In_0.32Ga_0.68As subchannel. These devices exhibit excellent DC characteristics, high drain currents of 750 mA/mm, extrinsic transconductances of 600 mS/mm, combined with still very low output conductance values of 20 mS/mm, and high channel and gate breakdown voltages. The use of a composite InGaAs channels leads to excellent cut-off frequencies: f_max of 350 GHz and an f_T 160 GHz at V_DS=1.5 V. These are the best microwave frequency results ever reported for any FET on GaAs substrate     

Electron velocity enhancement by planar-doped barrier source inGaAs vertical FET

Experimental evidence of electron velocity enhancement by hot-electron injection into the channel of a GaAs vertical FET has been obtained for the first time. The maximum transconductance and the average electron velocity are 234 mS/mm and 6.4×10⁷ cm/s respectively, which are 1.4 and 1.9 times as large as those of a conventional vertical FET     

W/WSi gate self-aligned HIFETs (heterointerface FETs) using anAlInAs/GaInAs heterostructure grown by MOCVD

An undoped AlInAs/GaInAs heterostructure was grown by MOCVD and a W/WSi gate self-aligned HIFET (heterointerface FET) structure was made by ion implantation and rapid thermal annealing. The HIFET, 5 μm in gate length, was of an enhancement-type with a threshold voltage of about 0 V and with a transconductance of 280 mS/mm at room temperature. This result confirms the very high potential of this device for direct coupled FET logic (DCFL)     

Elimination of drain I/V collapse in MODFETs through the use of thin n-GaAs/AlGaAs superlattice

We report on the elimination of collapse of drain I/V characteristics in modulation-doped field-effect transistors at 77 K by replacing the doped AlGaAs with a thin GaAs/AlGaAs superlattice where only the GaAs is doped. Such thin barriers (10 ?/15 ?) are transparent to the electrons making the electron transfer into the bulk GaAs (undoped) possible. Room-temperature transconductances of 180 mS/mm which increased to 210 mS/mm at 77 K under both dark and light conditions were obtained. Furthermore, the threshold voltage of these devices did not shift appreciably on cooling (+0.12 V), and no noticeable light sensitivity at 77 K was observed for this device structure.     

New field-effect transistor with quantum wire and modulation-dopedheterostructures

A new field-effect transistor, consisting of an AlGaAs/GaAs heterostructure and an (AlAs)_0.25(GaAs)_0.75 vertical superlattice, is fabricated. It has a large transconductance of 14 mS/mm at a gate length of 250 μm, corresponding to a transconductance of 3.5 S/mm for 1 μm gate length. Hall measurement revealed a novel FET operation mode called `velocity modulation'     

Ga0.47In0.53As JFETs and MESFETs with OM-VPE-grown GaAs surface layers

Ga0.47In0.53As JFETs and MESFETs have been fabricated with a lattice-mismatched GaAs layer under the gate. The GaAs could be grown with good electrical and crystallo-graphic quality in spite of the large lattice mismatch by an OM-VPE process. Pn, Np and Schottky diodes were fabricated and applied to n-GaInAs FET channels. Both types of devices exhibited high transconductances of about 100 mS/mm.     

GaAs MESFET ring oscillator on Si substrate

GaAs MESFET ring oscillators were fabricated on a Si substrate and successfully operated. Epitaxial techniques to grow a GaAs layer on a Si substrate were investigated. The device-quality GaAs epitaxial layer was obtained by introducing a Ge layer (by ionized cluster-beam deposition) and alternating GaAs/GaAIAs layers (by MOCVD). The typical transconductance of 140 mS/mm was obtained for the FET with a 0.5 µm × 10 µm gate. The minimum delay time was 66.5 ps/ gate at a power consumption of 2.3 mW/gate.     

Ion-implantation and activation behavior of Si in MBE-Grown GaAs on Si substrates for GaAs MESFET's

The suitability of MBE-grown GaAs layers on Si substrates has been studied for ion-implanted GaAs MESFET technology. The undoped as-grown GaAs layers had a carrier concentration below 10¹⁴cm^-3. Uniform Si ion implants into 4-µm-thick GaAs layers on Si were annealed at 900°C for 10 s, using a rapid-thermal-annealing (RTA) system. Both the activation and the doping profile were similar to those obtained in bulk semi-insulating GaAs under similar conditions. The SIMS profiles of Si and As atoms near the GaAs/Si heterointerface were identical before and after the RTA process, indicating negigible interdiffusion during the implant activation. Dual implants of a shallow n+ layer and an n-channel layer were used to fabricate GaAs MESFET's with a recess-gate technology. Selective oxygen ion implantation was used for device isolation. The maximum transconductance obtained was 135 mS/ mm compared to typical values of 150-180 mS/mm obtained in our laboratory on GaAs substrates in similar device structures.