A New Process and Framework for Direct Anonymous Attestation Based on Asymmetric Bilinear Maps

For the problem of security properties scale badly of the Direct anonymous attestation （DAA） scheme based symmetric bilinear pairing, a new DAA scheme based on asymmetric bilinear pairing, which gives a new practical solution to ECC-based TPM in protecting the privacy of TPM,is presented. The scheme takes on new process and framework in sign protocol, of which the TPM has only to perform three exponentiations, moreover, the signature which isn＇t knowledge of signature, is a signature of the ordinary ecliptic curve system itself. Compared to other schemes, the whole performance of the scheme is the best,and the scheme not only satisfies the same proper- ties, but also is more simple and efficient. This paper gives not only a detailed security proof of the proposed scheme which shows that the scheme meets the security require- ments of anonymity and unlinkability,but also a careful performance analysis by comparing with the existing DAA schemes.     

A 6.25 Gb/s equalizer in 0.18μm CMOS technology for high-speed SerDes

This paper presents a 0.18μm CMOS 6.25 Gb/s equalizer for high speed backplane communication. The proposed equalizer is a combined one consisting of a one-tap feed-forward equalizer （FFE） and a two-tap half-rate decision feedback equalizer （DFE） in order to cancel both pre-cursor and post-cursor ISI. By employing an active-inductive peaking circuit for the delay line, the bandwidth of the FFE is increased and the area cost is minimized. CML-based circuits such as DFFs, summers and multiplexes all help to improve the speed of DFEs. Measurement results illustrate that the equalizer operates well when equalizing 6.25 Gb/s data is passed over a 30-inch channel with a loss of 22 dB and consumes 55.8 mW with the supply voltage of 1.8 V. The overall chip area including pads is 0.3 × 0.5 mm^2.     

光模块SMT工艺简霸

本文介绍了用于光模块产品的PCB’A在sMT过程中的工艺难点及其解决方案,希望给业界的同行提供一些借鉴。     

A Secure Adaptive Routing Strategy Using Immune Mechanism in MANET

Many protocols have been proposed to in- crease efficiency and security of traditional protocols in Mobile ad-hoc networks （MANET）, but they are all facing the problem of computation overhead which leads to im- practicability. Adaptive routing strategy （ARS） is a novel routing strategy that switches routing protocol according to the network condition. Though this method alleviates the problem of efficiency, it doesn＇t cover the secure issues. We integrate our security mechanism based on Artificial immune system （AIS）, with adaptive routing strategy to enhance efficiency and security. First we presented a more appropriate definition to the measurement of network con- dition, then we designed a secure adaptive routing strategy based on the definition. At last, we gave a performance analysis to validate the correctness and reliability of our scheme.     

Image Registration Using a Complete Polar Transform

Image registration is widely used in im- age processing. Researchers have introduced image reg- istration techniques based on the log-polar transform for its rotation and scale invariant properties. It suffers from nonuniform sampling which makes the registration results susceptible to interference. To address the problems of traditional log-polar transform, a Complete polar trans- form （CPT） method is proposed, which samples the image evenly to preserve the whole information of original image. An innovative projection transform is applied after CPT to obtain the rotation invariant property. We pre-matched feature points using the Scale invariant feature transform （SIFT）algorithm and re-matched them based onCPT to improve matching speed and accuracy. Experimental re- sults show that the proposed method is accurate and ro- bust to noise and alteration.     

UML技术在医院检验信息管理系统设计中的应用

目的:针对医院对检验信息管理系统的开发质量要求,研制解决方案,避免后期投入成本巨大浪费问题,实现因地制宜地保证系统上线。方法:采用标准的UML方法,编制了适合医院的检验管理信息系统,并完成了详细描述了其具体用例图(Use Case)、顺序图(Sequence Diagram)、类图(Class Diagram)。结果:设备的开机率提高了20%,标本控制时间明显缩短,故障响应时间为1分钟,在系统中及时报警提示。结论:完成了基于UML的LIS系统的设计,提高了设备的工作效能,收到了良好的效果。     

Parameterized Integrated Power and Performance （PIPP） Model for Ultra High-Performance of TOPS level DSP

Amdahl＇s law is a simple and fundamen- tal tool for understanding the evolution of performance as a function of parallelism. Following a recent trend on timing and power analysis of general purpose many-core chip using this law, we develop a novel PIPP analytical model for evaluating the performance and power of hier- archical on-chip large-scale parallel architectures with the core number, super-node size, processing element number, and function unit number taken into consideration. We thereby investigate the influence of workload characteris- tics （Thread-level parallel TLP, Instruction-level parallel ILP and Data-level parallel DLP） on resource allocation with the restriction of performance and power. The re- sults provide some feasible options to design TOPS level DSP architecture as well as a theoretical basis for making the design more scalable.     

A Novel Load Balancer for Scalable Multi-NAT

Due to the upcoming IPv4 address exhaus- tion, the transition from IPv4 to IPv6 becomes an urgent problem restricting the growth of Internet. Multi-NAT, which is desired in large scale IPv4-IPv6 coexistent net- work, has inherent difficulties in the stateful traffic bal- ancing and failure recovery. The existing schemes cannot handle them due to the absence of state synchronization. In this paper we propose a novel Load balancer （LB） to build a Scalable multi-NAT （SMNAT） in large scale net- work for various IPv4-IPv6 coexistent scenarios. The LB is specifically designed to have a translation pattern re- lated hash keys and load-balance bi-directional traffic in two modes. Additionally an Adaptive reassigning algo- rithm （ARA） running in LB is presented to schedule flows adaptively to reduce the cost of state synchronization as well as guarantee the performance in load balancing. Com- paring SMNAT with the existing load balancing schemes, the simulation result shows that our SMNAT outperforms other schemes and meets the goals of large scale NAT.     

一种单光子雪崩光电二极管主动淬火电路

We present a novel gated operation active quenching circuit （AQC）. In order to simulate the quenching circuit a complete SPICE model of a InGaAs SPAD is set up according to the I-V characteristic measurement resuits of the detector. The circuit integrated with a ROIC （readout integrated circuit） is fabricated in an CSMC 0.5 μm CMOS process and then hybrid packed with the detector. Chip measurement results show that the functionality of the circuit is correct and the performance is suitable for practical system applications.     

应用动态偏置和双环反馈技术的CMOS快速瞬态响应低压差线性稳压器设计

This paper presents a low-dropout regulator （LDO） for portable applications with dual-loop feedback and a dynamic bias circuit. The dual-loop feedback structure is adopted to reduce the output voltage spike and the response time of the LDO. The dynamic bias circuit enhances the slew rate at the gate of the power transistor. In addition, an adaptive miller compensation technique is employed, from which a single pole system is realized and over a 59~ phase margin is achieved under the full range of the load current. The proposed LDO has been implemented in a 0.6μm CMOS process. From the experimental results, the regulator can operate with a minimum dropout voltage of 200 mV at a maximum 300 mA load and IQ of 113μA. The line regulation and load regulation are improved to 0. l mV/V and 3.4 μV/mA due to the sufficient loop gain provided by the dual feedback loops. Under a full range load current step, the voltage spikes and the recovery time of the proposed LDO is reduced to 97 mV and 0.142 μs respectively.     

高效太阳电池硅衬底特性对原子层沉积Al2O3薄膜钝化性能的影响

Atom layer deposition （ALD）-Al2O3 thin films are considered effective passivation layers for p-type silicon surfaces. A lower surface recombination rate was obtained through optimizing the deposition parameters. The effects of some of the basic substrate characteristics including material type, bulk resistivity and surface morphology on the passivation performance of ALD-Al2O3 are evaluated in this paper. Surface recombination velocities of 7.8 cm/s and 6.5 cm/s were obtained for p-type and n-type wafers without emitters, respectively. Substrates with bulk resistivity ranging from 1.5 to 4 Ω · cm were all great for such passivation films, and a higher implied Voc of 660 mV on the 3 Ω · cm substrate was achieved. A minority carrier lifetime （MCL） of nearly 10 μs higher was obtained for cells with a polished back surface compared to those with a textured surface, which indicates the necessity of the polishing process for high-efficiency solar cells. For n-type semi-finished solar cells, a lower effective front surface recombination velocity of 31.8 cm/s was acquired, implying the great potential of （ALD）-Al2O3 thin films for high-efficiency n-type solar cells.     

An Efficient Causal Structure Learning Algorithm Based on Recursive Simultaneous Equations Model

A new algorithm, the RSEM （Recursive simultaneous equations model） algorithm, is presented for causal structure learning under the LSEM （Linear structural equations model）. The algorithm effectively applies recursive simultaneous equations model to causal structure learning. This paper makes two specific contributions. Firstly, under the assumption that knowing the causal order of the variables, we show that recursive simultaneous equations model can be used for causal structure learning under the LSEM regardless of whether the datasets follow multivariate Gaussian distribution. Secondly, the performance of the RSEM algorithm is compared with the state-of-the-art algorithms on 7 networks. Simulation results show that the RSEM algorithm outperforms existing algorithms in terms of time performance, and has a quite high accuracy for thresholds 0.005 and 0.01.     

The Price of Anarchy of Network Coding and Routing Based on an ACS Pricing Mechanism

To emphasize the decisions of all users, and the total number of users sharing the same technique, we propose a novel Average cost sharing （ACS） pricing mechanism to study the game between Network coding （NC） and routing flows sharing a single link when users are price anticipating. We characterize the worst-case efficiency bounds of the game compared with the optimal （i.e., the Price of anarchy （PoA））, which can be as low as 4/9 when the number of routing users becomes sufficiently large. NC cannot improve the PoA significantly under ACS. However, to achieve a more efficient use of limited resources, this approach indicates the sharing users have a greater tendency to choose NC. However, the users will follow the majority users＇ choice of data transmission technique.     

A Robust Acquisition Scheme for FH Signa in Adverse Environments

Both partial-band jamming and multitone jamming have severe effect on the acquisition of frequency-hopping （FH） signal in adverse environments. In this paper, an anti-jamming FH signal acquisition scheme based on cognitive correlation process is proposed to boost the robustness of acquisition. The main idea of this scheme is to utilize a priori knowledge of FH speed and FH pattern to distinguish jamming signal from received signal. Furthermore, theoretic analysis on detection probability and false probability is given to demonstrate the robust performance of the FH signal acquisition method compared with conventional acquisition scheme without any prior information on FH speed and pattern in adverse environments.     

Design of Two-phase SABL Flip-flop for Resistant DPA Attacks

Differential power analysis （DPA） poses a great threat to cipher security circuit since it exploits the dependency between the processed data and the power consumption. Two-phase Sense amplifier based logic （Two- phase SABL） suitable to DPA resistant logic style has been introduced under unbalanced load conditions. The pro- posed logic obtains constant energy consumption per clock cycle with pre-charge and evaluation phases. In this paper, Two-phase SABL cell and flip-flop are designed and simu- lated to confirm the energy balancing characteristic. Using TSMC 0.13μm CMOS technique, simulation results show that the power consumption fluctuations in the flip-flop is decreased by 15.1% under unbalanced condition and the area is reduced by 38.4%.     

Distributed Compressive Video Sensing with Adaptive Measurements Based on Structural Similarity

This paper presents a Distributed compressive video sensing scheme with Adaptive measurements （DCVS-AM）. In this approach, the key frame in each Group of pictures （GOP） is coded by Compressive sensing （CS） with a fixed measurement rate; whereas other frames in the same GOP are compressed by an adaptive random projection in two stages, yielding the Adaptive compressive sensing （ACS） frames. The first stage uses a small and fixed measurement rate and recovers a coarse version. In the second stage, each coarse-version ACS-frame together with its proceeding and following key frames will go through a joint analysis at the decoder side and the analysis result - Structural similarity （SSIM） that is based on a motion-guided interpolation and calculated in a multilevel discrete wavelet transform domain - is sent back to the encoder side to facilitate a re-sampling of the ACS-frame with an adaptive measurement rate. Experimental results show that our proposed DCVS-AM consistently outperforms the state-of-the-art DCVS with a fixed measurement.     

A Novel Architecture of Special Arithmetic Function Unit for Area-Efficient Programmable Vertex Shader

A novel architecture of high precision, floating-point special Arithmetic function unit （SFU） for elementary transcendental functions is presented in this paper to provide area efficiency as well as high performance for programmable vertex shader. From the architecture point of view, the evaluation of quadratic approximation for special functions is performed by sharing the SIMD vector unit in shader architecture to minimize processing latency and to reduce area cost in SFU. An optimized minimax approach is proposed as well to obtain the finite-length and normalized quadratic coefficients for high precision. The experiment result shows that the proposed SFU can significantly reduce area cost and by adopting the proposed SFU, a vertex shader with Transport triggered architecture （TTA） can achieve 15.0% improvement on average in performance/area ratio for various shading benchmarks.     

Very-Low-Voltage and Cross-Submicron-Technology Passive Tag＇s Logic Design

A low-voltage wide-tolerance-range passive UHF RFID tag＇s baseband logic design is presented in this paper. Based on deep submicron CMOS technologies, the design utilizes tailored techniques to satisfy subthreshold operation： to deal with the specific timing and wide-range- variation problems at very low power supply, and for the consideration of limited availability of RF power. Compen- sated addition is proposed for the PIE decoder, and power- aware scheme is applied to the entire logic part. Galoi Lin- ear feedback shift register （LFSR） and one-hot counter are also applied to fulfill critical timing requirements. Addi- tionally, these techniques help to improve clock efficiency and reduce the frequency variation impact in low-voltage data link portions. Therefore the robustness in subthresh- old operation is ensured. The logic design was fabricated in 180nm- 130nm and 90nm CMOS technologies respectively to verify the compatibility. In measurement the designs in- dicate competent subthreshold operation. The 90rim ver- sion can function at 0.33V.     

Design and Analysis of Hyperspectral Anomaly Detection Based on Kalman Filter Theory

Anomaly detection generally gains wide attention in hyperspectral imagery for its high spectral resolution. Real-tlme processing is badly needed due to its large data set. This paper presents real-tlme process- ing versions to implement the commonly used RX anomaly detector which make use of information only provided by previous pixels prior to currently being processed pixel. Through these algorithms, hyperspectral image data can be processed timely. Experimental results demonstrate these new real-time versions significantly solve real-time processing problem compared to conventional anomaly de- tector.     

An Enhanced IRC Algorithm for LTE Downlink Receiver in Multi-cell Environment

This paper proposes an enhanced Interfer- ence rejection combining （IRC） algorithm for Long term evolution （LTE） downlink receiver in multi-cell communi= cation systems. In this algorithm, a proper Multiple input multiple output （MIMO） receive method is adopted ac- cording to Generalized likelihood ratio test （GLRT） inter- cell interference detection. Iteration between channel es- timation and data detection is carried out to improve the performance of IRC algorithm. Simulation results show that this proposed algorithm can ei~ectively detect inter- cell interference and improve Block error rate （BLER） performance and channel estimation Mean squared error （MSE） compared to non-iterative IRC algorithm, making it suitable for LTE downlink receiver in multi-cell cellular systems.