HIGH SELECTIVITY SC BANDPASS FILTERS WITH LESS CAPACITOR SPREAD

Two novel switched-capacitor(SC)bandpass filters using a single operational am-plifier(op amp)are presented.Optimal designs for minimizing capacitor spread are also given.Gain-bandwidth product(GB)effects of op amps on the proposed SC circuits are taken intoconsideration.Comparisons with the proposed circuits and the circuits given by the literatureshow that the new circuits require less chip area in monolithic integration and are less sensitiveto the GB effects.     

单一单位增益放大器的Q增强SC滤波器

本文阐述了采用单位增益放大器的SC滤波器的设计方法。基于无源Q增强技术,由Sallew Key有源RC电路导出了一系列Q增强的二阶SC低通、高通和带通滤波器。设计表明,本文提出的Q增强SC电路比文献给出的电路需要小得多的电容分散度。本文考察了这些电路灵敏度和有限GB对SC电路的影响。用分立元件做了实验,实验结果与理论计算相吻合。     

SC电路混合分析的一种方法

本文提出了ＳＣ电路混合分析的一种方法，此法特别适合于计算机辅助电路分析，并且所推导的ＳＣ电路混合议程与状态议程有着紧密的联系，由此可方便地求得ＳＣ电路的频域传递函数。     

减小SC滤波器中GB效应的新结构

本文讨论了在开关电容(SC)滤波器中如何减少增益带宽积(GB)效应的问题,提出了一个减少GB效应的新的双二次拓扑结构,此结构对寄生电容不敏感,并且具有很低的无源W0,Q灵敏度。以低通SC滤波器为例,给出了减小GB效应的具体设计方法。并用设计实例和实验结果证明了所得结论的正确性。     

NEW STRUCTURE OF SC FILTERS WITH REDUCED GB EFFECT

In this paper, the problem how to reduce the GB effect in SC filters is discussed. A new generalbiquadratic SC structure in which the GB effect is reduced is developed. The structure is stray-insensitiveand has very low W_0 and Q sensitivities. Using the low-pass SC filter for an example, method of reducingthe GB effect has been shown in detail.     

一个开关电容电路的模拟和优化程序

本文介绍了一个以分析开关电容(SC)电路为目的面向用户的通用程序。该程序可以完成对SC电路的时域、频域和灵敏度模拟,可以对SC电路进行多目标优化,并可以求得SC电路的传输极点,且对电路的输入信号、开关序列、网络拓扑没有限制,文中提出了在改进节点法基础上求出电路传输极点的方法,以贡献的方式建立求传输函数对电容比的灵敏度方程,通过线性变换求得对电容比的灵敏度的方法和SC电路的多目标优化方法。最后给出了用该程序对SC电路进行模拟和优化的两个算例。     

Analysis of SC networks using continuous-time equivalent circuits without frequency-dependent elements

Continuous-time equivalent circuits for the analysis of SC networks are derived by using the mixed bilinear and LDI transformation, the developed equivalent circuits contain no frequency-dependent elements.     

On the relationship between PSRR and clock feedthrough in SCfilters

A novel linearized model for calculating the power supply rejection ratio (PSRR) of switched-capacitor (SC) circuits due to switch charge injection (clock feedthrough) is presented. The inclusion of clock feedthrough accounts for the low-frequency PSRR degradation not modeled by other methods. This is particularly important in high-frequency SC circuits, as is confirmed by simulation and measurement results. The model defines a useful link between transient clock feedthrough analysis and effective coupling capacitor models that are suited for AC analysis. The abstraction of differentiating an injected charge with respect to voltage to get effective coupling capacitors leads to efficient analysis techniques, since clock delays and elaborate device models can be considered once at the outset, and then dispensed with in favor of simpler device elements. This makes the model more suitable for hand calculations and analysis with standard SC simulation packages     

Design of improved rail-to-rail low-distortion and low-stress switches in advanced CMOS technologies

This paper describes the efficient design of an improved and dedicated switched-capacitor (SC) circuit capable of linearizing CMOS switches to allow SC circuits to reach low distortion levels. The described circuit (SC linearization control circuit, SLC) has the advantage over conventional clock-bootstrapping circuits of exhibiting low-stress, since large gate voltages are avoided. This paper presents exhaustive corner simulation results of a SC sample-and-hold (S/H) circuit which employs the proposed and optimized circuits, together with the experimental evaluation of a complete 10-bit ADC utilizing the referred S/H circuit. These results show that the SLC circuits can reduce distortion and increase dynamic linearity above 12 bits for wide input signal bandwidths.     

Biquad alternatives for high-frequency switched-capacitor filters

Biquad sections are the basic building block of practical switched-capacitor (SC) filters. The authors focus on the amenability of various biquad options for high-frequency operation. A comparison on the basis of analysis and a recent nonideal SC network simulation tool are confirmed by results from a VLSI 1.25-/spl mu/m CMOS test chip. A differencing-input SC biquad is shown to have a significant performance advantage over other circuits.     

By-inspection analysis of switched-capacitor networks †

The recent advances in implementation of analogue MOS switched-capacitor (SC) networks have established a need for new methods of analysis of these circuits. In this paper an analysis method of SC networks operating with an n-phase clock is presented. The method is based on a building block approach which facilitates the derivation of a z-domain equivalent circuit. The equivalent circuit is then analysed using the flow-graph technique.     

Switched-capacitor integrators with low finite-gain sensitivity

Compensated SC integrator stages are analysed and compared with respect to their sensitivities to finite amplifier gain effects. Simple single-stage amplifiers may be used in such circuits even in highly selective filtering applications. This may allow an extension of the present frequency range of SC circuits.     

Switched-capacitor filters

A novel technique for building active filters using switched-capacitor (SC) circuits is proposed. Principles of operation, methods of control, analysis, and design of a typical SC filter are presented. To assess its effectiveness, the technique is used to control input current harmonics in a phase-controlled converter. It is shown that a wide range of harmonics can be controlled using a single filter     

Pseudo-N-path switched capacitor filters with out-of-band noise peaks

Novel pseudo-N-path (PNP) switched-capacitor (SC) integrator structures which avoid noise peaks in the main passband are described. They combine the simplicity of the previously proposed RAM-type PNP SC circuits with the desirable properties of hybrid-type circuits. Simulation results are presented for filters employing these structures to verify their usefulness.<>     

Switched-capacitor interpolators without the input sample-and-holdfiltering effect

The authors propose new switched-capacitor (SC) interpolators whose frequency responses are no longer affected by the input sample-and-hold filtering effect which occurred in previous circuits. Two different types of architectures are discussed, one for input sampled-and-hold signals, and the other for arbitrary input signal formats. Examples are given to illustrate both types of SC interpolator circuits     

A new simple method for analysing of thermal noise in switched-capacitor filters

Thermal noise is one of the most important challenges in analogue integrated circuits design. This problem is more crucial in switched-capacitor (SC) filters due to the aliasing effect of wide-band thermal noise. In this article, a new simple method is proposed for estimating the power spectrum density of output thermal noise in SC filters, which have acceptable accuracy and short running time. In the proposed method, first using HSPICE simulator, accurate value of accumulated sampled noise on sampler capacitors in each clock state is achieved. Next, using difference equations of the SC filter, frequency response of the SC filter is shaped by time domain analysis. Based on the proposed method, a SC low-pass filter and a second-order SC band-pass filter are analysed. The results are validated by comparing to the previously measured data.     

Computer simulation of SC circuits using NAP

The adaptation of the NAP program to the frequency analysis of SC circuits is presented in the letter. According to this approach the equivalent circuit contains resistances and inductances or capacitances as the representations of the switched or unswitched capacitors in the frequency domain.     

RFI-induced distortion in switched-capacitor circuits

The errors which are induced by radio-frequency interference (RFI) in switched-capacitor (SC) circuits are discussed and the main role played by the distortion of MOS switches in the on-state is highlighted. Furthermore, a new simple analytical model, which enables one to predict RFI-induced errors in SC circuits is proposed and it is validated by the comparison of its predictions with time-domain computer simulation results.     

An Efficient and Accurate DC Analysis Technique for Switched-Capacitor Circuits

A simple but highly accurate method is proposed to find the dc parameters of active or passive switched-capacitor (SC) circuits. It is based on the dc model of a general SC branch.