二维矩形耦合本振阵列的波达方向估计

提出以矩形耦合振荡器阵列为本振阵列,分析了矩形耦合本振阵列的相位控制原理及方法,推导了耦合本振阵列稳定锁相同步时,本振阵列阵元间形成均匀的相位分布,且等相位差只与边界上振荡器的自由振荡频率有关。利用耦合本振阵列阵元间等相位差的这一属性,调节耦合本振阵列边界上的振荡器自由振荡频率,改变耦合本振相邻阵元的等相位差,实现波达方向估计。文中对波达估计算法进行了计算机仿真,验证了其理论分析结果,为注频锁相耦合振荡器阵列应用于天线接收技术提供有力的理论基础。     

基于注频锁相技术的发射波束形成系统

研究了利用注频锁相技术实现低成本、高集成度、高效率的发射波束形成系统。首先介绍了发射波束形成的原理,并研究了注频锁相振荡器相位系统平衡点的稳定性,根据注频锁相振荡器的相位噪声理论给出了注频锁相振荡器阵列的设计原则,然后根据理论分析设计了一种可以产生高稳定度、低相位噪声具有任意相位加权系数的多通道射频相干信号的波束形成系统,利用计算机仿真该系统实现了发射波束扫描,证明了基于注频锁相技术的发射波束形成系统的可实现性。最后搭建了四通道注频锁相振荡器阵列,测量结果表明注频锁相振荡器阵列可以产生具有任意相位加权系统的多通道相干信号,进一步证明了该发射波束形成系统的有效性。     

注频锁相振荡器阵列的低相位噪声信号产生方法

提出了注频锁相振荡器阵列的拓扑结构及相位噪声模型,根据该模型简要推导了注频锁相振荡器阵列相位噪声的计算公式并对整个阵列的相位噪声进行了分析,完成了1×4单元注频锁相振荡器阵列相位噪声的测试,测试结果与理论分析吻合,最终得出了注频锁相振荡器阵列的低相位噪声信号产生方法。     

基于注频锁相振荡器阵列的多波束扫描技术

研究了利用注频锁相振荡器阵列实现非线性有源天线阵多波束扫描技术,给出了注频锁相振荡器阵列的拓扑结构及相位动力学方程组,建立了基于注频锁相振荡器阵列的多波束天线加权模型并详细分析了加权矩阵的确定方法,最后对直线阵和矩形平面阵多波束扫描的方向图进行了计算机仿真并搭建了两波束扫描实验系统,进一步验证了该技术的可行性.     

通过注频锁相压缩HgBr激光器的线宽和提高其效率

本文报道了HgBr激光器注频锁相实验的结果。测量了注频锁相HgBr激光器的输出能量及频谱与注入波长之间的关系。在502nm附近注频锁相,窄带(半峰值宽度0.05nm)输出能量比宽带HgBr激光器的输出高30％。注频锁相激光器的总效率为1.3％。     

邻频转频器改接收频道浅析

有线电视中的邻频转频器,上下混频本振广泛采用锁相技术,但随机产品无电原理图给改接收频道(下简称改频)带来了困难,为方便改频,现将有关问题分析如下。 1 邻频转频器工作原理 天线收到经放大的电视信号,在下混频器混频     

有源天线阵波束电扫描新技术

研究了利用互注频锁相技术实现的低成本、高集成度、高效率的新型非线性有源天线阵列,给出了耦合振荡器阵列的幅度及相位动力系统满足的微分方程组,然后针对控制非线性有源天线阵列波束扫描这一实际应用,找到了可以实现有源天线阵列波束扫描的相位动力系统的轨道及振荡器自由振荡频率需满足的条件,并对轨道的稳定性进行了分析,提出了一种不用移相器实现非线性有源天线阵列波束电扫描的方法,最后利用计算机仿真验证了该方法的可行性.     

基于注频锁相和非线性振荡器的接收波束形成

本文提出以注频锁相技术为基础接收窄带信号的非线性振荡器波束形成器,给出了注频锁相现象的Adler方程及非线性振荡器的动力微分方程.并提出了零陷多波束形成算法,推导权矢量,并通过仿真分析该算法的信号波达图效果.     

一种用中频晶振稳频的特高频调频振荡器

本文提出了一种新型特高频直接调频振荡电路,其中心频率受控于一个被中频晶振稳频的混频双环锁相电路,因而能产生接近品振频率稳定度的线性调频信号。 本文分析了晶振稳频双环锁相电路的主要性能,建立了这种振荡器的数学模型,给出了稳定载波频率的条件,以及电路参数的选择,实物部件采用了微波混合集成技术。实验证明这种振荡器比工作在70MHz和140MHz的一般调频振荡器有频谱纯、峰值频偏大、线性好、寄生调幅小等优点。     

非线性有源天线阵多波束相位分布控制方法

研究了基于注频锁相振荡器阵列的非线性有源天线阵多波束拓扑结构模型,详细分析了一维线阵、二维面阵多波束相位分布的控制方法并完成了一维线阵、二维面阵的相位分布仿真和方向图仿真,验证了该方法的有效性。最后,完成了多波束性能的分析。     

三角形耦合本振阵列天线波达方向估计

提出以对称三角形耦合振荡器阵列为本振阵列,分析了耦合本振振荡器的相位控制原理,给出耦合本振阵列相位控制方法,推导了耦合本振阵列锁相同步时,形成均匀的线性相位分布,且阵元间的相移只与边界上振荡器的振荡频率有关。利用耦合本振阵列形成均匀相位分布的这一属性,调整耦合本振阵列边界上的振荡器振荡频率,改变耦合本振相邻阵元的相移,实现波达方向估计。同时对三角形耦合阵列的稳定过程、波达方向估计进行了计算机仿真,验证了理论分析结果。     

耦合本振阵列的旁瓣抑制技术研究

论文以耦合振荡器阵列作为本振阵列,提出天线阵列接收波束具有旁瓣抑制的扩展结构,推导了其接收波束形成的方向图函数,分析了该接收波束旁瓣抑制技术的可行性,并通过计算机仿真验证了旁瓣抑制技术的理论分析结果,为耦合振荡器阵列在接收技术上的应用提供了理论基础。     

基于耦合本振阵列的旁瓣抑制技术研究

以耦合振荡器阵列作为本振阵列,提出具有旁瓣抑制的接收波束天线阵列扩展结构,推导了其接收波束形成的方向图函数,分析了该接收波束旁瓣抑制技术的可行性,并通过计算机仿真验证了旁瓣抑制技术的理论分析结果,为耦合振荡器阵列应用于天线接收的干扰抑制技术提供了理论基础。     

Planar Radiating Oscillator Using Butterfly-Shaped Patch Element and Spatial Power-Combining Array

A planar radiating oscillator using a butterfly-shaped patch element is described. To obtain an injection-locking range that can be changed and low cross-polarization, we used a butterfly-shaped patch. The patch element was able to change the injection-locking range while maintaining low cross-polarization, and two types of patch were compared. As one application, we designed and fabricated 1x2, 2x1 and 2x2 spatial power-combining arrays by using radiative mutual coupling. The 2x2 array was successfully operated with a single-bias supply without using a 3-D (three-dimensional) Fabry-Perot cavity. An equivalent isotropic radiated power of 2.5 W was measured at X-band.     

一种菱形结构二维耦合振荡器阵列的设计与同步实验

研究了菱形结构二维耦合振荡器阵列的相位动力学方程,对4×4阵列稳定过程进行了仿真研究,设计并制作了4×4单元耦合振荡器阵列及阵列相位差测量系统,实现了16单元耦合振荡器阵列的全局同步。     

Low cost microwave oscillator using substrate integrated waveguide cavity

A topology is proposed for designing a low-cost microwave oscillator. This new feedback oscillator makes use of a substrate integrated waveguide (SIW) cavity that acts as a frequency selector as well as a feedback-coupling device. The oscillator is stabilized by using an injection-locking scheme. A 12.02-GHz oscillator prototype was designed. Experimental results for phase noise, locking range, and quality factor of the new circuit are presented. An external Q of 178 was measured.     

基于无线收发信机的高频锁相环电路设计

在无线收发信机电路中,除了发射机和接收机外,还有一个非常重要的部分就是本地振荡电路.为了保证本地振荡模块输出信号的频率稳定性和较低的相位噪声,通常本振采用锁相环技术来实现,特别在无线通信领域.本文阐述了锁相环的基本结构和工作原理.     

Design and Analysis of CMOS Subharmonic Injection-Locked Frequency Triplers

$K$- and $V$-band CMOS differential subharmonic injection-locked frequency triplers (ILFTs) are proposed, analyzed, and designed. Based on the proposed ILFT structure, models for the injection-locking range and the output phase noise are developed. A $K$-band ILFT is designed and fabricated using 0.18-$mu$m standard CMOS technology. The measured injection-locking range is 1092 MHz with a dc power consumption of 0.45 mW and an input injection power of 4 dBm. The harmonic rejection ratios are 22.65, 30.58, 29.29, 40.35 dBc for the first, second, fourth, and fifth harmonics, respectively. The total injection-locking range of the $K$-band ILFT can achieve 3915 MHz when the varactors are used and the dc power consumption is increased to 2.95 mW. A $V$-band ILFT is also designed and fabricated using 0.13-$mu$ m standard CMOS technology. The measured injection-locking range is 1422 MHz with 1.86-mW dc power consumption and 6-dBm input injection power. The injection-locking range of the proposed ILFT is similar to the tuning range of a conventional varactor-tuned bulk-CMOS voltage-controlled oscillator (VCO). Moreover, the proposed ILFT has a greater output power and a lower dc power consumption level than a VCO. As a result, it is feasible to use the proposed ILFT in low-power millimeter-wave synthesizers.      

Injection-locking of Gunn oscillators with feedback stabilization

A microwave phase stabilization feedback circuit used with injection-locking increases the locking range of a Gunn oscillator and reduces the voltage fluctuations in the bias circuit.     

Design and measurement of a 53 GHz balanced Colpitts oscillator

A 53 GHz Colpitts oscillator implemented in a SiGe:C BiCMOS technology is presented. Limited by a 26.5 GHz frequency analyzer, the oscillator was measured indirectly through an on-chip mixer. The mixer down-converted the oscillating frequency to an intermediate frequency (IF) below 26.5 GHz. By adjusting the local os-cillating (LO) frequency and recording the changes of IF frequency, the oscillator's output frequency (RF) was determined. Additionally, using phase noise theory of mixers, the oscillator's phase noise was estimated as-58 dBc/Hz at 1 MHz offset and the output power was about-21 dBm. The chip is 270×480 μm in size.