Data‐driven high‐order terminal iterative learning control with a faster convergence speed

In this paper, a novel high‐order optimal terminal iterative learning control (high‐order OTILC) is proposed via a data‐driven approach for nonlinear discrete‐time systems with unknown orders in the input and output. The objective is to track the desired values at the endpoint of the operation cycle. The terminal tracking errors over more than one previous iterations are used to enhance the high‐order OTILC's performance with faster convergence. From rigor of the analysis, the monotonic convergence of the terminal tracking error is proved along the iteration direction. More importantly, the condition for a high‐order OTILC to outperform the low‐order ones is first established by this work. The learning gain is not fixed but iteratively updated by using the input and output (I/O) data, which enhances the flexibility of the proposed controller for modifications and expansions. The proposed method is data‐driven in which no explicit models are used except for the input and output data. The applications to a highly nonlinear continuous stirred tank reactor and a highly nonlinear fed‐batch fermentater demonstrate the effectiveness of the proposed high‐order OTILC design.     

High‐speed low‐voltage driving of high‐Xe‐content PDPs with priming particles

Abstract— Power savings, image‐quality improvement, and cost reduction are the major issues facing PDP development. High‐Xe‐content PDPs have attained improved luminous efficiency, but with sacrifices in higher switching and sustain voltages and slower discharge build‐up. By examining PDPs having 3.5%–30% Xe content, it was found that utilization of the space‐charge priming effect as well as wall‐charge accumulation are effective in obtaining a low operating voltage and a high switching speed. The improvements are enhanced for higher Xe pressures. By using space‐charge priming, the statistical time lag of the discharge triggering for the 30% Xe content is reduced significantly and becomes approximately equal to that of 3.5% Xe content. Once triggered, the formative time lag of the discharge becomes shorter and the space charge experiences diffusion/drift; hence, accumulation of the wall charge is faster for discharges with higher Xe contents. These indicate that the use of an erase addressing scheme, rather than a write addressing scheme, is preferable when driving high Xe‐content PDPs, because the erase addressing scheme provides the addressing operation with an abundant amount of priming particles. Also, the drive voltages are lower for the erase addressing scheme. In order to reduce the address voltage, it is effective to accumulate wall charges prior to addressing. It was found that there are limiting values for the charge accumulation, above which self‐erase discharges ignite and the wall charge is dissipated. The self‐erase discharge occurs at relatively low wall voltages when the Xe percentages becomes higher. The sustain pulse voltage can be reduced while keeping the luminous efficiency high by increasing the sustain pulse frequency. As the frequency is increased, a residual amount of space charge created by the preceding sustain pulse increases. Due to the priming effect of these space charge, the build‐up of the discharge current becomes faster, resulting in a lower voltage.     

Return loss and crosstalk mitigation in coupled vias for modern high‐speed packaging

A method for mitigating the return loss and crosstalk corresponding to coupled vias is presented in this article. The method is based on selecting the proper dimensions for the antipad holes related to vias as well as the most adequate distribution of the ground vias, which allows to simultaneously reducing impedance mismatch and undesirable via coupling. The usefulness of the method is demonstrated by improving the performance of a 2 × 3 array of six signal vias. As a result, return loss levels below ?45 dB and crosstalk levels below ?40 dB are obtained in the 0–50 GHz frequency range. © 2011 Wiley Periodicals, Inc. Int J RF and Microwave CAE, 2012.     

Analysis and design of ribbon cables for high‐speed digital applications

Ribbon cables have been widely used as subsystem interconnections in a large number of digital systems, because they can convey numerous bits of a digital signal simultaneously. In this article, finite difference and finite difference time domain (FDTD) methods are used to analyze and optimize the electrostatic analysis design of ribbon cables, and measurements are used to verify the numerical results. © 2002 Wiley Periodicals, Inc. Int J RF and Microwave CAE 12: 148–158, 2002.     

Enabling high‐speed asynchronous data extraction and transfer using DART

As the complexity and scale of applications grow, managing and transporting the large amounts of data they generate are quickly becoming a significant challenge. Moreover, the interactive and real‐time nature of emerging applications, as well as their increasing runtime, make online data extraction and analysis a key requirement in addition to traditional data I/O and archiving. To be effective, online data extraction and transfer should impose minimal additional synchronization requirements, should have minimal impact on the computational performance and communication latencies, maintain overall quality of service, and ensure that no data is lost. In this paper we present Decoupled and Asynchronous Remote Transfers (DART), an efficient data transfer substrate that effectively addresses these requirements. DART is a thin software layer built on RDMA technology to enable fast, low‐overhead, and asynchronous access to data from a running simulation, and supports high‐throughput, low‐latency data transfers. DART has been integrated with applications simulating fusion plasma in a Tokamak, being developed at the Center for Plasma Edge Simulation (CPES), a DoE Office of Fusion Energy Science (OFES) Fusion Simulation Project (FSP). A performance evaluation using the Gyrokinetic Toroidal Code and XGC‐1 particle‐in‐cell‐based FSP simulations running on the Cray XT3/XT4 system at Oak Ridge National Laboratory demonstrates how DART can effectively and efficiently offload simulation data to local service and remote analysis nodes, with minimal overheads on the simulation itself. Copyright © 2010 John Wiley & Sons, Ltd.     

基于机器学习方法的高速信道建模研究

随着高速信道的传输速率变快,传输长度变长,结构复杂度变高,对信道进行建模也变得复杂与艰难.将目前比较火热的机器学习方法与高速信道结合起来,提出了一个新颖的方法.利用采集的大量模拟数据,采用深度神经网络DN N与循环神经网络RN N对信道建模,模型一旦训练成功,就可以通过该仿真模型预测输出信号的眼图,快速精准地对信号完整...     

Fixed‐structure robust controller design for chatter mitigation in high‐speed milling

Chatter is an instability phenomenon in high‐speed milling that limits machining productivity by the induction of tool vibrations, inferior machining accuracy, noise, and wear of machine components. In this paper, a fixed‐structure active chatter control design methodology is proposed, which enables dedicated shaping of the chatter stability boundary such that working points of higher machining productivity become feasible while avoiding chatter. The control design problem is cast into a nonsmooth optimization problem, which is solved using bundle methods. Using this approach, fixed‐structure dynamic (delayed) output feedback controllers can be synthesized. Distinct benefits of this approach are the a priori fixing of the controller order, the limitation of the control action, and the fact that no finite‐dimensional model approximations and online chatter estimation techniques are required. All these benefits are important in milling practice. Representative examples illustrate the power of the proposed methodology in terms of increasing the chatter‐free depth of cut, thereby enabling significant increases in machining productivity. Copyright © 2014 John Wiley & Sons, Ltd.     

Use of self‐erase discharges for high‐speed and low‐voltage addressing of PDPs

Abstract— A technique called “self‐erase‐discharge addressing” has been incorporated with a address‐while‐display driving scheme, contiguous subfield, and erase addressing to obtain high‐speed and low‐voltage addressing of PDPs. The technique uses a relatively high X‐sustain pulse voltage VXsus, which produces a weak self‐erase discharge at its trailing edge. An application of a data pulse Vdata synchronous to a weak self‐erase discharge results in full erase discharge and eliminates all the wall charges. The technique assures a wider operating‐voltage margin since it provides identical amounts of priming charges as well as wall charges to all the horizontal scan lines just prior to addressing. The priming charges are generated by the weak self‐erase discharges, resulting in low Vdata of 30 V and a high addressing speed of 0.66 μsec for a Ne + 10% Xe PDP. V_Xsus = 245 V, and the voltage margins of Vdata and VXsus were 35 and 16 V, respectively. For a 30% Xe PDP, Vdata and VXsus were 30 and 335 V, respectively, with an addressing speed of 1.0 μsec. In order to obtain high dark‐room contrast, it is essential to use ramp reset pulses, with which erase addressing cannot be achieved. By adopting the write addressing only to the first subfield and the self‐erase‐discharge addressing to the subsequent subfields, a peak and background luminance in green of 3100 and 0.22 cd/m², respectively, were obtained with a dark‐room contrast of 14,000:1. The number of subfields was 28, and the light emission duty was 83%. The number of ramp reset pulse drivers could be reduced to 12 by adopting the common reset pulse technique.     

Direct observations of vacuum ultraviolet rays for surface‐discharge ac plasma displays by using an ultra‐high‐speed electronic camera

Abstract— Vacuum ultraviolet (VUV) rays emitted from Xe during the operation of surface‐discharge ac plasma‐display panels (PDPs) were observed directly by using a recently developed ultra‐high‐speed electronic camera. It is confirmed that 147‐ and 173‐nm VUV rays are emitted from both the cathode and the anode simultaneously. The direct observation shows that the emitting area for 147‐ and 173‐nm emissions above the cathode and the anode extends outward from the edge of the gap. These emission extensions are considered to be caused by a lowering of the electric field above the area due to the accumulation of wall charges. The intensity of the 147‐ and 173‐nm emissions above the anode decays faster than those above the cathode. It is clarified that the difference in the decay characteristics of VUV rays above the cathode and the anode is caused by the difference in the wall‐charge‐accumulation rates above the cathode and the anode. The major reactions concerning the generation of Xe(1s⁴), a xenon resonant state, which is related to 147‐nm emission, and that of Xe^2Y*, a xenon molecule state, which is related to 173‐nm emission, are discussed.     

Parallel similarity joins on massive high‐dimensional data using MapReduce

In this paper, we focus on high‐dimensional similarity join (HDSJ) using MapReduce paradigm. As the volume of the data and the number of the dimensions increase, the computation cost of HDSJ will increase exponentially. There is no existing effective approach that can process HDSJ efficiently, so we propose a novel method called symbolic aggregate approximation (SAX)‐based HDSJ to deal with the problem. SAX is the abbreviation of symbolic aggregate approximation that is a dimensionality reduction technique and widely used in time series processing, we use SAX to represent the high‐dimensional vectors in this paper and reorganize these vectors into groups based on their SAX representations. For the very high‐dimensional vectors, we also propose an improved SAX‐based HDSJ approach. Finally, we implement SAX‐based HDSJ and improved SAX‐based HDSJ on Hadoop‐0.20.2 and perform comprehensive experiments to test the performance, we also compare SAX‐based HDSJ and improved SAX‐based HDSJ with the existing method. The experiment results show that our proposed approaches have much better performance than that of the existing method. Copyright © 2015 John Wiley & Sons, Ltd.     

Compact quad‐channel high‐temperature superconducting diplexer based on stub‐loaded square ring resonator

A compact quad‐channel high‐temperature superconducting diplexer based on stub‐loaded square ring resonator (S‐LSRR) is proposed. The proposed resonator consists of a square ring with symmetrically loaded two open‐circuited stubs and provides four resonant modes for quad‐channel applications. Even‐ and odd‐mode methods are applied to analyze the S‐LSRR. Analytical study shows that four resonant modes of one S‐LSRR can be designed in two pairs and applied to construct two of four channels of the designed diplexer. A square patch is added to the resonator for providing an additional parameter to tune the resonant modes. Based on the proposed resonator, a quad‐channel diplexer with center frequencies of 2.4, 3.2, 3.9, and 5.6 GHz is designed. For demonstration, the diplexer is fabricated on 2‐in‐diameter 0.5 mm‐thick MgO wafer with double sided YBa₂Cu₃O_y films and measured at 77 K. Good agreement between the simulation and measurement is obtained. The diplexer has a compact size of 0.25 λ_g × 0.45 λ_g, where λ_g is guided wave length at the center frequency of first channel.     

Iterative learning control design with high‐order internal model for discrete‐time nonlinear systems

In this paper, a high‐order internal model (HOIM)‐based iterative learning control (ILC) scheme is proposed for discrete‐time nonlinear systems to tackle the tracking problem under iteration‐varying desired trajectories. By incorporating the HOIM that is utilized to describe the variation of desired trajectories in the iteration domain into the ILC design, it is shown that the system output can converge to the desired trajectory along the iteration axis within arbitrarily small error. Furthermore, the learning property in the presence of state disturbances and output noise is discussed under HOIM‐based ILC with an integrator in the iteration axis. Two simulation examples are given to demonstrate the effectiveness of the proposed control method. Copyright © 2016 John Wiley & Sons, Ltd.     

Pulmonary nodule diagnosis using dual‐modal supervised autoencoder based on extreme learning machine

In recent years, deep learning techniques have been applied to the diagnosis of pulmonary nodules. In order to improve the pulmonary nodule diagnostic performance effectively, we propose a novel pulmonary nodule diagnosis method using dual‐modal deep supervised autoencoder based on extreme learning machine for which discriminative features are automatically learnt from the input data. The network is fed with nodule images in pairs obtained from computed tomography and positron emission tomography respectively. For each pair image, the high‐level discriminative features of nodules in computed tomography and positron emission tomography are extracted from stacked supervised autoencoder layers. The outputs of the proposed architecture are combined using an ideal fusion method to get the final classification. In the experiments, 5‐fold cross‐validation method is used to validate the proposed method on 1,600 pulmonary nodule images and our method reaches high‐classification sensitivities of 91.75% at 1.58 false positives per scan. Meanwhile, compared with other deep learning diagnosis methods, our method achieves better discriminative results and is highly suited to be used for pulmonary nodule diagnosis.     

A video‐speed reflective display based on electrowetting: principle and properties

Abstract— Electrowetting is presented as a novel principle for a reflective display. By contracting a colored oil film electrically, an optical switch is obtained with many attractive properties that make it very suitable for use as a reflective display, for instance, as electronic paper. Firstly, it has the high reflectivity (>40%) and contrast ratio (15) required for a paper‐like optical appearance. In addition, the principle shows a video‐rate response time (<10 msec) and has a clear route toward a high‐brightness color display. Finally, the electro‐optical response is independent of cell‐gap thickness, which will be very beneficial when moving toward a flexible display.     

High‐speed mobility on planetary surfaces: A technical review

Despite the success so far accomplished in the robotic exploration of the Moon and Mars, the constraints associated with newly proposed mission concepts manifest the need for a faster surface prospection. Increasing driving velocities is being considered as a potential solution to the requirements introduced by these missions. This review presents the benefits and foreseeable challenges of using faster locomotive solutions for space exploration. Information is provided regarding the set of missions that would benefit most from faster locomotive capabilities. Starting by understanding the theoretical framework governing the interaction of wheeled robots operating over loose, sandy terrains, we delve into the foundation of Bekker's classic terramechanic equations—the most frequently used method to predict mobile robots off‐road performance. We highlight its limitations and review the efforts that have been made to expand the range of application of these theories to dynamic wheel–soil interactions. We analyze the existing experimental evidence on the effects of increasing traveling velocities under earthbound, off‐road conditions. By paying special attention to previous experiences on the lunar surface, we outline the challenges that the combination of irregular terrains and a reduced‐gravity field may pose to a fast‐moving exploration rover. The principles, mathematical models, experimental evidence, and experiences presented in this review are meant to aid in the identification of poorly understood and insufficiently studied aspects regarding high‐speed extraterrestrial surface mobility.     

Single‐layer high‐gain flat lens antenna based on the focusing gradient metasurface

A single‐layer transmitting focusing gradient metasurface (F‐GMS) has been proposed that can realize high gain increment at 10 GHz. The unit of F‐GMS is composed of two identical structures placed on the top and bottom of one dielectric layer, which can have high transmitting efficiencies that over 0.8 and achieve [0, 2π] phase range in X‐band. The F‐GMS can convert the spherical waves into plane waves. A patch antenna working at 10 GHz is positioned as the focus of the proposed F‐GMS as the feed source to develop an ultrathin flat lens antenna system. It achieves a simulated gain of 19.6 dBi which is 12.9 dB greater than that of the single patch antenna at 10 GHz. Lastly, the F‐GMS and the patch antenna are manufactured and then measured in an anechoic chamber. A good agreement was demonstrated between experimental and simulated results.     

Design of a 10 W high‐efficiency balanced power amplifier using a combination of load‐pull and load‐line methods for ISM band

In this article, a 10 W power amplifier has been designed and constructed at 2.4 GHz. The source and load‐pull impedance data published by the manufacturer at a nearby frequency of 2.5 GHz have been adopted to power match the transistor at the intended design frequency. For this purpose, the linear model of the GaN transistor has been derived from the S‐parameter data. The load‐line at the dependent current source plane and the impedance at the intrinsic gate‐source capacitance have been simulated in the presence of the source and load‐pull impedances at 2.5 GHz. The extracted impedances have been retained in the design of the power amplifier at 2.4 GHz. In a novel approach, the input and output matching circuits interacted with the linear model of the transistor to provide the same load‐line conditions at the virtual drain plane and the intrinsic gate‐source capacitance plane. In contrast to conventional load‐pull methods that give no information about the harmonic terminations, harmonic terminations can be easily controlled in this method. The insight into the transistor linear model allows the harmonic terminations at the virtual drain plane to be set to low values for proper class‐B operation.     

High‐order internal model‐based iterative learning control design for nonlinear distributed parameter systems

This article deals with the problem of iterative learning control algorithm for a class of nonlinear parabolic distributed parameter systems (DPSs) with iteration‐varying desired trajectories. Here, the variation of the desired trajectories in the iteration domain is described by a high‐order internal model. According to the characteristics of the systems, the high‐order internal model‐based P‐type learning algorithm is constructed for such nonlinear DPSs, and furthermore, the corresponding convergence theorem of the presented algorithm is established. It is shown that the output trajectory can converge to the desired trajectory in the sense of (L²,λ) ‐norm along the iteration axis within arbitrarily small error. Finally, a simulation example is given to illustrate the effectiveness of the proposed method.     

An adaptive solution for robust control based on integral high‐order sliding mode concept

A new high‐order sliding mode controller is proposed. The main features are gain adaptivity and the use of integral sliding mode concept. The gain adaptation allows a reduction of the chattering and gives a solution to control uncertain nonlinear systems whose the uncertainties/perturbations have unknown bounds. The concept of real high‐order sliding mode detector is introduced given that it plays a key role in the adaptation law of the gain. This new control approach is applied by simulation to an academic example to evaluate its efficiency. Copyright © 2014 John Wiley & Sons, Ltd.     

A portable driving system for high‐resolution active matrix electrowetting display based on FPGA

How to display pictures and even videos on electrowetting displays (EWDs) still needs improvement. Therefore, we seek to develop a robust, portable and scalable system for the realization of high‐resolution EWDs. In this paper, a driving system for an 8 inch active matrix electrowetting display (AM‐EWD) based on a Field‐Programmable‐Gate‐Array (FPGA) is proposed, where the key components are an active matrix backplane, an FPGA driving waveform and driver integrated circuits (ICs). We successfully demonstrate an AM‐EWD with 1024×768 resolution and 16‐level gray‐scale realized by unique dynamic and asymmetric sub‐frame of FPGA. The whole system is just powered by a 3.7V 1100mAH lithium battery. Such a system has not been reported before, also well‐suited for transferring to a higher performance portable EWD in the future.