Word操作题自动评分的实现

本文从Word操作题自动评分实现的原理、Word文档的结构模型、Word文档的格式识别以及Word内容的查找与定位等几个方面,详细说明了自动评分实现的各个主要环节,并给出了具体的实现算法。     

基于XBRL的财务报表网络共享技术

介绍通用业务报告语言XBRL中的技术规范、分类标准和实例文档的相关概念,对其在财务报表处理过程中的核心思想进行分析,通过实例描述财务报表映射为XML文档、XML解析生成标准XBRL实例文档和XSLT展示XBRL文档的3个步骤和财务报表实现网络共享的全过程。     

通用文档浏览器的设计--WordViewer

为了设计通用的文档测览器,利用Java语言的平台无关和动态下载等特性,设计了对文档进行管理和操作的两个基本构件Document类和View类,并以Word文档为例,实现了Word文档和txt文档的电子浏览器——WlordViewer。在不同的操作系统下进行了测试。测试结果证明,由Document／View类派生实现的WordViewer与运行平台无关。     

图解Word 2007文件操作与编辑技法

第一部分 Word2007文档操作方法多 Word 2007主要是用来写文章、排文章的,每一篇文章都是以一个电子文档的形式存在和表现的。因此,在学习如何编辑文档之前,我们需要首先熟悉Word 2007文档的操作技法。对Word 2007文档操作,主要包括创建文档、编辑保存文档和打开文档等方面。     

宝“鉴”锋从文档管理来——国内平板扫描仪文档管理市场——国内平板扫描仪文档管理市场——国内平板扫描仪文档管理市场

按照IDC（国际数据公司）对件管理应用系统的定义，件管理系统是一种软件应用，它可以使用户在网络上有效地控制其档的创建、存储和分发的过程．并能在组织范围内对其档进行有效的监控。说白了，档管理就是一个包括了档获取、档处理、档存储、档应用4个环节在内的系统工作。国外的档管理市场起步较早，已经到稳步发展阶段．而中国市场才刚刚开始。目前，件管理系统实际上可以分为4大类，一类是中高端诸如富士通、富士施乐、美能达、     

洗衣机市场扫描

最好的品牌:在消费者心目中最好的洗衣机品牌按各自的比例分布可以分为四个档次:小天鹅被认为最好的比例占所有被认为是最好的品牌的35.65%,高居首位,成为第1档.第2档的洗衣机品牌有小鸭、水仙、威力,其所占比例分别为19.15%、13.47%和11.95%.它们都是由于较好的广告宣传创意,或是较好的质量、性能,或较好的售后服务而为自己在消费者心目中赢得了良好的形象.第3档的品牌包括海棠、金羚、金鱼、白菊、友谊等,消费者对它们各自作为最好品牌的选择比例分别位于2.20%～4.61%之间.再一档为双欧、三峡、凯歌等.     

基于数据挖掘的自适应入侵检测研究

基于当前入侵检测系统的缺陷,提出了开发自适应入侵检测系统必须考虑的两个问题:正常行为简档更新时间的选择和更新机制的选择。对于第一个问题,通过计算增量审计数据与正常行为模式之间相似度,决定是否更新以及何时更新简档;对于第二个问题,采用滑动窗口,只使用当前窗口内的增量审计数据更新正常行为简档,过滤掉过时的数据,保证简档能够反映最新的系统行为变化。     

Office文档损坏不求人

Office文档取代了纸和笔,成为我们日常工作和学习的主要工具。但不同于企业的核心数据库,我们通常都没有为这些Office文件建立完善的安全防护措施,也没有养成定期进行文件备份的良好习惯。那么,由于误操作、病毒破坏、系统故障、停电等原因,就有可能造成当前正在编辑的Word文档、Excel电子表格、Access数据库等受到损坏,导致下次无法打开。如果真遇到文档丢失或者破损,我们就无力回天了吗?其实,我们可以使用专业的数据恢复工具来挽救受损的Office文档。下面就给大家推荐几个可以完成修复Word文档、Excel电子表格和Access数据库文件的工具软件。     

硬盘备份必备软件Norton Ghost 2001

许多用户都会利用Ghost来将硬盘备份,因为它可一并记录硬盘上所有隐藏档、系统档及Boot Sector。新版主要加入了对Windows 2000及Windows Me的支援,还有将Image档直接烧录至CD-R,以及在旧有GHO档加入档案等新功能。     

基于VB6.0的EXCEL2000文档的分析与探究

该文主要讨论的是基于Visual Basic 6.0的Excel2000文档内部结构分析与研究,文章主要从Excel2000文档的内部结构、VBA的相关技术、如何利用VB6来分析EXCEL文档三个方面来阐述作者的观点。     

A software instruction prefetching method in architectures with static scheduling

The performance of modern microprocessors considerably depends on the efficient workload of their execution units. The performance in modern applications is considerably affected by instruction stalls. Until recently, the problem of instruction stalls was mainly studied for superscalar microprocessors. A software instruction prefetching method for VLIW/EPIC architectures that makes it possible to improve performance for a certain class of problems is described.     

Limited bandwidth to affect processor design

This paper quantifies and compares the performance impacts of memory latencies and finite bandwidth. We show that the implementation of aggressive latency tolerance techniques aggravates stalls due to finite memory bandwidth, which actually become more significant than stalls resulting from uncongested memory latency alone. We expect that memory bandwidth limitations across the processor pins will drive significant architectural change. An execution-driven simulation measures the time that several SPEC95 benchmarks spend stalled for memory latency, limited-memory bandwidth and computing     

Addressing GPU On-Chip Shared Memory Bank Conflicts Using Elastic Pipeline

One of the major problems with the GPU on-chip shared memory is bank conflicts. We analyze that the throughput of the GPU processor core is often constrained neither by the shared memory bandwidth, nor by the shared memory latency (as long as it stays constant), but is rather due to the varied latencies caused by memory bank conflicts. This results in conflicts at the writeback stage of the in-order pipeline and causes pipeline stalls, thus degrading system throughput. Based on this observation, we investigate and propose a novel Elastic Pipeline design that minimizes the negative impact of on-chip memory bank conflicts on system throughput, by decoupling bank conflicts from pipeline stalls. Simulation results show that our proposed Elastic Pipeline together with the co-designed bank-conflict aware warp scheduling reduces the pipeline stalls by up to 64.0 % (with 42.3 % on average) and improves the overall performance by up to 20.7 % (on average 13.3 %) for representative benchmarks, at trivial hardware overhead.     

Speeding-up homography estimation in mobile devices

A critical problem faced by computer vision on mobile devices is reducing the computational cost of algorithms and avoiding visual stalls. In this paper, we introduce a procedure for reducing the number of samples required for fitting a homography to a set of noisy correspondences using a random sampling method. This is achieved by means of a geometric constraint that detects invalid minimal sets. In the experiments conducted, we show that this constraint not only reduces the number of random samples at a negligible computational cost but also balances the processor workload over time preventing visual stalls. In extreme situations of very large outlier proportion and noise level, it reduces in about one order of magnitude the number of required random samples.     

基于神经网络的自动变速器换档控制系统

针对AMT自动变速技术中的重要部分即换挡控制系统,本文引入神经网络智能控制技术．构造档位决策模型、离合器接合速度控制模型,从而设计了自动变速器换档控制系统。试验结果表明,所研究的自动变速器换档控制系统在实现神经网络智能控制方面达到了较为满意的效果。     

Software Data Prefetching for Software Pipelined Loops

This paper focuses on the interaction between software prefetching (both binding and nonbinding prefetch) and software pipelining for statically scheduled machines. First, it is shown that evaluating software pipelined schedules without considering memory effects can be rather inaccurate due to stalls caused by dependences with memory instructions (even if a lockup-free cache is considered). It is also shown that the penalty of the stalls is in general higher than the effect of spill code. Second, we show that, in general, binding schemes are more powerful than nonbinding ones for software pipelined schedules. Finally, the main contribution of this paper is an heuristic scheme that schedules some memory operations according to the locality estimated at compile time and other attributes of the dependence graph. The proposed scheme is shown to outperform other heuristic approaches since it achieves a better trade-off between compute and stall time than the others.     

Combining data prefetching with non-blocking loads to alleviate cache pollution effects

Data prefetching is a useful approach for reduction of memory access stalls in many scientific applications. However, it suffers from cache pollution severly in some applications. In this paper, we study the effectiveness of combining data prefetching with non-blocking loads on cache pollution and explain why it shows good result in our simulation.     

Speculative synchronization: programmability and performance for parallel codes

Proper synchronization is vital to ensuring that parallel applications execute correctly. A common practice is to place synchronization conservatively so as to produce simpler code in less time. unfortunately, this practice frequently results in suboptimal performance because it stalls threads unnecessarily. Speculative synchronization overcomes this problem by allowing threads to speculatively execute past active barriers, busy locks, and unset flags. The result is high performance.     

Parking lot design by interactive computer graphics

An Interactive Computer Graphics Parking (ICG-PARK) Program which provides an efficient way to design parking lots is described. Using ICG-PARK program, composite pictures of the system can be generated by computer graphics quickly and accurately. The modification or redesign of such pictures can be done easily through interactive display systems.

The area under study is initially drawn with fixed objects. The user can then proceed to any desired subroutine by using the interactive capabilities of the system. The length, direction of row(s) of parking spaces and the dimension of the parking stalls are given by the user each time through the interactive device when a parking stall drawing subroutine is called. Row(s) of parking stalls are drawn on a subpicture. When attached to the cross cursor, it can be moved to the desired location. The approximation of a curve can be drawn by calling the curve drawing subroutine recurrently. The design vehicle minimum turning path curve is provided, and can be used to check the adequacy of the aisle, entrance, and exit layout. The CRT screen can be erased either entirely or partially and redrawn at any time. Finally, a hardcopy of a satisfactory parking lot layout plan can be obtained through the plotter.     

基于AVR智能坐便器控制系统设计与实现

为了满足人们对于智能坐便器的需求,设计具有自动冲水、自动翻盖、防污除臭、烘干、温水清洗、按摩、节电、红外遥控、坐温调节、水温调节、风温调节、增压、水势档位调节、清洗位置档位调节、智能存储及记忆等功能的智能坐便器控制系统;主控制器用AVR MCU来实现智能控制系统的硬件与软件的设计与实现;对系统设计与开发中难点进行说明,系统软件采用模块化设计思想;该系统具有较高稳定性,智能化。本文设计智能控制系统已经应用于实际产品。