红外焦平面器件的信息获取电路技术

红外焦平面阵列器件是现代红外成像系统的关键器件,它包括红外探测器阵列和读出电路两部分。其信号获取电路是处理焦平面输出信号的部分,主要指与读出电路接口的放大电路。本文主要综合了红外焦平面器件的信息获取电路及其相关技术,并就其中的关键技术进行简要分析。     

基于CPLD的红外焦平面阵列驱动电路的设计

红外焦平面阵列是新型的红外探测器,为了使其达到理想的工作状态,需要提供时钟驱动脉冲和偏置电压.传统的方法是通过重写EEPROM等方式来改写驱动脉冲信号.设计了一种使用CPLD的红外焦平面探测器时钟驱动电路,其电路结构简单,具有较强的器件驱动能力,可实现CMOS TDI 288×4红外焦平面阵列和其他超长线列焦平面阵列的驱动,提供可调偏置电压,为红外焦平面阵列的性能调试提供方便.     

短波红外焦平面探测器及其应用进展

简要介绍短波红外焦平面阵列(SWIRFPA)的相关概念,从探测器材料、探测器制备工艺方面讲述国内外在短波红外焦平面探测器研究领域取得的进展,列举HgCdTe和InGaAs材料短波红外焦平面探测器产品,描述当前短波红外焦平面探测器的研究动向,最后列举了一些有代表性的短波红外焦平面阵列的应用.     

红外焦平面器件的研制与展望

从焦平面器件研制的角度出发，分析了焦平面技术的现状和发展趋势，认为红外焦平面的难点在于大规模，高均匀性，高性能的红外探测器阵列的制造，同时强调了材料，杜瓦瓶，致冷器，读出电路等关键技术在加速焦平面器件研制中所起的重要作用。     

非致冷红外焦平面阵列研究进展

主要介绍了在室温下工作的红外焦平面的研究进展，非致冷红外焦平面阵列的研制主要分两大类，即热释电焦平面阵列以是辐射热红外焦平面阵列，文中较为详细地介绍这两种探测器的材料及结构，并给出国外对这两咎探测器结构研究的最新发展趋势。     

红外焦平面阵列二元非线性的非均匀性理论模型

 非均匀性校正是红外焦平面阵列成像质量提高的关键,在现有一元线性理论模型局限下,红外焦平面阵列成像非均匀性校正难以获得校正精度的提高.本文通过红外焦平面阵列探测器成像机理及其成像过程理论分析,推导了影响探测器响应及其非均匀性的主要因素,首次建立了红外焦平面阵列二元非线性的非均匀性理论模型,通过实验测试及其统计分析验证了理论模型.该模型能在较宽红外辐射和环境温度范围内准确预测红外焦平面阵列响应曲线及其非均匀性,比原一元线性理论模型更全面准确地描述了红外成像非均匀性影响因素及探测器响应关系.     

数字化红外焦平面噪声分析研究

基于自行设计的TDI线列红外焦平面数字化读出电路,设计一款带有驱动IRFPA器件和数字化数据采集功能的红外焦平面测试系统,分别进行数字化线列读出电路电注入方式、中波红外焦平面和长波红外焦平面的噪声分析以及红外探测器比较关心的NETD的分析,并对积分时间、焦平面阵列注入区和偏置电压对红外探测性能的影响做了区分论证。     

加入运动触发场景的非均匀性校正方法

针对目前非均匀性校正方法存在的问题与不足,介绍了适于红外焦平面阵列探测器的非均匀性校正处理方法。其特点是用一个触发电路使基于场景的非均匀性校正电路对探测器的运动信号做出响应。实验结果表明,在没有劣化静态场景的情况下,该方法实现了运动场景信号的校正,不仅消除了红外焦平面阵列响应的非均匀性,而且补偿了其漂移。     

红外探测器背景抑制读出结构设计研究

长波红外焦平面探测器一般工作在高背景下，信号电流小于背景电流，器件本身暗电流也较大，信号读出时积分电容极易饱和，这都不利于获得理想的信噪比。通过在读出电路输入级中增加电流抑制结构，可有效提高积分时间，改善动态范围和对比度。本文介绍了红外焦平面读出电路中几种典型的背景电流及暗电流抑制技术，依次叙述不同结构背景及暗电流抑制的实现原理，并比较各个结构的优缺点，针对不同电路结构的特点，通过典型电路仿真分析，确定了它们在各种红外焦平面读出电路输入级中的应用范围。     

大面阵CMOS快照模式焦平面读出电路设计分析

针对一款大面阵(640×512元)快照模式制冷型红外焦平面用的读出电路进行了初步分析验证.该读出电路采用改进DI结构,先积分后读出的积分控制模式,像素尺寸为25μm×25μm,芯片已在0.5μm双硅双铝(DPDM)标准CMOS工艺下试制.首先对该电路结构及工作原理进行分析,并对输入级等电路的传输特性进行仿真验证,最后给出探测器阵列与读出电路芯片互连后的测试结果.结果表明该读出电路适用于小像素、大规模的红外焦平面阵列.     

Hybrid infrared focal-plane arrays

In this paper, new results are presented in the development of hybrid infrared focal-plane arrays. Attention is focused on hybrid focal-plane arrays using backside-illuminated InAsSb and HgCdTe photovoltaic detectors which are source-coupled into a charge-coupled device (CCD) multiplexer. Background suppression capabilities of the input circuit, charge skimming and partitioning, are experimentally demonstrated. Data on the uniformity and temperature dependence of the input MOSFET threshold voltage are presented. The temperature dependence of the threshold voltage agrees well with theoretically calculated values. Several aspects of the noise problems associated with the hybrid infrared focal-plane arrays are discussed. Noise of a source-coupled input circuit with a feedback amplifier is analyzed and it is shown that although two new noise sources are added, the circuit can operate with less noise than the simple source-coupled input circuit. To further understand focal-plane operation, a noise performance model has been constructed which gives excellent agreement with experimental data. Finally, the performance of hybrid focal-plane arrays is discussed.     

A biologically inspired analog IC for visual collision detection

We have designed and tested a single-chip analog VLSI sensor that detects imminent collisions by measuring radially expanding optic flow. The design of the chip is based on a model proposed to explain leg-extension behavior in flies during landing approaches. We evaluated a detailed version of this model in simulation using a library of 50 test movies taken through a fisheye lens. The algorithm was evaluated on its ability to distinguish movies ending in collisions from movies in which no collision occurred. This biologically inspired algorithm is capable of 94% correct performance in this task using an ultra-low-resolution (132-pixel) image as input. A new elementary motion detector (EMD) circuit was developed to measure optic flow on a CMOS focal-plane sensor. This EMD circuit models the bandpass nature of large monopolar cells (LMCs) immediately postsynaptic to photoreceptors in the fly visual system as well as a saturating multiplication operation proposed for Reichart-type motion detectors. A 16/spl times/16 array of two-dimensional motion detectors was fabricated in a standard 0.5-/spl mu/m CMOS process. The chip consumes 140 /spl mu/W of power from a 5 V supply. With the addition of wide-angle optics, the sensor is able to detect collisions 100-400 ms before impact in complex, real-world scenes.     

Terahertz Imaging Detectors in CMOS Technology

Square-law power detection circuits with on-chip antennas and amplifiers are presented for the detection of 0.65-THz radiation in a low-cost 0.25-μm CMOS technology. The circuit architecture combines metal-insulator-metal (MIM) coupling capacitors with NMOS transistors to facilitate self-mixing in a resistive mixer. A low-frequency (quasi-static) and a high-frequency (non-quasi-static) analysis of the broad-band circuit is presented. Current and voltage readout techniques of non-amplified detectors are compared, and exhibit a measured responsivity of 5.3 mA/W and 150 V/W respectively. A monolithic integrated 3×5 pixel focal-plane array has been used for single-pixel and multi-pixel imaging of concealed objects at 0.65 THz.     

二极管非制冷红外探测器及其读出电路设计

针对非制冷红外技术的低成本高性能应用,提出了基于SOI的二极管红外探测器及其读出电路的集成设计方案。阐述了二极管非制冷红外探测器的基本原理和工艺实现。对探测器的电学特性进行理论推导,得出读出电路的设计指标。采用连续时间自稳零电路结构实现探测器输出信号的低噪声低失调放大,采用级联滤波器以减弱开关非理想因素的影响,并采用片内电容采样保持,使得I/O引脚数较少,从而减小版图面积。采用spectre工具进行仿真,在CSMC 0.5 m 2P3M CMOS工艺下实现。结果表明:读出电路性能良好,闭环增益为65.8 dB,等效输入噪声谱密度为450 nV/Hz,等效输入失调电压100 V以内,功耗为5 mW,能实现探测器信号的准确读出。     

Dual-band infrared detectors made on high-quality HgCdTe epilayers grown by molecular beam epitaxy on CdZnTe or CdTe/Ge substrates

In this paper, we present all the successive steps for realizing dual-band infrared detectors operating in the mid-wavelength infrared (MWIR) band. High crystalline quality HgCdTe multilayer stacks have been grown by molecular beam epitaxy (MBE) on CdZnTe and CdTe/Ge substrates. Material characterization in the light of high-resolution x-ray diffraction (HRXRD) results and dislocation density measurements are exposed in detail. These characterizations show some striking differences between structures grown on the two kinds of substrates. Device processing and readout circuit for 128×128 focal-plane array (FPA) fabrication are described. The electro-optical characteristics of the devices show that devices grown on Ge match those grown on CdZnTe substrates in terms of responsivity, noise measurements, and operability.     

32×32双色红外探测器同步读出电路设计

双色（中短波）同步工作模式的红外探测器,其输出光电流信号为中波信号和中短波混合信号。文中提出了一种电压信号相减的电路结构,可在中波和中短波信号同步积分后,将两个波段的积分电压信号进行相减,得到单独的短波信号,实现信号分离的过程,并对32×32规模的电路进行了仿真验证,电路在仿真中有良好的性能。     

基于零偏置肖特基二极管的毫米波宽带高灵敏度检波器

Two broadband detectors at W-band and D-band are analyzed and designed with low barrier Schottky diodes. The input circuit of the detectors is realized by low and high impedance microstrip lines, and their output circuit is composed of a radio frequency (RF) bandstop filter and a tuning line for optimum reflection phase of the RF signal. S-parameters of the complete circuit are exported to a circuit simulator for voltage sensitivity analysis. For the W band detectors, the highest measured voltage sensitivity is 11800 mV/mW at 100 GHz, and the sensitivity is higher than 2000 mV/mW in 80-104 GHz. Measured tangential sensitivity (TSS) is higher than-38 dBm, and its linearity is superior than 0.99992 at 95 GHz. For the D band detector, the highest measured voltage sensitivity is 1600 mV/mW, and the typical sensitivity is 600 mV/mW in 110-170 GHz. TSS is higher than-29 dBm, and its linearity is superior than 0.99961 at 150 GHz.     

Ultra-low-noise, high-impedance preamp for cryogenic detectors

A preamplifier design is presented which is based on a common-drain JFET input. The midband noise performance is En = 0.42 nV/Hz?, In = 2.8 fA/Hz?. The circuit has considerably less input capacitance than comparably noisy common-source amplifiers. It is particularly useful for preamplification of 0.1 to 10 MHz signals from liquid-helium-cooled radiation detectors.     

A high speed low input impedance current pulse amplifier cell

A high speed CMOS current pulse amplifier cell with low input impedance, devoted to nuclear multichannel detectors where crosstalk is a serious problem, is presented. The symmetry of the circuit achieved with complementary transistors yields both an input and an output with low offset voltage, opening a large field of applications such as transimpedance amplifiers and therefore transimpedance operational amplifiers.     

Low-cost test technique using a new RF BIST circuit for 4.5-5.5 GHz low noise amplifiers

This paper presents a low-cost test technique using a new RF Built-In Self-Test (BIST) circuit for 4.5-5.5 GHz low noise amplifiers (LNAs). The test technique measures input impedance, voltage gain, noise figure, input return loss and output signal-to-noise ratio of the LNA. The BIST circuit is designed using 0.18 μm SiGe technology. The BIST circuit contains test amplifier and RF peak detectors. The complete measurement set-up contains LNA with BIST circuit, external RF source, RF relays, 50 Ω load impedance, and a DC voltmeter. The test technique utilizes output DC voltage measurements and these measured values are translated to the LNA specifications such as input impedance and gain through the developed equations. The technique is simple and inexpensive.