Formal methods in embedded design

For more than two decades, applied formal methods have remained the unexplored frontier of embedded system design - just beyond the reach of practice. There have been inroads, certainly, but no sign of a revolution -even a quiet one - in industry. Considering the rapid progress of technology over this time, the dynamic expansion of applications, and the meager investment in formal methods, just keeping pace with the advancing frontier speaks pretty well for the research. Having watched these trends over the years, I would not forecast any dramatic changes in practice. We should be looking for a sea change, not a revolution. Formal methods have a cumulative impact, reflected in languages and "informal" methods as much as in automated reasoning tools.     

Formal models for user interface design artefacts

There are many different ways of building software applications and of tackling the problems of understanding the system to be built, designing that system and finally implementing the design. One approach is to use formal methods, which we can generalise as meaning we follow a process which uses some formal language to specify the behaviour of the intended system, techniques such as theorem proving or model-checking to ensure the specification is valid (i.e., meets the requirements and has been shown, perhaps by proof or other means of inspection, to have the properties the client requires of it) and a refinement process to transform the specification into an implementation. Conversely, the approach we take may be less structured and rely on informal techniques. The design stage may involve jotting down ideas on paper, brainstorming with users etc. We may use prototyping to transform these ideas into working software and get users to test the implementation to find problems. Formal methods have been shown to be beneficial in describing the functionality of systems, what we may call application logic, and underlying system behaviour. Informal techniques, however, have also been shown to be useful in the design of the user interface to systems. Given that both styles of development are beneficial to different parts of the system we would like to be able to use both approaches in one integrated software development process. Their differences, however, make this a challenging objective. In this paper we describe models and techniques which allow us to incorporate informal design artefacts into a formal software development process.     

Microprocessor design for embedded system

This paper discusses the two main approaches to the design of microarchitectures for embedded processors: VLIW and Superscalar. The latter is preferred for the particular needs of an embedded system. Then a methodology and a design flow for Superscalar microprocessor design is presented. The approach relies on the exploitation of the features of the application to which the processor is dedicated. Also particular attention is given to fast time-to-market and to re-usability issues that are key factors for embedded microprocessor design.     

针对嵌入式系统的存储器管理单元设计

针对Linux操作系统,实现了面向32位RSIC嵌入式处理器的存储器管理单元。通过在指令快表中增加预比较电路,提高了处理器连续访问同一虚拟页面时的地址转换效率。快表失效时,设计了专门的硬件来实现页表查询及快表填充,处理速度明显优于软件。论文设计的MMU能够很好地和Linux配合,完成地址映射及存储权限管理。     

嵌入式软件形式化建模方法

随着嵌入式系统在各行各业的普及,嵌入式系统也越来越复杂,为保证嵌入式系统正确性,研究从需求分析、系统设计到系统验证、代码自动生成统一建模方法尤为重要。针对以上问题,提出采用状态变迁矩阵（STM）对嵌入式软件进行建模,通过确认STM中的每个单元格保证软件的正确性,且在需求分析阶段更容易发现需求遗漏。针对单元格处理经常出现大量的逻辑判断问题,提出采用决策表（DT）模型对复杂多条件判断分支问题进行建模。在模型建立后进行验证,最后自动生成代码。通过对紧急制动控制建模实验,说明方法的正确性。     

嵌入式系统设计开发的相关问题研究

本文主要阐述了嵌入式系统设计与开发的相关问题。本文首先列表比较了嵌入式系统几种常用软件分析设计方法的优缺点，并简介了三种常用的嵌入式系统硬件设计模式。其次，分析了嵌入式软件开发的相关技术，讨论了开发过程中的一些常见问题以及相应技巧。     

嵌入式计算机加密存储系统研究

Flash存储器有着功耗低、数据容量大、可整片擦除和分扇区擦除等优点,在嵌入式系统中得到了广泛的应用,但其中所存储程序代码容易被读取出来,易被非法拷贝,是其致命弱点。提出了一种加密技术,由PC机上运行的预加密软件和安全芯片两部分组成,可以有效地防范当前各种针对嵌入式计算机的软件程序的恶意窃取,牢牢锁住Flash存储器中的嵌入式软件和数据,使得知识窃贼无法得逞。     

实时嵌入式系统的高速内存数据库设计

提出了在实时嵌入式系统中使用内存数据库的必要性,并设计了内存数据库中两种不同类型的表结构,线性表和哈希表.介绍了线性表和哈希表的基本特点和基本操作过程,指出了管理数据库对于内存数据库的支持作用和两者之间的数据通信机制,提出了使用通信状态机技术实现两者通信的设计思想,并介绍了状态机3要素的设计和用于通信的各种消息类型,最后通过一个表的传送过程的举例描述了通信过程的典型流程.     

Conflicting criteria in embedded system design

The complexity of the design problem becomes apparent when considering the huge design space of possible implementations on the one hand and the many conflicting design goals on the other. Automated design tools are necessary in order to handle the complexity of today's systems and to support the designer in finding the trade-off that best fits the market requirements. This article presents a methodology to cope with the simultaneous optimization of multiple competing objectives and the different sources of heterogeneity in embedded system design     

嵌入式蓄电池SoC检测系统研究与设计

系统建立了基于神经网络的电池荷电状态(SoC)的预测模型,可用于对电池电量有精确预测需求的设备中。首先,基于自适应神经网络模糊推理系统(ANFIS)的预测模型确定了网络学习算法,采用MATLAB仿真程序用不同方法构造初始ANFIS模型,利用实验数据对模型网络进行训练,分析ANFIS系统结构和参数的变化。其次,将模型值与实际测得的结果进行对比,对网络的各个参数进行调整后再次用仿真比对预测效果。最后,设计了嵌入式系统硬件和软件的结构,用正弦波注入法解决了电池内阻测量这一难点。     

嵌入式设备上的文件系统优化设计

FAT32在Linux上的优化与实现是提高硬盘式嵌入式设备性能的关键因素。通过深入分析FAT32文件系统在Linux上的实现细节,针对性地提出了多种优化策略:Block机制实现优化、预读机制控制优化、Page机制改进等。最后给出了一个实际系统的性能优化比较。     

Formal communication elimination and sequentialization equivalence proofs for distributed system models

Equivalence reasoning with distributed system models, expressed directly as imperative programs with explicit parallelism, communication operations, storage variables and boolean conditions, remains virtually unexplored. Only reasoning with models expressed as process algebras has been amply dealt with in literature. However, these formalisms do not contemplate either storage variables or Boolean conditions as fundamental items, although these items become essential in most situations. This article develops the foundation of the until now non existent theory of equivalence reasoning with the aforementioned imperative notation and two novel equivalence proof techniques: communication elimination and sequentialization. The development is grounded on state systems and transition interleavings, as treated by Manna and Pnueli. Equivalence proofs safely transform a model via the application of a sequence of equivalence laws; aiming to obtain an equivalent model which is purely sequential, free from internal communication operations and parallelism, as a simplification of the initial model. After this, verification of the original model can be carried out, indirectly, in the simplified model, thus reducing complexity. Some of the presented novel notions are: (1) modular procedure for decomposition of both models and proofs, (2) interface behavior for statement semantics, (3) interface equivalence between behaviors, between statements and between procedures, (4) a set of communication elimination laws and (5) substitution rules of procedure references by their bodies or by references to equivalent procedures. An elimination proof construction algorithm is also presented; when it terminates, deadlock freedom of the original model can be decided. The main design lines of a computer aided equivalence reasoning tool are outlined as well. This is the foundation for a more widely applicable tool. As an illustration, the sequentialization proof of a simplified pipelined processor is overviewed. It is modeled as a distributed system with procedures and two levels of parallelism. The model obtained at the end of the equivalence proof is the sequential loop of a Von Neumann processor. This result establishes that the original model is deadlock-free, behaves as a processor and, as a consequence, the partition of processor functions among parallel processes is correct. The ratio of the upper bounds on the number of states of the final over the initial models, \(\frac{final}{initial}\) , is \(\frac{1}{2^{672}}\) .     

PSoC-based embedded design and quartz tuning fork for low-temperature measurement system design

This article describes a commercial quartz tuning fork (QTF), 8 mm in height by 3 mm in diameter, holding a two-terminal electronic component with a nominal frequency of 32.768 kHz and 12.5 pF typical load capacitance packed in a vacuum-sealed metal container, which has been used as a sensor for low-temperature measurement with good sensitivity, repeatability, and reliability. An embedded readout design with the support of a programmable system on-chip (PSoC) and virtual instrument control program, which uses a personal computer as an input/output device, provides online data acquisition of the QTF frequency data, which will in turn provide the measurement of the low-temperature bath in which the QTF is immersed. The embedded PSoC readout captures the varying frequency signals from the QTF as a response to the measurement temperature, processes it, and sends the frequency value to a personal computer, where LabVIEW, a graphical language ("G" language), displays the data in a graphical format. The QTFs for low temperature (300 K to 77 K) are well studied, whereas a sensor using a PSoC embedded design as a readout is a novel design implementation.     

基于MDA的汽车嵌入式软件系统架构设计

为了高效管理愈来愈复杂的车辆电子、软件系统,并且在确保产品及服务质量的同时,提高成本效率,以统一建模语言(UML)和系统建模语言(SysML)为基础,参照汽车开放系统架构(AUTOSAR),提出一种基于模型驱动架构的汽车嵌入式软件开发方法,并以汽车引擎点火和敲打控制系统为例进行描述.性能分析表明,该方法缩短了汽车嵌入式软件开发周期,降低了开发成本.     

嵌入式膜片钳系统的软件设计

本文提出了一种基于ARM9处理器和Linux操作系统的嵌入式膜片钳解决方案。文章首先介绍了系统的整体结构．接着介绍了嵌入式Linux系统的软件构成，然后重点介绍了嵌入式膜片钳应用软件的设计和多线程方法的应用。最后给出系统的初步测试结果。     

嵌入式PPPoE软件模块的设计与实现

分析了PPPoE协议的基本框架和协议过程,根据嵌入式系统资源有限和无操作系统支持的特点,设计了一种适合于嵌入式系统的PPPoE软件结构,提出了减少代码长度和数据存储空间的优化方法,在80D51芯片上成功实现了PPPoE协议软件,并应用在以太话机中。实际运行证明,本PPPoE协议软件在稳定性、互通性和一致性等方面都具有良好的性能。     

嵌入式软件系统测试中的仿真系统结构设计

分析了嵌入式软件的特点及测试方法;针对嵌入式软件的特点,提出了嵌入式软件系统测试中具有交互式错误检测定位功能的仿真系统架构设计模型,并结合铁路微机联锁系统的测试实例进行分析。     

实时在线嵌入式系统复位设计

实时在线嵌入式系统要求业务不间断、并便于在线诊断与维护。目前嵌入式设备的复位大多是通过看门狗全局复位,业务模块与管理模块复位耦合,无法实现在线诊断,可维护性差,不能满足实时在线系统的要求。针对这种情况,在分析实时在线嵌入式设备的电路特点和复位设计要求的基础上,提出了支持多源复位,具备临终遗言、复位原因监测、快速启动等功能,且业务处理与设备管理分离的新型复位方案。测试表明,该方案可保障业务持续或中断时间最短,并具备较好的可靠性和可维护性。