多结太阳电池用键合技术

介绍了使用键合技术制备高效多结太阳电池的方法,即在不同材料衬底依次外延生长晶格匹配子电池,再通过键合技术将二者集成至一起。着重介绍了多种实现子电池集成的键合技术,并分析了其技术特点。     

Single-Crystalline Ferroelectric Thin Films by Ion Implantation and Direct Wafer Bonding

Layer splitting by helium and/or hydrogen implantation and wafer bonding was applied to transfer thin single-crystalline ferroelectric layers onto different substrates. The optimum conditions for achieving blistering/splitting after post-implantation annealing were experimentally obtained for LiNbO₃, LaAlO₃, SrTiO₃ single crystals and PLZT ceramic. Under certain implantation conditions large area exfoliation instead of blistering occurs after annealing of as-implanted substrates. Small area single-crystalline layer transfer was successfully achieved.     

Silicon Microtoroidal Resonators With Integrated MEMS Tunable Coupler

A single crystalline silicon microtoroidal resonator with integrated MEMS-actuated tunable optical coupler is demonstrated for the first time. It is fabricated by combining hydrogen annealing and wafer bonding processes. The device operates in all three coupling regimes: under-, critical, and over-coupling. We have also developed a comprehensive model based on time-domain coupling theory. The experimental and theoretical results agree very well. The quality factor (Q) is extracted by fitting the experimental curve with the model. The unloaded Q is as high as 110 000, and the loaded Q is continuously tunable from 110 000 to 5400. The extinction ratio of the transmittance is 22.4 dB. This device can be used as a building block of resonator-based reconfigurable photonic integrated circuits     

Low‐temperature direct bonding of poly(methyl methacrylate) for polymer microchips

A low‐temperature, direct bonding method for poly(methyl methacrylate) (PMMA) plates has been developed by employing surface treatment by atmospheric pressure oxygen plasma, vacuum oxygen plasma, ultraviolet (UV)/ozone or vacuum ultraviolet (VUV)/ozone. Reasonable bonding strength, as evaluated by a tensile test, was achieved below the glass transition temperature (T_g). The highest bonding strength among the achieved results is 1.43 MPa (about three times the value for conventional direct bonding) at an annealing temperature of 50 °C and an applied pressure of 2.5 MPa for 10 min. Low‐temperature bonding prevents deformation of the PMMA microstructure. A prototype PMMA microchip that has fine channels of 5 µm depth was fabricated by hot‐embossing using a Si mold. After atmospheric pressure oxygen plasma activation, direct bonding was carried out at an annealing temperature of 75 °C and an applied pressure of 3 MPa for 3 min. The method gives good bonding characteristics without deformation and leakage. This low‐temperature bonding technology can be applied to polymer micro/nano structures. Copyright © 2007 Institute of Electrical Engineers of Japan© 2007 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.     

Wafer bonding technology and its applications in optoelectronicdevices and materials

The direct wafer bonding process has found broad applications in many critical areas including both commercial and state-of-the-art photonic devices and more recently, formation of semiconductor compliant substrates. Using the wafer bonding technology, we have demonstrated 1.3-μm vertical-cavity surface-emitting lasers (VCSELs) with a 1-mA continuous-wave (CW) threshold current and 0.83-mA pulsed threshold current. Superior device performance has also been achieved with photodetectors and micromachined tunable devices. Applying the wafer bonding process in a novel way, we have fabricated compliant universal substrates on which largely mismatched (e.g., 15% mismatch) heteroepitaxial layers can be grown defect free     

1.3-μm InP-InGaAsP lasers fabricated on Si substrates by waferbonding

1.3-μm InP-InGaAsP lasers have been successfully fabricated on Si substrates by wafer bonding. InP-InGaAsP thin epitaxial films are prepared by selective etching of InP substrates and then bonded to Si wafers, after which the laser structures are fabricated on the bonded thin films. The bonding temperature has been optimized to be 400°C by considering bonding strength, quality of the bonded crystal, and compatibility with device processes. Room-temperature continuous-wave (RT CW) operation has been achieved for 6-μm-wide mesa lasers with a threshold current of 39 mA, which is identical to that of conventional lasers on InP substrates. Additionally, the lasers fabricated on Si have exhibited higher output powers than the lasers on InP, which is due to higher thermal conductivity of Si substrates. From these results, the wafer bonding is thought to be a promising technique to integrate optical devices on Si and implement optical interconnections between Si LSI chips     

Mechanical characterizations of topology‐insensitive rivet bonding using the sidewall bond principle

Our goal was to develop a topology‐insensitive rivet bonding method using the sidewall bond principle for MEMS devices and evaluate its mechanical characteristics. The proposed bonding method is comprised of two fundamental structures with a sidewall bond between them. The first is a male wafer having a relatively thick solder as a donor, and the second is a female wafer as an acceptor with a structure similar to a through‐via. The two wafers are bonded laterally by the reflow phenomena of the solder and the excess volume of the donor with the acceptor then generating a rivet. In this study, these structural features were investigated. The rivet bonding led to an enhancement in the bonding strength due to the plastic hardening behavior of the rivet, serving as a cushion for the stress. This was parametrically studied and experimentally verified. © 2011 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.     

白鹤滩特高拱坝层间性能监控系统研究与应用

恶劣的环境会对特高拱坝层间结合性能产生不利影响。本研究测试了大坝混凝土在不同温度下的层间劈裂抗拉强度,建立了成熟度与强度系数的关系。同时,基于成熟度与强度系数及含水量的关系提出了以成熟度为主含水量为辅的大坝层间性能三级九梯度预警体系。结果表明,随着温度的升高,大坝混凝土层间力学性能呈下降趋势。同时,成熟度与混凝土的强度系数及含水量线性相关,相关系数分别为0.9985和0.9964。此外,根据成熟度与层间性能参数之间的关系所建立的预警体系,可以对大坝层间结合质量进行有效的控制。     

PROPERTIES OF FERROELECTRIC P(VDF-TrFE) 70/30 COPOLYMER FILMS AS A GATE DIELECTRIC

ABSTRACT

We directly formed the organic ferroelectric P(VDF-TrFE) 70/30 copolymer film by the spin coating for making the MFS structure in the silicon wafer. To understand the crystallization behavior of P(VDF-TrFE) 70/30 copolymer, the morphologies of copolymer thin films were studied by AFM and XRD. AFM studies revealed that as grown and annealed films showed surface roughness greater than amorphous films due to crystallization. The XRD spectrum of the films subjected to various annealing temperatures showed β -phase and this phase content was maximum at 140°C annealing. The capacitance shows hysteresis behavior like a buttery shape due to the polarization reversal in the film and this result indicates clearly that the film has a ferroelectric property. The dielectric constants of the P(VF₂-TrFE) copolymer films calculated from the capacitance at the two peak points of the C-V characteristics were about 8.7.     

Growth and characterization of UHV sputtering HfO2 film by plasma oxidation and low temperature annealing

Ultra-thin (∼4.0 nm) HfO₂ films were fabricated by plasma oxidation of sputtered metallic Hf films with post low temperature annealing. Advantage of this fabrication process is that the pre-deposition of Hf metal can suppress the formation of interfacial layer between HfO₂ film and Si substrate. The as-deposited HfO₂ films were subsequently treated by rapid thermal annealing at different temperatures in N₂ to investigate the effects of thermal annealing on the physical and electrical properties of HfO₂ film. A SiO₂-rich interface layer was observed after higher temperature rapid thermal annealing and the phase change of HfO₂ film from amorphous into crystalline occurred at about 700^∘C. As a result of higher temperature annealing, effective dielectric constant and leakage current were significantly influenced by the formation of interface layer and the crystallization of HfO₂ film.     

反向恢复期脉冲作用下高压晶闸管失效分析

本文搭建了高压晶闸管反向恢复期脉冲作用实验平台与特性参数测试平台,研究了高压晶闸管在反向恢复期不同阶段遭受脉冲冲击过程中的特性参数变化规律,并对退化和失效晶闸管拆片分析,结果表明：反向恢复期脉冲作用下高压晶闸管退化或失效表现为阻断能力的退化或丧失,由此引起晶闸管漏电流剧增,漏电流可作为表征晶闸管状态变化的特征参量;反向恢复期初期和中期冲击失效器件芯片上可见明显击穿点;反向恢复期中期冲击阻断能力退化芯片上可见热应力作用形成的圆斑;反向恢复期末期冲击失效器件可在芯片边缘与绝缘橡胶相接处见雪崩击穿闪痕。#$NL关键词：高压晶闸管; 电压脉冲; 反向恢复期; 失效分析#$NL中图分类号：TM461.4     

Fabrication of piezoelectric MEMS devices-from thin film to bulk PZT wafer

Integrating patterned functional piezoelectric layer onto silicon substrate is a key technique challenge in fabrication of piezoelectric Micro Electro Mechanical System (pMEMS) devices. Different device applications have different requirements on the thickness and in-plane geometry of the piezoelectric layers and thus have their own processing difficulties. In this paper, the techniques of integrating piezoelectric function into pMEMS has been discussed together with some diaphragm-based pMEMS devices which have relatively lenient requirement on patterning of the piezoelectric layers. Sol-gel thin film can meet the requirement of most of the sensor applications. The composite thick film is one of the promising solutions for thick film devices due to its good processing compatibility. Si/Pb(Zr _x Ti_1 − x )O₃ wafer bonding technique makes it possible to thin down the ceramic wafer to less than 10 μm by using chemical mechanical polishing, which, therefore, provide us another approach to integrate thick piezoelectric layer on silicon to cover the need of most of the thick film devices. Directly make double side aligned electrode patterns on bulk piezoelectric wafer/plate by using photolithography opens up a new area of pMEMS. The advantage of using bulk piezoelectric wafer/plate in pMEMS is that we can select commercial available ceramics or single crystals with excellent piezoelectric properties and thus ensure the overall performance of the devices.     

Cu和Cr缓冲层对SmCo_5薄膜微观结构和磁性能的影响

利用新型AE(Advanced Energy)脉冲电源采取共溅射的方式在Si片上制备不同结构的Cr/SmCo_5/Cr和Cu/SmCo_5/Cr薄膜,并分别研究Cu和Cr缓冲层对SmCo_5薄膜磁性能和微观结构的影响。以Cu作为缓冲层时,在优于2×10―5Pa的真空环境下通过对样品在650℃退火60min,可以获得较良好的硬磁性能,垂直膜面的矫顽力可以达到1308Oe。以Cr作为缓冲层时,在低于2×10~(-5)Pa的真空环境中,且在650℃退火60min便制备出样品。随后分别改变Cr缓冲层的厚度和SmCo_5的厚度并观察其对Cr/SmCo_5/Cr的磁性能的影响。     

Metal‐bonding‐based hermetic wafer‐level MEMS packaging technology using in‐plane feedthrough: Hermeticity and high frequency characteristics of thick gold film feedthrough

Au–Au‐bonding‐based wafer‐level vacuum packaging technology using in‐plane feedthrough of thick Au signal lines was developed for high‐frequency micro electromechanical system (RF MEMS). Compared with conventional technology based on glass frit bonding, the developed technology is advantageous in terms of smaller width of sealing frames, lower process temperature, and smaller amount of degas. To guarantee the hermetic sealing, the adhesion between the thick Au lines and a SiOx dielectric frame is improved by an Al₂O₃ interlayer by atomic layer deposition. The steps of the dielectric frame above the thick Au lines are absorbed by an electroplated Au seal ring planarized by fly cutting. The thermocompression bonding of the Au seal rings of 20‐100 μm width was done at 300 ºC. A cavity pressure of about 500 Pa or lower was measured by “zero balance method” using Si diaphragms. Vacuum sealing was maintained for more than 19 months, and the leak rate is less than 8×10‐16 Pa m3/s. The isolation of open signal lines was measured up to 10 GHz for different designs of the sealing ring and SiOx dielectric frame. The influence of the in‐plane feed through to the isolation is as low as 2‐3 dB, if the width of the sealing ring is 20 μm and the thickness of SiOx dielectric frame is larger than 10 μm. The developed wafer‐level packaging technology is ready for applications to an radio frequency (RF) MEMS switch.     

The Effect of the physico-chemical properties of cellulosic polymers on the Si wafer polishing process

Cellulosic polymers were used as organic additives to reduce the wafer surface roughness during the polishing process. The physico-chemical affinity of the polymer for the wafer and the formation of a hydro-plane on the Si wafer surface were investigated to identify the role of the polymeric additives in the wafer-polishing process. Two different polymers, hydroxyethyl cellulose (HEC) and carboxymethyl cellulose (CMC), were employed as a surface modifier for the wafer. The wettability of the Si surface varied markedly between the different suspensions prepared with HEC and CMC due to different adsorptive behaviors. As a result, the suspension prepared with HEC reduced the haze level and micro-roughness of the wafer, enhancing overall polishing performance.     

射频磁控反应溅射氧化硅薄膜微结构和电击穿场强研究

采用射频磁控反应溅射法在单晶硅片上制备了氧化硅(SiOx)薄膜,分析了薄膜的主要成分,研究了制备工艺对薄膜表面形貌和电击穿场强的影响.结果表明:薄膜的主要成分为氧化硅(SiOx);退火前后,薄膜的表面粗糙度由原来的1.058nm下降至0.785nm,峰与谷之间的高度差由原来的7.414nm降低至5.046nm;薄膜的电击穿场强随溅射功率的增加先增大后减小,通过800℃/100 s的快速热退火,在各种射频功率下制备的薄膜电击穿场强都有明显升高.薄膜的绝缘性能显著增强.     

PECVD低功率沉积氮化硅薄膜研究

为了减少太阳能电池氮化硅薄膜生产工艺中的缺陷、提高太阳能电池的转换效率,采用等离子增强化学气相沉积法在射频功率较低的条件下,对N型单晶硅片表面进行氮化硅沉积,获得与高射频功率沉积时相同膜厚和折射率的氮化硅膜,通过试验分析了低功率沉积工艺对电池电参数、对膜厚均匀性的影响。结果表明,在低功率沉积工艺条件下,有助于改善膜厚均匀性,使膜厚不均匀度由12%下降到6%,太阳能电池转换效率提高了0.05个百分点。     

Co2Z软磁铁氧体薄膜的磁性能

首先用球磨法制备了BaxCo2Fe24O41铁氧体粉料,烧结后制得块体材料,然后以其为靶材,用射频磁控溅射的方法在单晶硅基片上制备了膜厚为100nm的铁氧体薄膜.实验表明,沉积态的薄膜为非晶态结构,经过高温热处理后形成了较好的磁铅石结构.研究了成分、热处理温度、氧分压对薄膜结构和磁性能的影响.通过对热处理温度和氧分压的...     

多晶硅片氧化前后方块电阻的变化实验研究

通过实验发现,多晶硅片在不同温度下氧化后方块电阻的变化情况不同。温度较高时,氧化后方块电阻降低;温度较低时,氧化后方块电阻升高;单晶硅在任何温度下氧化后方块电阻都是降低的。通过分析认为是多晶硅的结构使其氧化后方块电阻的变化情况与单晶硅不同。     

Polycrystalline silicon wafer with columnar grain structure grown directly on silicon carbide coated graphite substrate

Concerning horizontally direct growth technology, graphite material with excellent thermal and chemical resistance is frequently used as both the crucible and the substrate in equipment operated at high temperatures. However, this can cause a major problem, namely, contamination due to the carbon and metallic impurities derived from graphite components. This study presents the experimental findings on a method of preventing the incorporation of unintended impurities into the silicon wafer by modifying the surface of the graphite. Coating the crucible and substrate with silicon carbide (SiC) could significantly reduce carbon (1.5?×?10¹⁷ atom/cm³) and metallic (undetected under analysis resolution) contamination by suppressing physical contact between the silicon melt and the graphite. It is expected that the purity of the silicon wafer will be improved to meet the demand for next-generation solar cell production with the optimum growth conditions required for obtaining the desired property of the silicon wafer.