基于多谐波双向牵引技术的微波功率放大器设计

功率放大器的输出功率和附加效率是设计的重点和难点,而功放设计通常采用的是负载牵引技术,强调了负载阻抗对电路输出功率和效率的影响,却常常忽略了源阻抗对它的影响.文中结合实例,介绍了基于谐波平衡分析的多谐波双向牵引优化技术的原理和实现方法.优化源和负载各谐波阻抗,仿真和实测结果表明:多谐波双向牵引优化技术能够在获得功率放大器所需的最大输出功率和最佳附加效率之间取得折中和平衡,从而满足工程设计指标要求.     

0.4~2.2 GHz连续F类功率放大器设计

连续F类功放(PA)通过引入修正因子,减轻功放对基波和二次谐波阻抗的要求,从而扩展F类功放的带宽。本文在连续F类功放基础上,提出一种新型修正型连续F类工作模式。通过引入电阻性二次和三次谐波阻抗进一步扩展连续F类功放的设计空间,使其可实现多个倍频程带宽。基于此理论,采用负载牵引方法对基波和谐波进行最佳阻抗提取,结合实频技术设计功放匹配网络,实现了一款超宽带高效率功率放大器。该功放在0.4~2.2 GHz频段内,饱和输出功率为39.8~41.4 dBm,漏极效率在59%~79%之间,增益大于10 dB。仿真与测试结果良好,验证了该方法的正确性。     

谐波负载阻抗对功率放大器性能的影响

使用谐波平衡法精确分析了谐波负载阻抗对功率放大器性能的影响并确定了最优谐波阻抗，提出了优化谐波负载阻抗的方法，设计实现了AB类1．5W功率放大器。测试结果证明，在功放设计中优化谐波负载阻抗具有重要的意义。     

基于GaN器件的连续型高效宽带功率放大器设计*

提出一种高效宽带功率放大器的设计方法,并基于GaN HEMT 器件CGH40010F 设计了验证电路。利用功放管输出寄生参数的等效网络,将基于连续型功放理论得到的负载阻抗转换到封装参考面上,并利用多谐波双向牵引技术对转换后的负载阻抗进行适当调整,使二次谐波负载阻抗位于高效率区以及基频负载阻抗能够获得高功率附加效率和高输出功率。谐波阻抗位于高效率区使得匹配网络的设计简化为基频匹配网络的设计,降低了对谐波阻抗匹配的难度和宽带匹配网络设计的复杂度。实验结果表明:在1GHz -3GHz 工作频带(相对带宽100%)内,功率附加效率在53%-64.6%之间,输出功率为39.5±2dBm,增益为11.5±2dB,二次谐波小于-15dBc,三次谐波小于-25dBc。     

基于阶梯阻抗匹配网络的连续逆F类功率放大器

为了满足移动通信系统中功率放大器宽频带和高效率的需求，采用阶梯阻抗网络实现宽带匹配电路，设计了一款高效率连续逆F类功率放大器。选用CGH40010F GaN HEMT晶体管，通过对连续逆F类功率放大器的理论分析，并且结合ADS负载牵引与源牵引仿真，提取各频点的最佳负载阻抗和源阻抗，设计阶梯阻抗匹配电路，最终实现了一款宽带高效率功率放大器。测试结果表明，该功率放大器在3.2～3.8 GHz频段内，增益大于14 dB,增益平坦度小于±0.4 dB,饱和输出功率为40.6～40.9 dBm,最大漏极效率为64%～68%。该功率放大器的测试性能良好，可以为宽频带高效率功率放大器的设计提供参考。     

S 波段GaN HEMT 宽带逆F 类高效率功率放大器设计

提出一种宽频带GaN HEMT 逆F 类功率放大器设计方法,并完成S 波段高效率功率放大器的研制。首先对改进的GaN HEMT Angelov 大信号缩放模型进行分析,确定功放管栅宽模型参数;然后通过输出电容补偿、负载牵引技术获得最佳输入、输出阻抗,设计谐波控制网络实现对谐波阻抗的峰化;最后基于宽频带、高效率原则完成电路仿真版图优化。为验证该方法,基于国产GaN HEMT(栅宽1. 25mm)设计了一款中心频率2. 9GHz,带宽大于40% 的高效率逆F 类功放,测试结果表明频带内输出功率均大于3W、漏极效率达到60%。     

基于双向牵引技术的射频功放设计与仿真

射频功率放大器是无线通信系统的核心部件,其输出功率和附加效率是设计的重点和难点,现有方法很难在功率和效率之间取得一致.为了解决这一问题,文中在综合考虑谐波分量以及负载阻抗、源阻抗对输出功率和附加效率影响的基础上,采用新型多谐波双向阻抗牵引技术,结合实例设计了一种高效率的射频功率放大器.在ADS中进行仿真,仿真结果表明功放在获得最佳附加效率的同时又有较高输出功率,证明了该方法的有效性.     

一种基于阻抗缓冲匹配技术的高效率Doherty放大器

为了在功率回退时满足功率放大器对高效率的要求,提出了一种采用阻抗缓冲匹配技术的Doherty功率放大器。通过负载牵引仿真,得到功放管的最佳基波和谐波负载阻抗。在此基础上,采用一种谐波控制阻抗匹配网络设计方法来设计主/辅路放大器的输出匹配网络,实现了高回退效率。为了验证该方法的有效性,设计并实现了一个1.635 GHz高效率Doherty功率放大器。测试结果表明,该放大器的饱和功率大于44 dBm,峰值效率为75%,6 dB功率回退时的效率为70%。该方法能有效提高Doherty功率放大器的回退效率。     

L频段GaN宽带功率放大器设计

针对宽带功放率放大器的设计难点,提出了一种负载牵引技术与Smith圆图匹配工具相结合,谐波平衡仿真与Momentum版图仿真相结合的方法,设计了一款应用于L频段的宽带功率放大器,该功率放大器采用Ga N HEMT设计制作。经测试,功率放大器在L频段内输出功率大于150W,功率增益大于10d B,效率大于50%。     

基于场效应管阻抗参数测试的宽带功率放大器优化设计

设计了一个工作在800～1250MHz的宽带线性高功率放大器.用负载牵引方法测试了LDMOS场效应管宽带内的大信号阻抗参数,利用测得的阻抗参数优化设计了功放的匹配电路.实测功放的1dB压缩点输出功率大于44.5dBm,二次谐波小于-25dBc,输出功率为38.5dBm时双音测试三阶交调(IM3)优于-44dBc.     

An Integrated Wideband Power Amplifier for Cognitive Radio

This paper presents the development of the wideband power amplifier (PA) for application to intelligent cognitive radios. The load-tracking based on the frequency-varied load-pull technique is proposed for the PA design. The load impedance tracking is realized by filter network synthesis. A 3-7.5-GHz broadband PA is demonstrated in 0.15-mum InGaAs pseudomorphic HEMT technology. Operated at 3.5 V, the P_{1 dB} and power-added efficiency of the PA are better than 21.4 dBm and 20%, respectively.     

Concurrent Dual-Band Class-F Load Coupling Network for Applications at 1.7 and 2.14 GHz

Highly efficient multiband power amplifiers (PAs) are key elements for the development of future multistandard multiband communication terminals and cognitive radios. This paper reports the design of a multiharmonic dual-band Class-F power amplifier for applications at wireless communication frequencies based on a switchless multiharmonic multiband load coupling network topology. The proposed output network topology is able to precisely synthesize Class-F impedance conditions with up to three harmonics at two distinct nonharmonic frequencies without the need of switches or electronically tunable elements. The proposed topology was used to design a Class-F PA in hybrid technology for the frequency bands at 1.7 and 2.14 GHz. Optimum impedances for maximum efficiency of the used GaAs MESFET for the two bands were determined by multiharmonic load-pull measurements and synthesized by the proposed switchless dual-band Class-F network. With a dual-band input matching network, the fabricated PA achieves 44.0% and 61.3% drain efficiency for an output power of more than 32.8 dbm and 34.4 dbm at 1.7 and 2.14 GHz, respectively. To the best knowledge of the authors, this is the first concurrent multiharmonic dual-band PA reported in open literature.     

调整峰值功放电流响应提高效率的LTE-A Doherty 功放*

介绍了一种利用宽带输入匹配网络调整峰值功放输出电流,改善Doherty 功放负载调制效果和带内 效率的设计方法。理论分析表明,Doherty功放中峰值功放C 类偏置情况下带来的带内不一致开启特性会影响输出 电流和负载调制效果。通过引入宽带输入匹配网络,能有效改善它的开启不一致性。为验证分析结果设计了具有 宽带(采用简易实频技术)和窄带两种不同输入匹配网络,用于2.15GHz 频段LTE-A 的Doherty功放。仿真和测试 结果表明,功放的输出功率超过49dBm,在7dB 回退功率处,宽带输入匹配Doherty 功放的带内效率达到42% 以上, 效率波动由10%降低到2%。使用100MHz 宽带LTE-A 信号经过线性化改善后,在40dBm 输出时,宽带输入匹配网 络的Doherty功放上下边带ACLR(adjacent channel leakage ratio)指标为-45.1/-44.9dBc,效率为40.5%,均优于窄带输入匹配网络的Doherty功放。     

基于改进简化实频技术的超宽带功率放大器设计

该文提出了一种基于改进简化实频算法的跨多倍频超宽带功率放大器。结合负载牵引技术,分析晶体管负载端的最优阻抗值变化。通过改进简化实频法中的优化目标和误差函数,对频段内选取多个频点的最优阻抗进行分析,设计并优化出了功率放大器的输出匹配电路,提高了功放的工作带宽。测试结果显示,在 0.5～2.7 GHz频段内,饱和输出功率达到 42.5 dBm,饱和漏极效率为 64%～75%。     

基于2μm GaAs HBT工艺的E类功率放大器设计

本文采用Win公司2μm GaAs HBT工艺设计一种高效率射频E类功率放大器。设计中采用了电压偏置的E类功放结构,通过负载牵引(Load-Pull)技术对放大器的效率、增益和输出功率进行折衷和优化设计。仿真结果表明该放大器在5V电源电压下,工作频段700MHz～1100MHz内功率附加效率(PAE)大于50%,增益15dB,输出功率大于20dBm。芯片面积为1.375mm*0.79mm。     

Experimental class-F power amplifier design using computationally efficient and accurate large-signal pHEMT model

This paper presents an experimental high-efficiency class-F power amplifier (PA) design, which integrates Rhodes's efficient low-pass matching network topology with the charge conservative, robust, and accurate WREN/COBRA nonlinear pseudomorphic high electron-mobility transistor (pHEMT) model for optimal drain efficiency. Large-signal model verification is undertaken where one-tone, load-pull, and wireless code-division multiple-access baseband time-domain tests are compared for simulated and experimental cases. Following a detailed theoretical analysis, a class-F matching network is proposed that suppresses the necessary load harmonics and delivers maximum drain efficiency. Utilizing the GaAs pHEMT model in computer-aided design, a microstrip matching network layout was generated and built at 2 GHz. The drain efficiency recorded for the first-pass effort was 70.5% with the use of no post-fabrication circuit tuning. Excellent agreement is also observed between the PAs simulated and measured performance, thus highlighting the advantages of an accurate device model in PA design.     

Design of InP DHBT power amplifiers at millimeter-wave frequencies using interstage matched cascode technique

In this paper, the design of InP DHBT based millimeter-wave(mm-wave) power amplifiers(PAs) using an interstage matched cascode technique is presented. The output power of a traditional cascode is limited by the early saturation of the common-base(CB) device. The interstage matched cascode can be employed to improve the power handling ability through optimizing the input impedance of the CB device. The minimized power mismatch between the CB and the common-emitter(CE) devices results in an improved saturated output power. To demonstrate the technique for power amplifier designs at mm-wave frequencies, a single-branch cascode based PA using single-finger devices and a two-way combined based PA using three-finger devices are fabricated. The single-branch design shows a measured power gain of 9.2 dB and a saturated output power of 12.3 dBm at 67.2 GHz and the two-way combined design shows a power gain of 9.5 dB with a saturated output power of 18.6 dBm at 72.6 GHz.     

5. 8GHz 堆叠式功率放大器设计

基于2mm GaAs HBT 工艺,采用堆叠晶体管结构设计了一款5. 8GHz 功率放大器。通常堆叠式功率 放大器在高频情况下,上下两层晶体管间需要电感来完成功率匹配,在芯片设计中其电感会增加版图面积和级间功 耗,为此该设计则利用上层晶体管的基极与地之间的串联电阻、电容等效成堆叠结构级间的感性负载,从而减小了 级间的损耗与匹配难度。实测结果表明,该堆叠功率放大器在5. 8GHz 时增益为20. 6dB,饱和输出功率为29dBm,饱 和输出时功率附加效率达到36. 4%,芯片面积仅为1×0. 85mm2     

Design and Analysis of a 55–71-GHz Compact and Broadband Distributed Active Transformer Power Amplifier in 90-nm CMOS Process

A 55–71-GHz fully integrated power amplifier (PA) using a distributed active transformer (DAT) is implemented in 90-nm RF/MS CMOS technology. The DAT combiner, featuring efficient power combination and direct impedance transformation, is suitable for millimeter-wave (MMW) PA design. Systematic design procedures including an impedance allocation plan, a compensation line, and a gain boosting technique are presented for the MMW DAT PA. The monolithic microwave integrated circuit (MMIC) performs a high and flat small-signal gain of ${hbox{26}} pm {hbox{1.5}}~{hbox{dB}}$ from 55 to 71 GHz, which covers a full band for 60-GHz wireless personal area network applications. Using cascode devices and a DAT four-way power combination, the CMOS PA delivers 14.5- and 18-dBm saturated output power with 10.2% and 12.2% power-added efficiency under 1.8- and 3-V supply voltage, respectively, at 60 GHz. The maximum linear output power ( $ P _{1~{rm dB}} $) is 14.5 dBm. To the best of our knowledge, the MMIC is the first demonstration of a $V$-band CMOS PA using a DAT combining scheme with highest linear output power among the reported 60-GHz CMOS PAs to date.