电磁耦合式位移传感器的直接数字解调电路设计

针对电磁耦合式位移传感器轴角位置的测量,采用了由旋转变压器AD2S80A构成的测角系统,介绍了其工作原理、硬件构成及相关参数的选择。研究了系统与DSP的接口设计,并提出了利用锁存器解决在读取AD2S80A时出现的延时问题,从而提高了伺服控制系统的实时性。     

Design of a residual current circuit breaker IC with anti-interference technique

Residual current circuit breakers (RCCB) is the equipment which protect human body from an electric shock, there is close relation between RCCB and human safety. However, shortages still exist. Current RCCB tend to cause nuisance tripping due to their sensitive reaction to the interference signal in the actual power grid. So, the RCCB cannot work at the crucial moment effectively. This paper analyzes the impact to the RCCB from the general interference signal and induced interference signal in power grid, and this paper also introduces a new technique—10 ms non-actuating time technique, which is used to stand aside the interference signal. This technique with delay time protection and other anti-interference technique are integrated into a special RCCB IC chip, which is fabricated in a mixed-signal 0.5 μm CMOS process in CSMC. The test results verify great improvement in RCCB performance. Additionally, this paper analyzes the disadvantage of the active national standard referring to RCCB in China and presents some suggestions for the improvement.     

IC signal-processing circuit for TV receivers

An IC signal-processing circuit that can be applied in both black-and-white and color receivers is described. The integrated circuit combines the following functions: video preamplifier; keyed AGC detector, operating on top sync level; AGC amplifier for IF and tuner control; noise canceling circuits for AGC and sync circuits; sync separator; automatic horizontal sync; and vertical sync pulse separator. Due to the noise-canceling circuit a stable synchronization is obtained when impulse noise is received. Since the values of the capacitors in the AGC circuit can be rather low without difficulties with instabilities, the performance during fast input signal fluctuations (airplane flutter) is very good.     

GaAs digital IC for FM demodulator

A middle-scale GaAs digital IC for a pulse-counting FM demodulator has been designed and fabricated for use in microwave communication systems. The IC is constructed with the normally-on (depletion) MESFET logic with epitaxial active layers. It exhibits a high-speed pulse train with a rise time of 150 ps and with an output voltage of 2.3 V into a 300-Ω load. Output pulsewidth can be altered by the external voltage for tuning the IC to give the highest demodulation sensitivity. By merely implementing a low-pass filter at the output of the chip, the pulse-counting FM demodulator can be realized at high frequencies where the use of Si IC's has never before been possible. We estimate the demodulation sensitivity to be 20 mV/MHz at the microwave IF band.     

Amorphous-silicon image sensor IC

A novel amorphous-silicon image sensor IC is proposed in this letter. The unit cell consists of an amorphous-silicon field effect transistor, an amorphous-silicon photoconductor and an MOS capacitor. The fundamental properties of the cell are investigated and operation of a prototype integrated 8-bits linear array is described.     

SET-based quantiser circuit for digital communications

A single electron transistor (SET)-based quantiser circuit has been developed for the purpose of digital communication. The proposed circuit, which consists of only two SET devices and one load capacitor, offers ultra-low power dissipation, small quantisation noise error and zero granular noise error. The proposed circuit does not require any external sampling signal for sampling the baseband signal, the sampling rate can be controlled by varying the device capacitor     

用于减小同步开关噪声的OCD输出驱动电路的设计

分析了同步开关噪声产生的机理,从电路设计技术角度讨论了输出驱动器电路的设计方法,提出了一种用于改善输出驱动电路同步开关噪声性能的OCD输出驱动电路的设计,并给出了实际的OCD电路。     

Open-loop gain limitations for push-pull off-chip drivers

Open-loop gain limitations are described for a novel type of off-chip driver (OCD). This OCD uses feedback to make the output signal track an internal ramp. By gain adjustment, the driver impedance is matched to the output transmission line.     

Instrumentation amplifier IC designed for oxygen sensor interface requirements

Describes an instrumentation amplifier, using standard bipolar processing, with an input common mode voltage range extending below the single supply ground to -1 V. The integrated circuit has the bandwidth and gain necessary to meet the particular requirements of amplifying the output of a zirconia dioxide sensor to continuously measure the relative amount of oxygen in the automotive exhaust. Gain is trimmed to /spl plusmn/1/4 percent accuracy using fusible aluminum links.     

Planar GaAs IC technology: Applications for digital LSI

This technology utilizes multiple localized ion implantations directly into semi-insulating GaAs substrates, with unimplanted areas providing isolation between circuit elements. This approach allows for high yield, high density circuits, with optimization of various types of devices (e.g., GaAs MESFETs, high-speed Schottky-barrier diodes, etc.) made possible by optimizing the implantation profile for each type of device. The application of this fabrication technology for high-speed, ultra low power digital integrated circuits using a new circuit approach called Schottky diode-FET logic (SDFL) is described. Experimental GaAS SDFL logic ICs with LSI/VLSI compatible power levels (200-500 /spl mu/W/gate) and circuit densities (<10/SUP -3/ mm/SUP 2//gate) have been fabricated.     

From circuit miniaturization to the scalable IC

For more than three decades, the main driving force behind the integrated circuit (IC) revolution has been the steady scaling downwards of their lithographic design rules. It may therefore come as a surprise to those not familiar with their earlier history that the original IC did not, and actually could not, embrace the scaling concept. Instead, the early work was intended to achieve a revolution in circuit miniaturization by bringing all circuit components down to the same tiny size as the transistor. For these circuits to become truly scalable ICs, new transistor structures had to be invented and adapted to IC needs. Until this happened the cost-effectiveness of the IC was highly controversial. Five years after the IC was invented, plans were being put in place by IBM and AT&T to utilize flipchip transistor technology rather than ICs. But these, like the original ICs, were also unscalable, and consequently lost out to a new generation of ICs that were scalable. Two revolutions were driven by the subsequent evolution of design rules; first TTL/minicomputers, and then MOS/microcomputers. K. Marx proved disastrously wrong in the political arena, but his aphorism “evolution carried far enough becomes revolution” fits IC history like a glove     

A high-speed, low-power bipolar digital circuit for Gb/s LSI's:current mirror control logic

A novel low-power bipolar circuit for Gb/s LSIs, current mirror control logic (CMCL), is described. To reduce supply voltage and currents, the current sources of emitter-coupled-logic (ECL) series gate circuits are removed and the lower differential pairs are controlled by current mirror circuits. This enables circuits with the same function as two-stacked ECL circuits to operate at supply voltage of -2.0 V and reduces the current drawn through the driving circuits for the differential pairs to 50% of the conventional level shift circuits (emitter followers) in ECL. This CMCL circuit achieves 3.1-Gb/s (D-FF) and 4.3-GHz (T-FF) operation with a power supply voltage of -2.0 V and power dissipation of only 1.8 mW/(FF)     

Readout circuit for CMOS active pixel image sensor

The design and simulation results of a new readout circuit for a CMOS active pixel image sensor are presented. This scheme removes the fixed pattern noise and reduces the signal degradation while offering an increase in readout speed, compared with the conventional approach     

Proportional BIC sensor for current testing

A new design of a BIC sensor for current testing static CMOS circuits is proposed. It is based on a lateral BJT device which is easy to incorporate in any standard CMOS process. The design diverts a fraction of the I _DDQ current from the cell under test and a resistive component generates a voltage proportional to I _DDQ . Additional features are the possibility of continuous measure of i _dd and increased speed of this sensor compared with sensors based on the current integration principle. The design does not have substrate currents due to the parasitic vertical BJTs. Experimental work on the sensor is reported.     

A low-power circuit block for digital telephone exchanges

An integrated static 128 bit serial memory with logic circuitry at its input and transmission line drivers at its output is described. It works at a supply voltage of ?2 V ± 17%. Its power dissipation is 90 mW, and its maximum clock frequency is 40 MHz. Chip size is 3 × 4 mm².     

GaN HFET digital circuit technology for harsh environments

The first demonstration of GaN digital circuits is reported. First-generation GaN digital technology has already shown high yields for circuits of considerable complexity. Specifically, a 31-stage ring oscillator was implemented using 217 transistors. Properties of the AlGaN/GaN material system that enable outstanding power handling capabilities of GaN heterojunction field effect transistors (HFETs), i.e. large bandgap, high breakdown field and high saturation velocity, also make it attractive for digital applications in harsh environments. Because of these unique material characteristics, GaN digital control circuits have the potential to operate in high radiation environments, at elevated temperatures, and directly from high voltage rails. Successful operation of GaN 31-stage ring oscillators at the highest base-plate temperature attainable by the test setup of 265/spl deg/C, indicates that these circuits can operate at significantly higher temperatures.     

Analog phase measuring circuit for digital CMOS ICs

A circuit measuring the phase of incoming asynchronous signals relative to the system clock in digital signal processing is described. The system clock can be in the range from 10 to 20 MHz, as is typical for video signal processing applications. As a reference in the asynchronous signal the positive or negative slope is taken. Its phase is measured with a resolution of 1/32 of a system clock cycle (approximately 1.5 to 3 ns). Pure digital CMOS technology without precision components is used, to enable combined integration on processor chips. Timing precision (jitter) is better than 200 ps without any adjustments. One external capacitor is needed     

MOSFET substrate current model for circuit simulation

A simple, accurate MOSFET substrate current model suitable for a circuit simulator is presented. The effect of substrate bias on substrate current is modeled without introducing additional parameters. The accuracy of this model is demonstrated by its ability to fit the experimental data for both standard and LDD devices with average errors of less than 6%. The new model is compared with the substrate current models reported in the literature. In addition, the temperature dependence of the substrate current in the range of 0-120°C is also modeled. The new model has been implemented in a circuit-level hot-electron reliability simulator, and the results obtained from simulation of an inverter circuit are presented     

用于数字闭环加速度计的差动电容检测电路

数字闭环加速度计是加速度计领域最新的研究课题,它具有直接输出数字信号、累积误差小,采样时间短等优点,因此对差动电容检测电路的要求也很高。本文为满足数字闭环加速度计的需要设计的单载波调制解调型差动电容检测电路,分析了方案优缺点,给出了系统和检测电路的原理框图,以及各个功能模块的电路图和传递函数,最后通过实验验证,得到该电路满足灵敏度高,分辨性能好的要求,并且该电路在其他微弱信号检测领域也具有一定的实用意义。     

GaAs HBT's for high-speed digital integrated circuit applications

GaAs HBT technology has emerged as one of the most important developments for digital circuits operating at clock frequencies of 100 MHz and higher. High-speed frequency dividers operating as high as 34.8 GHz and VLSI circuits as complex as 32-b CPU's operating at 200-MHz clock rate have been demonstrated. This paper reviews the role of GaAs HBT technologies for high-speed digital IC applications. The requirements for high-speed IC's and the characteristics of various HBT device structures and logic families are discussed. A summary of published results of the ultrahigh-speed circuits and the status of several high-speed VLSI circuits are presented to provide a guide for future developments